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[/] [openarty/] [trunk/] [sw/] [host/] [mdioscope.cpp] - Blame information for rev 30

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1 30 dgisselq
////////////////////////////////////////////////////////////////////////////////
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//
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// Filename:    mdioscope.cpp
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//
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// Project:     XuLA2-LX25 SoC based upon the ZipCPU
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//
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// Purpose:     
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//
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// Creator:     Dan Gisselquist, Ph.D.
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//              Gisselquist Technology, LLC
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of  the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program.  (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.)  If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License:     GPL, v3, as defined and found on www.gnu.org,
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//              http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <strings.h>
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#include <ctype.h>
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#include <string.h>
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#include <signal.h>
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#include <assert.h>
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#include "port.h"
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#include "regdefs.h"
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#include "scopecls.h"
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#define WBSCOPE         R_NETSCOPE
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#define WBSCOPEDATA     R_NETSCOPED
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FPGA    *m_fpga;
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void    closeup(int v) {
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        m_fpga->kill();
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        exit(0);
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}
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class   MDIOSCOPE : public SCOPE {
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public:
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        MDIOSCOPE(FPGA *fpga, unsigned addr, bool vecread)
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                : SCOPE(fpga, addr, false, false) {};
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        ~MDIOSCOPE(void) {}
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        virtual void    decode(DEVBUS::BUSW val) const {
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                int     wbstall, wbstb, wbwe, wbaddr,
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                        wback, rclk, zclk, zreg, wbdata, regpos, ctstate, rpend,
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                        mdclk, mdwe, omdio, imdio;
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                wbstall = (val>>31)&1;
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                wbstb   = (val>>30)&1;
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                wbwe    = (val>>29)&1;
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                wbaddr  = (val>>24)&0x01f;
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                wback   = (val>>23)&1;
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                wbdata  = (val>>16)&0x03f;
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                rclk    = (val>>22)&1;
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                zreg    = (val>>10)&1;
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                zclk    = (val>>9)&1;
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                regpos  = (val>>8)&0x3f;
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                rpend   = (val>>7)&1;
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                ctstate = (val>>4)&7;
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                mdclk = (val&8)?1:0;
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                mdwe  = (val&4)?1:0;
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                omdio = (val&2)?1:0;
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                imdio = (val&1)?1:0;
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                printf("WB[%s%s@%2x -> %s%s/%04x] (%d%d%d,%2d,%2x%s) MDIO[%s%s %d-%d]",
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                        (wbstb)?"STB":"   ", (wbwe)?"WE":"  ", (wbaddr),
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                        (wback)?"ACK":"   ",(wbstall)?"STALL":"     ", (wbdata),
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                        zclk, rclk, zreg, regpos, ctstate,
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                        (rpend)?"R":" ",
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                        (mdclk)?"CLK":"   ", (mdwe)?"WE":"  ",(omdio),(imdio));
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        }
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};
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int main(int argc, char **argv) {
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        FPGAOPEN(m_fpga);
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        signal(SIGSTOP, closeup);
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        signal(SIGHUP, closeup);
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        MDIOSCOPE *scope = new MDIOSCOPE(m_fpga, WBSCOPE, false);
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        if (!scope->ready()) {
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                printf("Scope is not yet ready:\n");
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                scope->decode_control();
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        } else
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                scope->read();
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        delete  m_fpga;
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}
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