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////////////////////////////////////////////////////////////////////////////////
//
// Filename:    
//
// Project:     OpenArty, an entirely open SoC based upon the Arty platform
//
// Project:     XuLA2-LX25 SoC based upon the ZipCPU
//
// Purpose:     Provide a debugger to step through the ZipCPU assembler,
//              evaluate the ZipCPU's current state, modify registers as(if)
//      needed, etc.  All of this through the UART port of the Arty board.
//
//
// Creator:     Dan Gisselquist, Ph.D.
//              Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of  the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program.  (It's in the $(ROOT)/doc directory, run make with no
// target there if the PDF file isn't present.)  If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License:     GPL, v3, as defined and found on www.gnu.org,
//              http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
#include <stdlib.h>
#include <signal.h>
#include <time.h>
#include <unistd.h>
#include <string.h>
 
#include <ctype.h>
#include <ncurses.h>
 
#include "zopcodes.h"
#include "zparser.h"
#include "devbus.h"
#include "regdefs.h"
 
#include "port.h"
 
#define CMD_REG         0
#define CMD_DATA        1
#define CMD_HALT        (1<<10)
#define CMD_STALL       (1<<9)
#define CMD_STEP        (1<<8)
#define CMD_INT         (1<<7)
#define CMD_RESET       (1<<6)
 
#define KEY_ESCAPE      27
#define KEY_RETURN      10
#define CTRL(X)         ((X)&0x01f)
 
class   SPARSEMEM {
public:
        bool    m_valid;
        unsigned int    m_a, m_d;
};
 
bool    gbl_err = false;
class   ZIPSTATE {
public:
        bool            m_valid, m_gie, m_last_pc_valid;
        unsigned int    m_sR[16], m_uR[16];
        unsigned int    m_p[20];
        unsigned int    m_last_pc, m_pc, m_sp;
        SPARSEMEM       m_smem[5];
        SPARSEMEM       m_imem[5];
        ZIPSTATE(void) : m_valid(false), m_last_pc_valid(false) {}
 
        void    step(void) {
                m_last_pc_valid = true;
                m_last_pc = m_pc;
        }
};
 
// No particular "parameters" need definition or redefinition here.
class   ZIPPY : public DEVBUS {
        static  const   int     MAXERR;
        typedef DEVBUS::BUSW    BUSW;
        DEVBUS  *m_fpga;
        int     m_cursor;
        ZIPSTATE        m_state;
        bool    m_user_break, m_show_users_timers, m_show_cc;
public:
        ZIPPY(DEVBUS *fpga) : m_fpga(fpga), m_cursor(0), m_user_break(false),
                m_show_users_timers(false), m_show_cc(false) {}
 
        void    read_raw_state(void) {
                m_state.m_valid = false;
                for(int i=0; i<16; i++)
                        m_state.m_sR[i] = cmd_read(i);
                for(int i=0; i<16; i++)
                        m_state.m_uR[i] = cmd_read(i+16);
                for(int i=0; i<20; i++)
                        m_state.m_p[i]  = cmd_read(i+32);
 
                m_state.m_gie = (m_state.m_sR[14] & 0x020);
                m_state.m_pc  = (m_state.m_gie) ? (m_state.m_uR[15]):(m_state.m_sR[15]);
                m_state.m_sp  = (m_state.m_gie) ? (m_state.m_uR[13]):(m_state.m_sR[13]);
 
                if (m_state.m_last_pc_valid)
                        m_state.m_imem[0].m_a = m_state.m_last_pc;
                else
                        m_state.m_imem[0].m_a = m_state.m_pc - 1;
                try {
                        m_state.m_imem[0].m_d = readio(m_state.m_imem[0].m_a);
                        m_state.m_imem[0].m_valid = true;
                } catch(BUSERR be) {
                        m_state.m_imem[0].m_valid = false;
                }
                m_state.m_imem[1].m_a = m_state.m_pc;
                try {
                        m_state.m_imem[1].m_d = readio(m_state.m_imem[1].m_a);
                        m_state.m_imem[1].m_valid = true;
                } catch(BUSERR be) {
                        m_state.m_imem[1].m_valid = false;
                }
 
                for(int i=1; i<4; i++) {
                        if (!m_state.m_imem[i].m_valid) {
                                m_state.m_imem[i+1].m_valid = false;
                                m_state.m_imem[i+1].m_a = m_state.m_imem[i].m_a+1;
                                continue;
                        }
                        m_state.m_imem[i+1].m_a = zop_early_branch(
                                        m_state.m_imem[i].m_a,
                                        m_state.m_imem[i].m_d);
                        try {
                                m_state.m_imem[i+1].m_d = readio(m_state.m_imem[i+1].m_a);
                                m_state.m_imem[i+1].m_valid = true;
                        } catch(BUSERR be) {
                                m_state.m_imem[i+1].m_valid = false;
                        }
                }
 
                m_state.m_smem[0].m_a = m_state.m_sp;
                for(int i=1; i<5; i++)
                        m_state.m_smem[i].m_a = m_state.m_smem[i-1].m_a+1;
                for(int i=0; i<5; i++) {
                        m_state.m_smem[i].m_valid = true;
                        if (m_state.m_smem[i].m_valid)
                        try {
                                m_state.m_smem[i].m_d = readio(m_state.m_smem[i].m_a);
                                m_state.m_smem[i].m_valid = true;
                        } catch(BUSERR be) {
                                m_state.m_smem[i].m_valid = false;
                        }
                }
                m_state.m_valid = true;
        }
 
        void    kill(void) { m_fpga->kill(); }
        void    close(void) { m_fpga->close(); }
        void    writeio(const BUSW a, const BUSW v) { m_fpga->writeio(a, v); }
        BUSW    readio(const BUSW a) { return m_fpga->readio(a); }
        void    readi(const BUSW a, const int len, BUSW *buf) {
                return m_fpga->readi(a, len, buf); }
        void    readz(const BUSW a, const int len, BUSW *buf) {
                return m_fpga->readz(a, len, buf); }
        void    writei(const BUSW a, const int len, const BUSW *buf) {
                return m_fpga->writei(a, len, buf); }
        void    writez(const BUSW a, const int len, const BUSW *buf) {
                return m_fpga->writez(a, len, buf); }
        bool    poll(void) { return m_fpga->poll(); }
        void    usleep(unsigned ms) { m_fpga->usleep(ms); }
        void    wait(void) { m_fpga->wait(); }
        bool    bus_err(void) const { return m_fpga->bus_err(); }
        void    reset_err(void) { m_fpga->reset_err(); }
        void    clear(void) { m_fpga->clear(); }
 
        void    reset(void) { writeio(R_ZIPCTRL, CPU_RESET|CPU_HALT); }
        void    step(void) { writeio(R_ZIPCTRL, CPU_STEP); m_state.step(); }
        void    go(void) { writeio(R_ZIPCTRL, CPU_GO); }
        void    halt(void) {    writeio(R_ZIPCTRL, CPU_HALT); }
        bool    stalled(void) { return ((readio(R_ZIPCTRL)&CPU_STALL)==0); }
 
        void    show_user_timers(bool v) {
                m_show_users_timers = v;
        }
 
        void    toggle_cc(void) {
                m_show_cc = !m_show_cc;
        }
 
        void    showval(int y, int x, const char *lbl, unsigned int v, bool c) {
                if (c)
                        mvprintw(y,x, ">%s> 0x%08x<", lbl, v);
                else
                        mvprintw(y,x, " %s: 0x%08x ", lbl, v);
        }
 
        void    dispreg(int y, int x, const char *n, unsigned int v, bool c) {
                // 4,4,8,1 = 17 of 20, +2 = 18
                if (c)
                        mvprintw(y, x, ">%s> 0x%08x<", n, v);
                else
                        mvprintw(y, x, " %s: 0x%08x ", n, v);
        }
 
        int     showins(int y, const char *lbl, const unsigned int pcidx) {
                char    la[80], lb[80];
                int     r = y-1;
 
                mvprintw(y, 0, "%s0x%08x", lbl, m_state.m_imem[pcidx].m_a);
 
                if (m_state.m_gie) attroff(A_BOLD);
                else    attron(A_BOLD);
 
                la[0] = '\0';
                lb[0] = '\0';
                if (m_state.m_imem[pcidx].m_valid) {
                        zipi_to_string(m_state.m_imem[pcidx].m_d, la, lb);
                        printw(" 0x%08x", m_state.m_imem[pcidx].m_d);
                        printw("  %-25s", la);
                        if (lb[0]) {
                                mvprintw(y-1, 0, "%s", lbl);
                                mvprintw(y-1, strlen(lbl)+10+3+8+2, "%-25s", lb);
                                r--;
                        }
                } else {
                        printw(" 0x--------  %-25s", "(Bus Error)");
                }
                attroff(A_BOLD);
 
                return r;
        }
 
        void    showstack(int y, const char *lbl, const unsigned int idx) {
                mvprintw(y, 27+26, "%s%08x ", lbl, m_state.m_smem[idx].m_a);
 
                if (m_state.m_gie) attroff(A_BOLD);
                else    attron(A_BOLD);
 
                if (m_state.m_smem[idx].m_valid)
                        printw("0x%08x", m_state.m_smem[idx].m_d);
                else
                        printw("(Bus Err)");
                attroff(A_BOLD);
        }
 
        unsigned int    cmd_read(unsigned int a) {
                int errcount = 0;
                unsigned int    s;
 
                writeio(R_ZIPCTRL, CMD_HALT|(a&0x3f));
                while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)
                                &&(!m_user_break))
                        errcount++;
                if (m_user_break) {
                        endwin();
                        exit(EXIT_SUCCESS);
                } else if (errcount >= MAXERR) {
                        endwin();
                        printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);
                        printf("ZIPCTRL = 0x%08x", s);
                        if ((s & 0x0200)==0) printf(" STALL");
                        if  (s & 0x0400) printf(" HALTED");
                        if ((s & 0x03000)==0x01000)
                                printf(" SW-HALT");
                        else {
                                if (s & 0x01000) printf(" SLEEPING");
                                if (s & 0x02000) printf(" GIE(UsrMode)");
                        } printf("\n");
                        exit(EXIT_FAILURE);
                }
                return readio(R_ZIPDATA);
        }
 
        void    cmd_write(unsigned int a, int v) {
                int errcount = 0;
                unsigned int    s;
 
                writeio(R_ZIPCTRL, CMD_HALT|(a&0x3f));
                while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)
                                &&(!m_user_break))
                        errcount++;
                if (m_user_break) {
                        endwin();
                        exit(EXIT_SUCCESS);
                } else if (errcount >= MAXERR) {
                        endwin();
                        printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);
                        printf("ZIPCTRL = 0x%08x", s);
                        if ((s & 0x0200)==0) printf(" STALL");
                        if  (s & 0x0400) printf(" HALTED");
                        if ((s & 0x03000)==0x01000)
                                printf(" SW-HALT");
                        else {
                                if (s & 0x01000) printf(" SLEEPING");
                                if (s & 0x02000) printf(" GIE(UsrMode)");
                        } printf("\n");
                        exit(EXIT_FAILURE);
                }
 
                writeio(R_ZIPDATA, (unsigned int)v);
        }
 
        void    read_state(void) {
                int     ln= 0;
                bool    gie;
 
                read_raw_state();
 
                if (m_cursor < 0)
                        m_cursor = 0;
                else if (m_cursor >= 44)
                        m_cursor = 43;
 
                mvprintw(ln,0, "Peripherals");
                mvprintw(ln,30,"%-50s", "CPU State: ");
                {
                        unsigned int v = readio(R_ZIPCTRL);
                        mvprintw(ln,41, "0x%08x ", v);
                        // if (v & 0x010000)
                                // printw("INT ");
                        if ((v & 0x003000) == 0x03000)
                                printw("Sleeping ");
                        else if (v & 0x001000)
                                printw("Halted ");
                        else if (v & 0x002000)
                                printw("User Mode ");
                        else
                                printw("Supervisor mode ");
                        if (v& 0x0200) {
                                v = m_state.m_sR[15];
 
                        } else printw("Stalled ");
                        // if (v & 0x008000)
                                // printw("Break-Enabled ");
                        // if (v & 0x000080)
                                // printw("PIC Enabled ");
                } ln++;
                showval(ln, 0, "PIC ", m_state.m_p[0], (m_cursor==0));
                showval(ln,20, "WDT ", m_state.m_p[1], (m_cursor==1));
                showval(ln,40, "WBUS", m_state.m_p[2], (m_cursor==2));
                showval(ln,60, "PIC2", m_state.m_p[3], (m_cursor==3));
                ln++;
                showval(ln, 0, "TMRA", m_state.m_p[4], (m_cursor==4));
                showval(ln,20, "TMRB", m_state.m_p[5], (m_cursor==5));
                showval(ln,40, "TMRC", m_state.m_p[6], (m_cursor==6));
                showval(ln,60, "JIF ", m_state.m_p[7], (m_cursor==7));
 
                ln++;
                if (!m_show_users_timers) {
                        showval(ln, 0, "MTSK", m_state.m_p[ 8], (m_cursor==8));
                        showval(ln,20, "MOST", m_state.m_p[ 9], (m_cursor==9));
                        showval(ln,40, "MPST", m_state.m_p[10], (m_cursor==10));
                        showval(ln,60, "MICT", m_state.m_p[11], (m_cursor==11));
                } else {
                        showval(ln, 0, "UTSK", m_state.m_p[12], (m_cursor==8));
                        showval(ln,20, "UMST", m_state.m_p[13], (m_cursor==9));
                        showval(ln,40, "UPST", m_state.m_p[14], (m_cursor==10));
                        showval(ln,60, "UICT", m_state.m_p[15], (m_cursor==11));
                }
 
                ln++;
                ln++;
                unsigned int cc = m_state.m_sR[14];
                gie = (cc & 0x020);
                if (gie)
                        attroff(A_BOLD);
                else
                        attron(A_BOLD);
                mvprintw(ln, 0, "Supervisor Registers");
                ln++;
 
                dispreg(ln, 0, "sR0 ", m_state.m_sR[0], (m_cursor==12));
                dispreg(ln,20, "sR1 ", m_state.m_sR[1], (m_cursor==13));
                dispreg(ln,40, "sR2 ", m_state.m_sR[2], (m_cursor==14));
                dispreg(ln,60, "sR3 ", m_state.m_sR[3], (m_cursor==15)); ln++;
 
                dispreg(ln, 0, "sR4 ", m_state.m_sR[4], (m_cursor==16));
                dispreg(ln,20, "sR5 ", m_state.m_sR[5], (m_cursor==17));
                dispreg(ln,40, "sR6 ", m_state.m_sR[6], (m_cursor==18));
                dispreg(ln,60, "sR7 ", m_state.m_sR[7], (m_cursor==19)); ln++;
 
                dispreg(ln, 0, "sR8 ", m_state.m_sR[ 8], (m_cursor==20));
                dispreg(ln,20, "sR9 ", m_state.m_sR[ 9], (m_cursor==21));
                dispreg(ln,40, "sR10", m_state.m_sR[10], (m_cursor==22));
                dispreg(ln,60, "sR11", m_state.m_sR[11], (m_cursor==23)); ln++;
 
                dispreg(ln, 0, "sR12", m_state.m_sR[12], (m_cursor==24));
                dispreg(ln,20, "sSP ", m_state.m_sR[13], (m_cursor==25));
 
                if (m_show_cc) {
                        mvprintw(ln,40, " sCC :%16s", "");
                        dispreg(ln, 40, "sCC ", m_state.m_sR[14], (m_cursor==26));
                } else {
                        mvprintw(ln,40, " sCC :%16s", "");
                        mvprintw(ln,40, "%ssCC :%s%s%s%s%s%s%s",
                                (m_cursor == 26)?">":" ",
                                (cc&0x1000)?"FE":"", // Floating point exception
                                (cc&0x0800)?"DV":"", // Division by zero
                                (cc&0x0400)?"BE":"", // Bus Error
                                (cc&0x0200)?"TP":"", // Trap
                                (cc&0x0100)?"IL":"", // Illegal instruction
                                (cc&0x0080)?"BK":"", // Break
                                ((gie==0)&&(cc&0x0010))?"HLT":""); // Halted
                        mvprintw(ln,54,"%s%s%s%s",
                                (cc&8)?"V":" ",
                                (cc&4)?"N":" ",
                                (cc&2)?"C":" ",
                                (cc&1)?"Z":" ");
                }
                dispreg(ln,60, "sPC ", m_state.m_sR[15], (m_cursor==27));
                ln++;
 
                if (gie)
                        attron(A_BOLD);
                else
                        attroff(A_BOLD);
                mvprintw(ln, 0, "User Registers"); ln++;
                dispreg(ln, 0, "uR0 ", m_state.m_uR[0], (m_cursor==28));
                dispreg(ln,20, "uR1 ", m_state.m_uR[1], (m_cursor==29));
                dispreg(ln,40, "uR2 ", m_state.m_uR[2], (m_cursor==30));
                dispreg(ln,60, "uR3 ", m_state.m_uR[3], (m_cursor==31)); ln++;
 
                dispreg(ln, 0, "uR4 ", m_state.m_uR[4], (m_cursor==32));
                dispreg(ln,20, "uR5 ", m_state.m_uR[5], (m_cursor==33));
                dispreg(ln,40, "uR6 ", m_state.m_uR[6], (m_cursor==34));
                dispreg(ln,60, "uR7 ", m_state.m_uR[7], (m_cursor==35)); ln++;
 
                dispreg(ln, 0, "uR8 ", m_state.m_uR[8], (m_cursor==36));
                dispreg(ln,20, "uR9 ", m_state.m_uR[9], (m_cursor==37));
                dispreg(ln,40, "uR10", m_state.m_uR[10], (m_cursor==38));
                dispreg(ln,60, "uR11", m_state.m_uR[11], (m_cursor==39)); ln++;
 
                dispreg(ln, 0, "uR12", m_state.m_uR[12], (m_cursor==40));
                dispreg(ln,20, "uSP ", m_state.m_uR[13], (m_cursor==41));
                cc = m_state.m_uR[14];
                if (m_show_cc) {
                        mvprintw(ln,40, " uCC :%16s", "");
                        dispreg(ln, 40, "uCC ", m_state.m_uR[14], (m_cursor==42));
                } else {
                        mvprintw(ln,40, " uCC :%16s", "");
                        mvprintw(ln,40, "%suCC :%s%s%s%s%s%s%s",
                                (m_cursor == 42)?">":" ",
                                (cc&0x1000)?"FE":"", // Floating point Exception
                                (cc&0x0800)?"DV":"", // Division by zero
                                (cc&0x0400)?"BE":"", // Bus Error
                                (cc&0x0200)?"TP":"", // Trap
                                (cc&0x0100)?"IL":"", // Illegal instruction
                                (cc&0x0040)?"ST":"", // Single-step
                                ((gie)&&(cc&0x0010))?"SL":""); // Sleep
                        mvprintw(ln,54,"%s%s%s%s",
                                (cc&8)?"V":" ",
                                (cc&4)?"N":" ",
                                (cc&2)?"C":" ",
                                (cc&1)?"Z":" ");
                }
                dispreg(ln,60, "uPC ", m_state.m_uR[15], (m_cursor==43));
 
                attroff(A_BOLD);
                ln+=3;
 
                showins(ln+4, " ", 0);
                {
                        int     lclln = ln+3;
                        for(int i=1; i<5; i++)
                                lclln = showins(lclln, (i==1)?">":" ", i);
                        for(int i=0; i<5; i++)
                                showstack(ln+i, (i==0)?">":" ", i);
                }
        }
 
        void    cursor_up(void) {
                if (m_cursor > 3)
                        m_cursor -= 4;
        } void  cursor_down(void) {
                if (m_cursor < 40)
                        m_cursor += 4;
        } void  cursor_left(void) {
                if (m_cursor > 0)
                        m_cursor--;
                else    m_cursor = 43;
        } void  cursor_right(void) {
                if (m_cursor < 43)
                        m_cursor++;
                else    m_cursor = 0;
        }
 
        int     cursor(void) { return m_cursor; }
};
 
const   int ZIPPY::MAXERR = 100000;
 
FPGA    *m_fpga;
 
void    get_value(ZIPPY *zip) {
        int     wy, wx, ra;
        int     c = zip->cursor();
 
        wx = (c & 0x03) * 20 + 9 + 1;
        wy = (c >> 2);
        if (wy >= 3+4)
                wy++;
        if (wy > 3)
                wy += 2;
        wy++;
 
        if (c >= 12)
                ra = c - 12;
        else
                ra = c + 32;
 
        bool    done = false;
        char    str[16];
        int     pos = 0; str[pos] = '\0';
        attron(A_NORMAL | A_UNDERLINE);
        mvprintw(wy, wx, "%-8s", "");
        while(!done) {
                int     chv = getch();
                switch(chv) {
                case KEY_ESCAPE:
                        pos = 0; str[pos] = '\0'; done = true;
                        break;
                case KEY_RETURN: case KEY_ENTER: case KEY_UP: case KEY_DOWN:
                        done = true;
                        break;
                case KEY_LEFT: case KEY_BACKSPACE:
                        if (pos > 0) pos--;
                        break;
                case KEY_CLEAR:
                        pos = 0;
                        break;
                case '0': case ' ': str[pos++] = '0'; break;
                case '1': str[pos++] = '1'; break;
                case '2': str[pos++] = '2'; break;
                case '3': str[pos++] = '3'; break;
                case '4': str[pos++] = '4'; break;
                case '5': str[pos++] = '5'; break;
                case '6': str[pos++] = '6'; break;
                case '7': str[pos++] = '7'; break;
                case '8': str[pos++] = '8'; break;
                case '9': str[pos++] = '9'; break;
                case 'A': case 'a': str[pos++] = 'A'; break;
                case 'B': case 'b': str[pos++] = 'B'; break;
                case 'C': case 'c': str[pos++] = 'C'; break;
                case 'D': case 'd': str[pos++] = 'D'; break;
                case 'E': case 'e': str[pos++] = 'E'; break;
                case 'F': case 'f': str[pos++] = 'F'; break;
                }
 
                if (pos > 8)
                        pos = 8;
                str[pos] = '\0';
 
                attron(A_NORMAL | A_UNDERLINE);
                mvprintw(wy, wx, "%-8s", str);
                if (pos > 0) {
                        attron(A_NORMAL | A_UNDERLINE | A_BLINK);
                        mvprintw(wy, wx+pos-1, "%c", str[pos-1]);
                }
                attrset(A_NORMAL);
        }
 
        if (pos > 0) {
                int     v;
                v = strtoul(str, NULL, 16);
                zip->cmd_write(ra, v);
        }
}
 
void    on_sigint(int v) {
        endwin();
 
        fprintf(stderr, "Interrupted!\n");
        exit(-2);
}
 
void    stall_screen(void) {
        erase();
        mvprintw(0,0, "CPU is stalled.  (Q to quit)\n");
}
 
int     main(int argc, char **argv) {
        // FPGAOPEN(m_fpga);
        ZIPPY   *zip; //
 
        int     skp=0, port = FPGAPORT;
 
        FPGAOPEN(m_fpga);
        zip = new ZIPPY(m_fpga);
 
 
        initscr();
        raw();
        noecho();
        keypad(stdscr, true);
 
        signal(SIGINT, on_sigint);
 
        int     chv;
        bool    done = false;
 
        zip->halt();
        for(int i=0; (i<5)&&(zip->stalled()); i++)
                ;
        if (!zip->stalled())
                zip->read_state();
        else
                stall_screen();
        while((!done)&&(!gbl_err)) {
                chv = getch();
                switch(chv) {
                case 'c': case 'C':
                        zip->toggle_cc();
                        break;
                case 'g': case 'G':
                        m_fpga->writeio(R_ZIPCTRL, CPU_GO);
                        // We just released the CPU, so we're now done.
                        done = true;
                        break;
                case 'l': case 'L': case CTRL('L'):
                        redrawwin(stdscr);
                case 'm': case 'M':
                        zip->show_user_timers(false);
                        break;
                case 'q': case 'Q': case CTRL('C'):
                case KEY_CANCEL: case KEY_CLOSE: case KEY_EXIT:
                case KEY_ESCAPE:
                        done = true;
                        break;
                case 'r': case 'R':
                        zip->reset();
                        erase();
                        break;
                case 't': case 'T':
                case 's': case 'S':
                        zip->step();
                        break;
                case 'u': case 'U':
                        zip->show_user_timers(true);
                        break;
                case '\r': case  '\n':
                case KEY_IC: case KEY_ENTER:
                        get_value(zip);
                        break;
                case KEY_UP:
                        zip->cursor_up();
                        break;
                case KEY_DOWN:
                        zip->cursor_down();
                        break;
                case KEY_LEFT:
                        zip->cursor_left();
                        break;
                case KEY_RIGHT:
                        zip->cursor_right();
                        break;
                case ERR: case KEY_CLEAR:
                default:
                        ;
                }
 
                if ((done)||(gbl_err))
                        break;
                else if (zip->stalled())
                        stall_screen();
                else
                        zip->read_state();
        }
 
        endwin();
 
        if (gbl_err) {
                printf("Killed on error: could not access bus!\n");
                exit(-2);
        }
}
 

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[/] [openarty/] [trunk/] [sw/] [host/] [zipdbg.cpp] - Blame information for rev 31

Line No.	Rev	Author	Line
1	31	dgisselq	`////////////////////////////////////////////////////////////////////////////////`
2			`//`
3			`// Filename:`
4			`//`
5			`// Project: OpenArty, an entirely open SoC based upon the Arty platform`
6			`//`
7			`// Project: XuLA2-LX25 SoC based upon the ZipCPU`
8			`//`
9			`// Purpose: Provide a debugger to step through the ZipCPU assembler,`
10			`// evaluate the ZipCPU's current state, modify registers as(if)`
11			`// needed, etc. All of this through the UART port of the Arty board.`
12			`//`
13			`//`
14			`// Creator: Dan Gisselquist, Ph.D.`
15			`// Gisselquist Technology, LLC`
16			`//`
17			`////////////////////////////////////////////////////////////////////////////////`
18			`//`
19			`// Copyright (C) 2015-2016, Gisselquist Technology, LLC`
20			`//`
21			`// This program is free software (firmware): you can redistribute it and/or`
22			`// modify it under the terms of the GNU General Public License as published`
23			`// by the Free Software Foundation, either version 3 of the License, or (at`
24			`// your option) any later version.`
25			`//`
26			`// This program is distributed in the hope that it will be useful, but WITHOUT`
27			`// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or`
28			`// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
29			`// for more details.`
30			`//`
31			`// You should have received a copy of the GNU General Public License along`
32			`// with this program. (It's in the $(ROOT)/doc directory, run make with no`
33			`// target there if the PDF file isn't present.) If not, see`
34			`// <http://www.gnu.org/licenses/> for a copy.`
35			`//`
36			`// License: GPL, v3, as defined and found on www.gnu.org,`
37			`// http://www.gnu.org/licenses/gpl.html`
38			`//`
39			`//`
40			`////////////////////////////////////////////////////////////////////////////////`
41			`//`
42			`//`
43			`#include <stdlib.h>`
44			`#include <signal.h>`
45			`#include <time.h>`
46			`#include <unistd.h>`
47			`#include <string.h>`
48
49			`#include <ctype.h>`
50			`#include <ncurses.h>`
51
52			`#include "zopcodes.h"`
53			`#include "zparser.h"`
54			`#include "devbus.h"`
55			`#include "regdefs.h"`
56
57			`#include "port.h"`
58
59			`#define CMD_REG 0`
60			`#define CMD_DATA 1`
61			`#define CMD_HALT (1<<10)`
62			`#define CMD_STALL (1<<9)`
63			`#define CMD_STEP (1<<8)`
64			`#define CMD_INT (1<<7)`
65			`#define CMD_RESET (1<<6)`
66
67			`#define KEY_ESCAPE 27`
68			`#define KEY_RETURN 10`
69			`#define CTRL(X) ((X)&0x01f)`
70
71			`class SPARSEMEM {`
72			`public:`
73			`bool m_valid;`
74			`unsigned int m_a, m_d;`
75			`};`
76
77			`bool gbl_err = false;`
78			`class ZIPSTATE {`
79			`public:`
80			`bool m_valid, m_gie, m_last_pc_valid;`
81			`unsigned int m_sR[16], m_uR[16];`
82			`unsigned int m_p[20];`
83			`unsigned int m_last_pc, m_pc, m_sp;`
84			`SPARSEMEM m_smem[5];`
85			`SPARSEMEM m_imem[5];`
86			`ZIPSTATE(void) : m_valid(false), m_last_pc_valid(false) {}`
87
88			`void step(void) {`
89			`m_last_pc_valid = true;`
90			`m_last_pc = m_pc;`
91			`}`
92			`};`
93
94			`// No particular "parameters" need definition or redefinition here.`
95			`class ZIPPY : public DEVBUS {`
96			`static const int MAXERR;`
97			`typedef DEVBUS::BUSW BUSW;`
98			`DEVBUS *m_fpga;`
99			`int m_cursor;`
100			`ZIPSTATE m_state;`
101			`bool m_user_break, m_show_users_timers, m_show_cc;`
102			`public:`
103			`ZIPPY(DEVBUS *fpga) : m_fpga(fpga), m_cursor(0), m_user_break(false),`
104			`m_show_users_timers(false), m_show_cc(false) {}`
105
106			`void read_raw_state(void) {`
107			`m_state.m_valid = false;`
108			`for(int i=0; i<16; i++)`
109			`m_state.m_sR[i] = cmd_read(i);`
110			`for(int i=0; i<16; i++)`
111			`m_state.m_uR[i] = cmd_read(i+16);`
112			`for(int i=0; i<20; i++)`
113			`m_state.m_p[i] = cmd_read(i+32);`
114
115			`m_state.m_gie = (m_state.m_sR[14] & 0x020);`
116			`m_state.m_pc = (m_state.m_gie) ? (m_state.m_uR[15]):(m_state.m_sR[15]);`
117			`m_state.m_sp = (m_state.m_gie) ? (m_state.m_uR[13]):(m_state.m_sR[13]);`
118
119			`if (m_state.m_last_pc_valid)`
120			`m_state.m_imem[0].m_a = m_state.m_last_pc;`
121			`else`
122			`m_state.m_imem[0].m_a = m_state.m_pc - 1;`
123			`try {`
124			`m_state.m_imem[0].m_d = readio(m_state.m_imem[0].m_a);`
125			`m_state.m_imem[0].m_valid = true;`
126			`} catch(BUSERR be) {`
127			`m_state.m_imem[0].m_valid = false;`
128			`}`
129			`m_state.m_imem[1].m_a = m_state.m_pc;`
130			`try {`
131			`m_state.m_imem[1].m_d = readio(m_state.m_imem[1].m_a);`
132			`m_state.m_imem[1].m_valid = true;`
133			`} catch(BUSERR be) {`
134			`m_state.m_imem[1].m_valid = false;`
135			`}`
136
137			`for(int i=1; i<4; i++) {`
138			`if (!m_state.m_imem[i].m_valid) {`
139			`m_state.m_imem[i+1].m_valid = false;`
140			`m_state.m_imem[i+1].m_a = m_state.m_imem[i].m_a+1;`
141			`continue;`
142			`}`
143			`m_state.m_imem[i+1].m_a = zop_early_branch(`
144			`m_state.m_imem[i].m_a,`
145			`m_state.m_imem[i].m_d);`
146			`try {`
147			`m_state.m_imem[i+1].m_d = readio(m_state.m_imem[i+1].m_a);`
148			`m_state.m_imem[i+1].m_valid = true;`
149			`} catch(BUSERR be) {`
150			`m_state.m_imem[i+1].m_valid = false;`
151			`}`
152			`}`
153
154			`m_state.m_smem[0].m_a = m_state.m_sp;`
155			`for(int i=1; i<5; i++)`
156			`m_state.m_smem[i].m_a = m_state.m_smem[i-1].m_a+1;`
157			`for(int i=0; i<5; i++) {`
158			`m_state.m_smem[i].m_valid = true;`
159			`if (m_state.m_smem[i].m_valid)`
160			`try {`
161			`m_state.m_smem[i].m_d = readio(m_state.m_smem[i].m_a);`
162			`m_state.m_smem[i].m_valid = true;`
163			`} catch(BUSERR be) {`
164			`m_state.m_smem[i].m_valid = false;`
165			`}`
166			`}`
167			`m_state.m_valid = true;`
168			`}`
169
170			`void kill(void) { m_fpga->kill(); }`
171			`void close(void) { m_fpga->close(); }`
172			`void writeio(const BUSW a, const BUSW v) { m_fpga->writeio(a, v); }`
173			`BUSW readio(const BUSW a) { return m_fpga->readio(a); }`
174			`void readi(const BUSW a, const int len, BUSW *buf) {`
175			`return m_fpga->readi(a, len, buf); }`
176			`void readz(const BUSW a, const int len, BUSW *buf) {`
177			`return m_fpga->readz(a, len, buf); }`
178			`void writei(const BUSW a, const int len, const BUSW *buf) {`
179			`return m_fpga->writei(a, len, buf); }`
180			`void writez(const BUSW a, const int len, const BUSW *buf) {`
181			`return m_fpga->writez(a, len, buf); }`
182			`bool poll(void) { return m_fpga->poll(); }`
183			`void usleep(unsigned ms) { m_fpga->usleep(ms); }`
184			`void wait(void) { m_fpga->wait(); }`
185			`bool bus_err(void) const { return m_fpga->bus_err(); }`
186			`void reset_err(void) { m_fpga->reset_err(); }`
187			`void clear(void) { m_fpga->clear(); }`
188
189			`void reset(void) { writeio(R_ZIPCTRL, CPU_RESET\|CPU_HALT); }`
190			`void step(void) { writeio(R_ZIPCTRL, CPU_STEP); m_state.step(); }`
191			`void go(void) { writeio(R_ZIPCTRL, CPU_GO); }`
192			`void halt(void) { writeio(R_ZIPCTRL, CPU_HALT); }`
193			`bool stalled(void) { return ((readio(R_ZIPCTRL)&CPU_STALL)==0); }`
194
195			`void show_user_timers(bool v) {`
196			`m_show_users_timers = v;`
197			`}`
198
199			`void toggle_cc(void) {`
200			`m_show_cc = !m_show_cc;`
201			`}`
202
203			`void showval(int y, int x, const char *lbl, unsigned int v, bool c) {`
204			`if (c)`
205			`mvprintw(y,x, ">%s> 0x%08x<", lbl, v);`
206			`else`
207			`mvprintw(y,x, " %s: 0x%08x ", lbl, v);`
208			`}`
209
210			`void dispreg(int y, int x, const char *n, unsigned int v, bool c) {`
211			`// 4,4,8,1 = 17 of 20, +2 = 18`
212			`if (c)`
213			`mvprintw(y, x, ">%s> 0x%08x<", n, v);`
214			`else`
215			`mvprintw(y, x, " %s: 0x%08x ", n, v);`
216			`}`
217
218			`int showins(int y, const char *lbl, const unsigned int pcidx) {`
219			`char la[80], lb[80];`
220			`int r = y-1;`
221
222			`mvprintw(y, 0, "%s0x%08x", lbl, m_state.m_imem[pcidx].m_a);`
223
224			`if (m_state.m_gie) attroff(A_BOLD);`
225			`else attron(A_BOLD);`
226
227			`la[0] = '\0';`
228			`lb[0] = '\0';`
229			`if (m_state.m_imem[pcidx].m_valid) {`
230			`zipi_to_string(m_state.m_imem[pcidx].m_d, la, lb);`
231			`printw(" 0x%08x", m_state.m_imem[pcidx].m_d);`
232			`printw(" %-25s", la);`
233			`if (lb[0]) {`
234			`mvprintw(y-1, 0, "%s", lbl);`
235			`mvprintw(y-1, strlen(lbl)+10+3+8+2, "%-25s", lb);`
236			`r--;`
237			`}`
238			`} else {`
239			`printw(" 0x-------- %-25s", "(Bus Error)");`
240			`}`
241			`attroff(A_BOLD);`
242
243			`return r;`
244			`}`
245
246			`void showstack(int y, const char *lbl, const unsigned int idx) {`
247			`mvprintw(y, 27+26, "%s%08x ", lbl, m_state.m_smem[idx].m_a);`
248
249			`if (m_state.m_gie) attroff(A_BOLD);`
250			`else attron(A_BOLD);`
251
252			`if (m_state.m_smem[idx].m_valid)`
253			`printw("0x%08x", m_state.m_smem[idx].m_d);`
254			`else`
255			`printw("(Bus Err)");`
256			`attroff(A_BOLD);`
257			`}`
258
259			`unsigned int cmd_read(unsigned int a) {`
260			`int errcount = 0;`
261			`unsigned int s;`
262
263			`writeio(R_ZIPCTRL, CMD_HALT\|(a&0x3f));`
264			`while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)`
265			`&&(!m_user_break))`
266			`errcount++;`
267			`if (m_user_break) {`
268			`endwin();`
269			`exit(EXIT_SUCCESS);`
270			`} else if (errcount >= MAXERR) {`
271			`endwin();`
272			`printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);`
273			`printf("ZIPCTRL = 0x%08x", s);`
274			`if ((s & 0x0200)==0) printf(" STALL");`
275			`if (s & 0x0400) printf(" HALTED");`
276			`if ((s & 0x03000)==0x01000)`
277			`printf(" SW-HALT");`
278			`else {`
279			`if (s & 0x01000) printf(" SLEEPING");`
280			`if (s & 0x02000) printf(" GIE(UsrMode)");`
281			`} printf("\n");`
282			`exit(EXIT_FAILURE);`
283			`}`
284			`return readio(R_ZIPDATA);`
285			`}`
286
287			`void cmd_write(unsigned int a, int v) {`
288			`int errcount = 0;`
289			`unsigned int s;`
290
291			`writeio(R_ZIPCTRL, CMD_HALT\|(a&0x3f));`
292			`while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)`
293			`&&(!m_user_break))`
294			`errcount++;`
295			`if (m_user_break) {`
296			`endwin();`
297			`exit(EXIT_SUCCESS);`
298			`} else if (errcount >= MAXERR) {`
299			`endwin();`
300			`printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);`
301			`printf("ZIPCTRL = 0x%08x", s);`
302			`if ((s & 0x0200)==0) printf(" STALL");`
303			`if (s & 0x0400) printf(" HALTED");`
304			`if ((s & 0x03000)==0x01000)`
305			`printf(" SW-HALT");`
306			`else {`
307			`if (s & 0x01000) printf(" SLEEPING");`
308			`if (s & 0x02000) printf(" GIE(UsrMode)");`
309			`} printf("\n");`
310			`exit(EXIT_FAILURE);`
311			`}`
312
313			`writeio(R_ZIPDATA, (unsigned int)v);`
314			`}`
315
316			`void read_state(void) {`
317			`int ln= 0;`
318			`bool gie;`
319
320			`read_raw_state();`
321
322			`if (m_cursor < 0)`
323			`m_cursor = 0;`
324			`else if (m_cursor >= 44)`
325			`m_cursor = 43;`
326
327			`mvprintw(ln,0, "Peripherals");`
328			`mvprintw(ln,30,"%-50s", "CPU State: ");`
329			`{`
330			`unsigned int v = readio(R_ZIPCTRL);`
331			`mvprintw(ln,41, "0x%08x ", v);`
332			`// if (v & 0x010000)`
333			`// printw("INT ");`
334			`if ((v & 0x003000) == 0x03000)`
335			`printw("Sleeping ");`
336			`else if (v & 0x001000)`
337			`printw("Halted ");`
338			`else if (v & 0x002000)`
339			`printw("User Mode ");`
340			`else`
341			`printw("Supervisor mode ");`
342			`if (v& 0x0200) {`
343			`v = m_state.m_sR[15];`
344
345			`} else printw("Stalled ");`
346			`// if (v & 0x008000)`
347			`// printw("Break-Enabled ");`
348			`// if (v & 0x000080)`
349			`// printw("PIC Enabled ");`
350			`} ln++;`
351			`showval(ln, 0, "PIC ", m_state.m_p[0], (m_cursor==0));`
352			`showval(ln,20, "WDT ", m_state.m_p[1], (m_cursor==1));`
353			`showval(ln,40, "WBUS", m_state.m_p[2], (m_cursor==2));`
354			`showval(ln,60, "PIC2", m_state.m_p[3], (m_cursor==3));`
355			`ln++;`
356			`showval(ln, 0, "TMRA", m_state.m_p[4], (m_cursor==4));`
357			`showval(ln,20, "TMRB", m_state.m_p[5], (m_cursor==5));`
358			`showval(ln,40, "TMRC", m_state.m_p[6], (m_cursor==6));`
359			`showval(ln,60, "JIF ", m_state.m_p[7], (m_cursor==7));`
360
361			`ln++;`
362			`if (!m_show_users_timers) {`
363			`showval(ln, 0, "MTSK", m_state.m_p[ 8], (m_cursor==8));`
364			`showval(ln,20, "MOST", m_state.m_p[ 9], (m_cursor==9));`
365			`showval(ln,40, "MPST", m_state.m_p[10], (m_cursor==10));`
366			`showval(ln,60, "MICT", m_state.m_p[11], (m_cursor==11));`
367			`} else {`
368			`showval(ln, 0, "UTSK", m_state.m_p[12], (m_cursor==8));`
369			`showval(ln,20, "UMST", m_state.m_p[13], (m_cursor==9));`
370			`showval(ln,40, "UPST", m_state.m_p[14], (m_cursor==10));`
371			`showval(ln,60, "UICT", m_state.m_p[15], (m_cursor==11));`
372			`}`
373
374			`ln++;`
375			`ln++;`
376			`unsigned int cc = m_state.m_sR[14];`
377			`gie = (cc & 0x020);`
378			`if (gie)`
379			`attroff(A_BOLD);`
380			`else`
381			`attron(A_BOLD);`
382			`mvprintw(ln, 0, "Supervisor Registers");`
383			`ln++;`
384
385			`dispreg(ln, 0, "sR0 ", m_state.m_sR[0], (m_cursor==12));`
386			`dispreg(ln,20, "sR1 ", m_state.m_sR[1], (m_cursor==13));`
387			`dispreg(ln,40, "sR2 ", m_state.m_sR[2], (m_cursor==14));`
388			`dispreg(ln,60, "sR3 ", m_state.m_sR[3], (m_cursor==15)); ln++;`
389
390			`dispreg(ln, 0, "sR4 ", m_state.m_sR[4], (m_cursor==16));`
391			`dispreg(ln,20, "sR5 ", m_state.m_sR[5], (m_cursor==17));`
392			`dispreg(ln,40, "sR6 ", m_state.m_sR[6], (m_cursor==18));`
393			`dispreg(ln,60, "sR7 ", m_state.m_sR[7], (m_cursor==19)); ln++;`
394
395			`dispreg(ln, 0, "sR8 ", m_state.m_sR[ 8], (m_cursor==20));`
396			`dispreg(ln,20, "sR9 ", m_state.m_sR[ 9], (m_cursor==21));`
397			`dispreg(ln,40, "sR10", m_state.m_sR[10], (m_cursor==22));`
398			`dispreg(ln,60, "sR11", m_state.m_sR[11], (m_cursor==23)); ln++;`
399
400			`dispreg(ln, 0, "sR12", m_state.m_sR[12], (m_cursor==24));`
401			`dispreg(ln,20, "sSP ", m_state.m_sR[13], (m_cursor==25));`
402
403			`if (m_show_cc) {`
404			`mvprintw(ln,40, " sCC :%16s", "");`
405			`dispreg(ln, 40, "sCC ", m_state.m_sR[14], (m_cursor==26));`
406			`} else {`
407			`mvprintw(ln,40, " sCC :%16s", "");`
408			`mvprintw(ln,40, "%ssCC :%s%s%s%s%s%s%s",`
409			`(m_cursor == 26)?">":" ",`
410			`(cc&0x1000)?"FE":"", // Floating point exception`
411			`(cc&0x0800)?"DV":"", // Division by zero`
412			`(cc&0x0400)?"BE":"", // Bus Error`
413			`(cc&0x0200)?"TP":"", // Trap`
414			`(cc&0x0100)?"IL":"", // Illegal instruction`
415			`(cc&0x0080)?"BK":"", // Break`
416			`((gie==0)&&(cc&0x0010))?"HLT":""); // Halted`
417			`mvprintw(ln,54,"%s%s%s%s",`
418			`(cc&8)?"V":" ",`
419			`(cc&4)?"N":" ",`
420			`(cc&2)?"C":" ",`
421			`(cc&1)?"Z":" ");`
422			`}`
423			`dispreg(ln,60, "sPC ", m_state.m_sR[15], (m_cursor==27));`
424			`ln++;`
425
426			`if (gie)`
427			`attron(A_BOLD);`
428			`else`
429			`attroff(A_BOLD);`
430			`mvprintw(ln, 0, "User Registers"); ln++;`
431			`dispreg(ln, 0, "uR0 ", m_state.m_uR[0], (m_cursor==28));`
432			`dispreg(ln,20, "uR1 ", m_state.m_uR[1], (m_cursor==29));`
433			`dispreg(ln,40, "uR2 ", m_state.m_uR[2], (m_cursor==30));`
434			`dispreg(ln,60, "uR3 ", m_state.m_uR[3], (m_cursor==31)); ln++;`
435
436			`dispreg(ln, 0, "uR4 ", m_state.m_uR[4], (m_cursor==32));`
437			`dispreg(ln,20, "uR5 ", m_state.m_uR[5], (m_cursor==33));`
438			`dispreg(ln,40, "uR6 ", m_state.m_uR[6], (m_cursor==34));`
439			`dispreg(ln,60, "uR7 ", m_state.m_uR[7], (m_cursor==35)); ln++;`
440
441			`dispreg(ln, 0, "uR8 ", m_state.m_uR[8], (m_cursor==36));`
442			`dispreg(ln,20, "uR9 ", m_state.m_uR[9], (m_cursor==37));`
443			`dispreg(ln,40, "uR10", m_state.m_uR[10], (m_cursor==38));`
444			`dispreg(ln,60, "uR11", m_state.m_uR[11], (m_cursor==39)); ln++;`
445
446			`dispreg(ln, 0, "uR12", m_state.m_uR[12], (m_cursor==40));`
447			`dispreg(ln,20, "uSP ", m_state.m_uR[13], (m_cursor==41));`
448			`cc = m_state.m_uR[14];`
449			`if (m_show_cc) {`
450			`mvprintw(ln,40, " uCC :%16s", "");`
451			`dispreg(ln, 40, "uCC ", m_state.m_uR[14], (m_cursor==42));`
452			`} else {`
453			`mvprintw(ln,40, " uCC :%16s", "");`
454			`mvprintw(ln,40, "%suCC :%s%s%s%s%s%s%s",`
455			`(m_cursor == 42)?">":" ",`
456			`(cc&0x1000)?"FE":"", // Floating point Exception`
457			`(cc&0x0800)?"DV":"", // Division by zero`
458			`(cc&0x0400)?"BE":"", // Bus Error`
459			`(cc&0x0200)?"TP":"", // Trap`
460			`(cc&0x0100)?"IL":"", // Illegal instruction`
461			`(cc&0x0040)?"ST":"", // Single-step`
462			`((gie)&&(cc&0x0010))?"SL":""); // Sleep`
463			`mvprintw(ln,54,"%s%s%s%s",`
464			`(cc&8)?"V":" ",`
465			`(cc&4)?"N":" ",`
466			`(cc&2)?"C":" ",`
467			`(cc&1)?"Z":" ");`
468			`}`
469			`dispreg(ln,60, "uPC ", m_state.m_uR[15], (m_cursor==43));`
470
471			`attroff(A_BOLD);`
472			`ln+=3;`
473
474			`showins(ln+4, " ", 0);`
475			`{`
476			`int lclln = ln+3;`
477			`for(int i=1; i<5; i++)`
478			`lclln = showins(lclln, (i==1)?">":" ", i);`
479			`for(int i=0; i<5; i++)`
480			`showstack(ln+i, (i==0)?">":" ", i);`
481			`}`
482			`}`
483
484			`void cursor_up(void) {`
485			`if (m_cursor > 3)`
486			`m_cursor -= 4;`
487			`} void cursor_down(void) {`
488			`if (m_cursor < 40)`
489			`m_cursor += 4;`
490			`} void cursor_left(void) {`
491			`if (m_cursor > 0)`
492			`m_cursor--;`
493			`else m_cursor = 43;`
494			`} void cursor_right(void) {`
495			`if (m_cursor < 43)`
496			`m_cursor++;`
497			`else m_cursor = 0;`
498			`}`
499
500			`int cursor(void) { return m_cursor; }`
501			`};`
502
503			`const int ZIPPY::MAXERR = 100000;`
504
505			`FPGA *m_fpga;`
506
507			`void get_value(ZIPPY *zip) {`
508			`int wy, wx, ra;`
509			`int c = zip->cursor();`
510
511			`wx = (c & 0x03) * 20 + 9 + 1;`
512			`wy = (c >> 2);`
513			`if (wy >= 3+4)`
514			`wy++;`
515			`if (wy > 3)`
516			`wy += 2;`
517			`wy++;`
518
519			`if (c >= 12)`
520			`ra = c - 12;`
521			`else`
522			`ra = c + 32;`
523
524			`bool done = false;`
525			`char str[16];`
526			`int pos = 0; str[pos] = '\0';`
527			`attron(A_NORMAL \| A_UNDERLINE);`
528			`mvprintw(wy, wx, "%-8s", "");`
529			`while(!done) {`
530			`int chv = getch();`
531			`switch(chv) {`
532			`case KEY_ESCAPE:`
533			`pos = 0; str[pos] = '\0'; done = true;`
534			`break;`
535			`case KEY_RETURN: case KEY_ENTER: case KEY_UP: case KEY_DOWN:`
536			`done = true;`
537			`break;`
538			`case KEY_LEFT: case KEY_BACKSPACE:`
539			`if (pos > 0) pos--;`
540			`break;`
541			`case KEY_CLEAR:`
542			`pos = 0;`
543			`break;`
544			`case '0': case ' ': str[pos++] = '0'; break;`
545			`case '1': str[pos++] = '1'; break;`
546			`case '2': str[pos++] = '2'; break;`
547			`case '3': str[pos++] = '3'; break;`
548			`case '4': str[pos++] = '4'; break;`
549			`case '5': str[pos++] = '5'; break;`
550			`case '6': str[pos++] = '6'; break;`
551			`case '7': str[pos++] = '7'; break;`
552			`case '8': str[pos++] = '8'; break;`
553			`case '9': str[pos++] = '9'; break;`
554			`case 'A': case 'a': str[pos++] = 'A'; break;`
555			`case 'B': case 'b': str[pos++] = 'B'; break;`
556			`case 'C': case 'c': str[pos++] = 'C'; break;`
557			`case 'D': case 'd': str[pos++] = 'D'; break;`
558			`case 'E': case 'e': str[pos++] = 'E'; break;`
559			`case 'F': case 'f': str[pos++] = 'F'; break;`
560			`}`
561
562			`if (pos > 8)`
563			`pos = 8;`
564			`str[pos] = '\0';`
565
566			`attron(A_NORMAL \| A_UNDERLINE);`
567			`mvprintw(wy, wx, "%-8s", str);`
568			`if (pos > 0) {`
569			`attron(A_NORMAL \| A_UNDERLINE \| A_BLINK);`
570			`mvprintw(wy, wx+pos-1, "%c", str[pos-1]);`
571			`}`
572			`attrset(A_NORMAL);`
573			`}`
574
575			`if (pos > 0) {`
576			`int v;`
577			`v = strtoul(str, NULL, 16);`
578			`zip->cmd_write(ra, v);`
579			`}`
580			`}`
581
582			`void on_sigint(int v) {`
583			`endwin();`
584
585			`fprintf(stderr, "Interrupted!\n");`
586			`exit(-2);`
587			`}`
588
589			`void stall_screen(void) {`
590			`erase();`
591			`mvprintw(0,0, "CPU is stalled. (Q to quit)\n");`
592			`}`
593
594			`int main(int argc, char **argv) {`
595			`// FPGAOPEN(m_fpga);`
596			`ZIPPY *zip; //`
597
598			`int skp=0, port = FPGAPORT;`
599
600			`FPGAOPEN(m_fpga);`
601			`zip = new ZIPPY(m_fpga);`
602
603
604			`initscr();`
605			`raw();`
606			`noecho();`
607			`keypad(stdscr, true);`
608
609			`signal(SIGINT, on_sigint);`
610
611			`int chv;`
612			`bool done = false;`
613
614			`zip->halt();`
615			`for(int i=0; (i<5)&&(zip->stalled()); i++)`
616			`;`
617			`if (!zip->stalled())`
618			`zip->read_state();`
619			`else`
620			`stall_screen();`
621			`while((!done)&&(!gbl_err)) {`
622			`chv = getch();`
623			`switch(chv) {`
624			`case 'c': case 'C':`
625			`zip->toggle_cc();`
626			`break;`
627			`case 'g': case 'G':`
628			`m_fpga->writeio(R_ZIPCTRL, CPU_GO);`
629			`// We just released the CPU, so we're now done.`
630			`done = true;`
631			`break;`
632			`case 'l': case 'L': case CTRL('L'):`
633			`redrawwin(stdscr);`
634			`case 'm': case 'M':`
635			`zip->show_user_timers(false);`
636			`break;`
637			`case 'q': case 'Q': case CTRL('C'):`
638			`case KEY_CANCEL: case KEY_CLOSE: case KEY_EXIT:`
639			`case KEY_ESCAPE:`
640			`done = true;`
641			`break;`
642			`case 'r': case 'R':`
643			`zip->reset();`
644			`erase();`
645			`break;`
646			`case 't': case 'T':`
647			`case 's': case 'S':`
648			`zip->step();`
649			`break;`
650			`case 'u': case 'U':`
651			`zip->show_user_timers(true);`
652			`break;`
653			`case '\r': case '\n':`
654			`case KEY_IC: case KEY_ENTER:`
655			`get_value(zip);`
656			`break;`
657			`case KEY_UP:`
658			`zip->cursor_up();`
659			`break;`
660			`case KEY_DOWN:`
661			`zip->cursor_down();`
662			`break;`
663			`case KEY_LEFT:`
664			`zip->cursor_left();`
665			`break;`
666			`case KEY_RIGHT:`
667			`zip->cursor_right();`
668			`break;`
669			`case ERR: case KEY_CLEAR:`
670			`default:`
671			`;`
672			`}`
673
674			`if ((done)\|\|(gbl_err))`
675			`break;`
676			`else if (zip->stalled())`
677			`stall_screen();`
678			`else`
679			`zip->read_state();`
680			`}`
681
682			`endwin();`
683
684			`if (gbl_err) {`
685			`printf("Killed on error: could not access bus!\n");`
686			`exit(-2);`
687			`}`
688			`}`
689