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[/] [openarty/] [trunk/] [sw/] [host/] [zipdbg.cpp] - Blame information for rev 51

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1 31 dgisselq
////////////////////////////////////////////////////////////////////////////////
2
//
3 51 dgisselq
// Filename:    zipdbg.cpp
4 31 dgisselq
//
5
// Project:     OpenArty, an entirely open SoC based upon the Arty platform
6
//
7
// Purpose:     Provide a debugger to step through the ZipCPU assembler,
8
//              evaluate the ZipCPU's current state, modify registers as(if)
9
//      needed, etc.  All of this through the UART port of the Arty board.
10
//
11
//
12
// Creator:     Dan Gisselquist, Ph.D.
13
//              Gisselquist Technology, LLC
14
//
15
////////////////////////////////////////////////////////////////////////////////
16
//
17 51 dgisselq
// Copyright (C) 2015-2017, Gisselquist Technology, LLC
18 31 dgisselq
//
19
// This program is free software (firmware): you can redistribute it and/or
20
// modify it under the terms of  the GNU General Public License as published
21
// by the Free Software Foundation, either version 3 of the License, or (at
22
// your option) any later version.
23
//
24
// This program is distributed in the hope that it will be useful, but WITHOUT
25
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
26
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
27
// for more details.
28
//
29
// You should have received a copy of the GNU General Public License along
30 51 dgisselq
// with this program.  (It's in the $(ROOT)/doc directory.  Run make with no
31 31 dgisselq
// target there if the PDF file isn't present.)  If not, see
32
// <http://www.gnu.org/licenses/> for a copy.
33
//
34
// License:     GPL, v3, as defined and found on www.gnu.org,
35
//              http://www.gnu.org/licenses/gpl.html
36
//
37
//
38
////////////////////////////////////////////////////////////////////////////////
39
//
40
//
41 51 dgisselq
// BUGS:
42
//      - No ability to verify CPU functionality (3rd party simulator)
43
//      - No ability to set/clear breakpoints
44
//
45
//
46 31 dgisselq
#include <stdlib.h>
47
#include <signal.h>
48
#include <time.h>
49
#include <unistd.h>
50
#include <string.h>
51
 
52
#include <ctype.h>
53
#include <ncurses.h>
54
 
55
#include "zopcodes.h"
56
#include "devbus.h"
57
#include "regdefs.h"
58
 
59
#include "port.h"
60
 
61
#define CMD_REG         0
62
#define CMD_DATA        1
63
#define CMD_HALT        (1<<10)
64
#define CMD_STALL       (1<<9)
65
#define CMD_STEP        (1<<8)
66
#define CMD_INT         (1<<7)
67
#define CMD_RESET       (1<<6)
68
 
69
#define KEY_ESCAPE      27
70
#define KEY_RETURN      10
71
#define CTRL(X)         ((X)&0x01f)
72
 
73
class   SPARSEMEM {
74
public:
75
        bool    m_valid;
76
        unsigned int    m_a, m_d;
77
};
78
 
79
bool    gbl_err = false;
80
class   ZIPSTATE {
81
public:
82
        bool            m_valid, m_gie, m_last_pc_valid;
83
        unsigned int    m_sR[16], m_uR[16];
84
        unsigned int    m_p[20];
85
        unsigned int    m_last_pc, m_pc, m_sp;
86
        SPARSEMEM       m_smem[5];
87
        SPARSEMEM       m_imem[5];
88
        ZIPSTATE(void) : m_valid(false), m_last_pc_valid(false) {}
89
 
90
        void    step(void) {
91
                m_last_pc_valid = true;
92
                m_last_pc = m_pc;
93
        }
94
};
95
 
96
// No particular "parameters" need definition or redefinition here.
97
class   ZIPPY : public DEVBUS {
98
        static  const   int     MAXERR;
99
        typedef DEVBUS::BUSW    BUSW;
100
        DEVBUS  *m_fpga;
101
        int     m_cursor;
102
        ZIPSTATE        m_state;
103
        bool    m_user_break, m_show_users_timers, m_show_cc;
104
public:
105
        ZIPPY(DEVBUS *fpga) : m_fpga(fpga), m_cursor(0), m_user_break(false),
106
                m_show_users_timers(false), m_show_cc(false) {}
107
 
108
        void    read_raw_state(void) {
109
                m_state.m_valid = false;
110
                for(int i=0; i<16; i++)
111
                        m_state.m_sR[i] = cmd_read(i);
112
                for(int i=0; i<16; i++)
113
                        m_state.m_uR[i] = cmd_read(i+16);
114
                for(int i=0; i<20; i++)
115
                        m_state.m_p[i]  = cmd_read(i+32);
116
 
117
                m_state.m_gie = (m_state.m_sR[14] & 0x020);
118
                m_state.m_pc  = (m_state.m_gie) ? (m_state.m_uR[15]):(m_state.m_sR[15]);
119
                m_state.m_sp  = (m_state.m_gie) ? (m_state.m_uR[13]):(m_state.m_sR[13]);
120
 
121
                if (m_state.m_last_pc_valid)
122
                        m_state.m_imem[0].m_a = m_state.m_last_pc;
123
                else
124 51 dgisselq
                        m_state.m_imem[0].m_a = m_state.m_pc - 4;
125 31 dgisselq
                try {
126
                        m_state.m_imem[0].m_d = readio(m_state.m_imem[0].m_a);
127
                        m_state.m_imem[0].m_valid = true;
128
                } catch(BUSERR be) {
129
                        m_state.m_imem[0].m_valid = false;
130
                }
131
                m_state.m_imem[1].m_a = m_state.m_pc;
132
                try {
133
                        m_state.m_imem[1].m_d = readio(m_state.m_imem[1].m_a);
134
                        m_state.m_imem[1].m_valid = true;
135
                } catch(BUSERR be) {
136
                        m_state.m_imem[1].m_valid = false;
137
                }
138
 
139
                for(int i=1; i<4; i++) {
140
                        if (!m_state.m_imem[i].m_valid) {
141
                                m_state.m_imem[i+1].m_valid = false;
142 51 dgisselq
                                m_state.m_imem[i+1].m_a = m_state.m_imem[i].m_a+4;
143 31 dgisselq
                                continue;
144
                        }
145
                        m_state.m_imem[i+1].m_a = zop_early_branch(
146
                                        m_state.m_imem[i].m_a,
147
                                        m_state.m_imem[i].m_d);
148
                        try {
149
                                m_state.m_imem[i+1].m_d = readio(m_state.m_imem[i+1].m_a);
150
                                m_state.m_imem[i+1].m_valid = true;
151
                        } catch(BUSERR be) {
152
                                m_state.m_imem[i+1].m_valid = false;
153
                        }
154
                }
155
 
156
                m_state.m_smem[0].m_a = m_state.m_sp;
157
                for(int i=1; i<5; i++)
158 51 dgisselq
                        m_state.m_smem[i].m_a = m_state.m_smem[i-1].m_a+4;
159 31 dgisselq
                for(int i=0; i<5; i++) {
160
                        m_state.m_smem[i].m_valid = true;
161
                        if (m_state.m_smem[i].m_valid)
162
                        try {
163
                                m_state.m_smem[i].m_d = readio(m_state.m_smem[i].m_a);
164
                                m_state.m_smem[i].m_valid = true;
165
                        } catch(BUSERR be) {
166
                                m_state.m_smem[i].m_valid = false;
167
                        }
168
                }
169
                m_state.m_valid = true;
170
        }
171
 
172
        void    kill(void) { m_fpga->kill(); }
173
        void    close(void) { m_fpga->close(); }
174
        void    writeio(const BUSW a, const BUSW v) { m_fpga->writeio(a, v); }
175
        BUSW    readio(const BUSW a) { return m_fpga->readio(a); }
176
        void    readi(const BUSW a, const int len, BUSW *buf) {
177
                return m_fpga->readi(a, len, buf); }
178
        void    readz(const BUSW a, const int len, BUSW *buf) {
179
                return m_fpga->readz(a, len, buf); }
180
        void    writei(const BUSW a, const int len, const BUSW *buf) {
181
                return m_fpga->writei(a, len, buf); }
182
        void    writez(const BUSW a, const int len, const BUSW *buf) {
183
                return m_fpga->writez(a, len, buf); }
184
        bool    poll(void) { return m_fpga->poll(); }
185
        void    usleep(unsigned ms) { m_fpga->usleep(ms); }
186
        void    wait(void) { m_fpga->wait(); }
187
        bool    bus_err(void) const { return m_fpga->bus_err(); }
188
        void    reset_err(void) { m_fpga->reset_err(); }
189
        void    clear(void) { m_fpga->clear(); }
190
 
191
        void    reset(void) { writeio(R_ZIPCTRL, CPU_RESET|CPU_HALT); }
192
        void    step(void) { writeio(R_ZIPCTRL, CPU_STEP); m_state.step(); }
193
        void    go(void) { writeio(R_ZIPCTRL, CPU_GO); }
194
        void    halt(void) {    writeio(R_ZIPCTRL, CPU_HALT); }
195
        bool    stalled(void) { return ((readio(R_ZIPCTRL)&CPU_STALL)==0); }
196
 
197
        void    show_user_timers(bool v) {
198
                m_show_users_timers = v;
199
        }
200
 
201
        void    toggle_cc(void) {
202
                m_show_cc = !m_show_cc;
203
        }
204
 
205
        void    showval(int y, int x, const char *lbl, unsigned int v, bool c) {
206
                if (c)
207
                        mvprintw(y,x, ">%s> 0x%08x<", lbl, v);
208
                else
209
                        mvprintw(y,x, " %s: 0x%08x ", lbl, v);
210
        }
211
 
212
        void    dispreg(int y, int x, const char *n, unsigned int v, bool c) {
213
                // 4,4,8,1 = 17 of 20, +2 = 18
214
                if (c)
215
                        mvprintw(y, x, ">%s> 0x%08x<", n, v);
216
                else
217
                        mvprintw(y, x, " %s: 0x%08x ", n, v);
218
        }
219
 
220 51 dgisselq
        int     showins(int y, const char *lbl, const unsigned int pcidx, bool ignore_a) {
221 31 dgisselq
                char    la[80], lb[80];
222 51 dgisselq
                int     r = y-1, bln = r;
223 31 dgisselq
 
224
                mvprintw(y, 0, "%s0x%08x", lbl, m_state.m_imem[pcidx].m_a);
225
 
226
                if (m_state.m_gie) attroff(A_BOLD);
227
                else    attron(A_BOLD);
228
 
229
                la[0] = '\0';
230
                lb[0] = '\0';
231
                if (m_state.m_imem[pcidx].m_valid) {
232 51 dgisselq
                        zipi_to_double_string(m_state.m_imem[pcidx].m_a,
233
                                m_state.m_imem[pcidx].m_d, la, lb);
234
                        if ((lb[0]=='\0')||(!ignore_a)) {
235
                                printw(" 0x%08x", m_state.m_imem[pcidx].m_d);
236
                                printw("  %-25s", la);
237
                        } if (lb[0]) {
238
                                mvprintw(bln, 0, "%11s", "");
239
                                mvprintw(bln, strlen(lbl)+10+3+8+2, "%-25s", lb);
240 31 dgisselq
                                r--;
241 51 dgisselq
                        } else {
242
                                mvprintw(y-1, 0, "%46s", "");
243 31 dgisselq
                        }
244
                } else {
245
                        printw(" 0x--------  %-25s", "(Bus Error)");
246
                }
247
                attroff(A_BOLD);
248
 
249
                return r;
250
        }
251
 
252
        void    showstack(int y, const char *lbl, const unsigned int idx) {
253
                mvprintw(y, 27+26, "%s%08x ", lbl, m_state.m_smem[idx].m_a);
254
 
255
                if (m_state.m_gie) attroff(A_BOLD);
256
                else    attron(A_BOLD);
257
 
258
                if (m_state.m_smem[idx].m_valid)
259
                        printw("0x%08x", m_state.m_smem[idx].m_d);
260
                else
261
                        printw("(Bus Err)");
262
                attroff(A_BOLD);
263
        }
264
 
265
        unsigned int    cmd_read(unsigned int a) {
266
                int errcount = 0;
267
                unsigned int    s;
268
 
269
                writeio(R_ZIPCTRL, CMD_HALT|(a&0x3f));
270
                while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)
271
                                &&(!m_user_break))
272
                        errcount++;
273
                if (m_user_break) {
274
                        endwin();
275
                        exit(EXIT_SUCCESS);
276
                } else if (errcount >= MAXERR) {
277
                        endwin();
278
                        printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);
279
                        printf("ZIPCTRL = 0x%08x", s);
280
                        if ((s & 0x0200)==0) printf(" STALL");
281
                        if  (s & 0x0400) printf(" HALTED");
282
                        if ((s & 0x03000)==0x01000)
283
                                printf(" SW-HALT");
284
                        else {
285
                                if (s & 0x01000) printf(" SLEEPING");
286
                                if (s & 0x02000) printf(" GIE(UsrMode)");
287
                        } printf("\n");
288
                        exit(EXIT_FAILURE);
289
                }
290
                return readio(R_ZIPDATA);
291
        }
292
 
293
        void    cmd_write(unsigned int a, int v) {
294
                int errcount = 0;
295
                unsigned int    s;
296
 
297
                writeio(R_ZIPCTRL, CMD_HALT|(a&0x3f));
298
                while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)
299
                                &&(!m_user_break))
300
                        errcount++;
301
                if (m_user_break) {
302
                        endwin();
303
                        exit(EXIT_SUCCESS);
304
                } else if (errcount >= MAXERR) {
305
                        endwin();
306
                        printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);
307
                        printf("ZIPCTRL = 0x%08x", s);
308
                        if ((s & 0x0200)==0) printf(" STALL");
309
                        if  (s & 0x0400) printf(" HALTED");
310
                        if ((s & 0x03000)==0x01000)
311
                                printf(" SW-HALT");
312
                        else {
313
                                if (s & 0x01000) printf(" SLEEPING");
314
                                if (s & 0x02000) printf(" GIE(UsrMode)");
315
                        } printf("\n");
316
                        exit(EXIT_FAILURE);
317
                }
318
 
319
                writeio(R_ZIPDATA, (unsigned int)v);
320
        }
321
 
322
        void    read_state(void) {
323
                int     ln= 0;
324
                bool    gie;
325
 
326
                read_raw_state();
327
 
328
                if (m_cursor < 0)
329
                        m_cursor = 0;
330
                else if (m_cursor >= 44)
331
                        m_cursor = 43;
332
 
333
                mvprintw(ln,0, "Peripherals");
334
                mvprintw(ln,30,"%-50s", "CPU State: ");
335
                {
336
                        unsigned int v = readio(R_ZIPCTRL);
337
                        mvprintw(ln,41, "0x%08x ", v);
338
                        // if (v & 0x010000)
339
                                // printw("INT ");
340
                        if ((v & 0x003000) == 0x03000)
341
                                printw("Sleeping ");
342
                        else if (v & 0x001000)
343
                                printw("Halted ");
344
                        else if (v & 0x002000)
345
                                printw("User Mode ");
346
                        else
347
                                printw("Supervisor mode ");
348
                        if (v& 0x0200) {
349
                                v = m_state.m_sR[15];
350
 
351
                        } else printw("Stalled ");
352
                        // if (v & 0x008000)
353
                                // printw("Break-Enabled ");
354
                        // if (v & 0x000080)
355
                                // printw("PIC Enabled ");
356
                } ln++;
357
                showval(ln, 0, "PIC ", m_state.m_p[0], (m_cursor==0));
358
                showval(ln,20, "WDT ", m_state.m_p[1], (m_cursor==1));
359
                showval(ln,40, "WBUS", m_state.m_p[2], (m_cursor==2));
360
                showval(ln,60, "PIC2", m_state.m_p[3], (m_cursor==3));
361
                ln++;
362
                showval(ln, 0, "TMRA", m_state.m_p[4], (m_cursor==4));
363
                showval(ln,20, "TMRB", m_state.m_p[5], (m_cursor==5));
364
                showval(ln,40, "TMRC", m_state.m_p[6], (m_cursor==6));
365
                showval(ln,60, "JIF ", m_state.m_p[7], (m_cursor==7));
366
 
367
                ln++;
368
                if (!m_show_users_timers) {
369
                        showval(ln, 0, "MTSK", m_state.m_p[ 8], (m_cursor==8));
370
                        showval(ln,20, "MOST", m_state.m_p[ 9], (m_cursor==9));
371
                        showval(ln,40, "MPST", m_state.m_p[10], (m_cursor==10));
372
                        showval(ln,60, "MICT", m_state.m_p[11], (m_cursor==11));
373
                } else {
374
                        showval(ln, 0, "UTSK", m_state.m_p[12], (m_cursor==8));
375
                        showval(ln,20, "UMST", m_state.m_p[13], (m_cursor==9));
376
                        showval(ln,40, "UPST", m_state.m_p[14], (m_cursor==10));
377
                        showval(ln,60, "UICT", m_state.m_p[15], (m_cursor==11));
378
                }
379
 
380
                ln++;
381
                ln++;
382
                unsigned int cc = m_state.m_sR[14];
383
                gie = (cc & 0x020);
384
                if (gie)
385
                        attroff(A_BOLD);
386
                else
387
                        attron(A_BOLD);
388
                mvprintw(ln, 0, "Supervisor Registers");
389
                ln++;
390
 
391
                dispreg(ln, 0, "sR0 ", m_state.m_sR[0], (m_cursor==12));
392
                dispreg(ln,20, "sR1 ", m_state.m_sR[1], (m_cursor==13));
393
                dispreg(ln,40, "sR2 ", m_state.m_sR[2], (m_cursor==14));
394
                dispreg(ln,60, "sR3 ", m_state.m_sR[3], (m_cursor==15)); ln++;
395
 
396
                dispreg(ln, 0, "sR4 ", m_state.m_sR[4], (m_cursor==16));
397
                dispreg(ln,20, "sR5 ", m_state.m_sR[5], (m_cursor==17));
398
                dispreg(ln,40, "sR6 ", m_state.m_sR[6], (m_cursor==18));
399
                dispreg(ln,60, "sR7 ", m_state.m_sR[7], (m_cursor==19)); ln++;
400
 
401
                dispreg(ln, 0, "sR8 ", m_state.m_sR[ 8], (m_cursor==20));
402
                dispreg(ln,20, "sR9 ", m_state.m_sR[ 9], (m_cursor==21));
403
                dispreg(ln,40, "sR10", m_state.m_sR[10], (m_cursor==22));
404
                dispreg(ln,60, "sR11", m_state.m_sR[11], (m_cursor==23)); ln++;
405
 
406
                dispreg(ln, 0, "sR12", m_state.m_sR[12], (m_cursor==24));
407
                dispreg(ln,20, "sSP ", m_state.m_sR[13], (m_cursor==25));
408
 
409
                if (m_show_cc) {
410
                        mvprintw(ln,40, " sCC :%16s", "");
411
                        dispreg(ln, 40, "sCC ", m_state.m_sR[14], (m_cursor==26));
412
                } else {
413
                        mvprintw(ln,40, " sCC :%16s", "");
414
                        mvprintw(ln,40, "%ssCC :%s%s%s%s%s%s%s",
415
                                (m_cursor == 26)?">":" ",
416
                                (cc&0x1000)?"FE":"", // Floating point exception
417
                                (cc&0x0800)?"DV":"", // Division by zero
418
                                (cc&0x0400)?"BE":"", // Bus Error
419
                                (cc&0x0200)?"TP":"", // Trap
420
                                (cc&0x0100)?"IL":"", // Illegal instruction
421
                                (cc&0x0080)?"BK":"", // Break
422
                                ((gie==0)&&(cc&0x0010))?"HLT":""); // Halted
423
                        mvprintw(ln,54,"%s%s%s%s",
424
                                (cc&8)?"V":" ",
425
                                (cc&4)?"N":" ",
426
                                (cc&2)?"C":" ",
427
                                (cc&1)?"Z":" ");
428
                }
429
                dispreg(ln,60, "sPC ", m_state.m_sR[15], (m_cursor==27));
430
                ln++;
431
 
432
                if (gie)
433
                        attron(A_BOLD);
434
                else
435
                        attroff(A_BOLD);
436
                mvprintw(ln, 0, "User Registers"); ln++;
437
                dispreg(ln, 0, "uR0 ", m_state.m_uR[0], (m_cursor==28));
438
                dispreg(ln,20, "uR1 ", m_state.m_uR[1], (m_cursor==29));
439
                dispreg(ln,40, "uR2 ", m_state.m_uR[2], (m_cursor==30));
440
                dispreg(ln,60, "uR3 ", m_state.m_uR[3], (m_cursor==31)); ln++;
441
 
442
                dispreg(ln, 0, "uR4 ", m_state.m_uR[4], (m_cursor==32));
443
                dispreg(ln,20, "uR5 ", m_state.m_uR[5], (m_cursor==33));
444
                dispreg(ln,40, "uR6 ", m_state.m_uR[6], (m_cursor==34));
445
                dispreg(ln,60, "uR7 ", m_state.m_uR[7], (m_cursor==35)); ln++;
446
 
447
                dispreg(ln, 0, "uR8 ", m_state.m_uR[8], (m_cursor==36));
448
                dispreg(ln,20, "uR9 ", m_state.m_uR[9], (m_cursor==37));
449
                dispreg(ln,40, "uR10", m_state.m_uR[10], (m_cursor==38));
450
                dispreg(ln,60, "uR11", m_state.m_uR[11], (m_cursor==39)); ln++;
451
 
452
                dispreg(ln, 0, "uR12", m_state.m_uR[12], (m_cursor==40));
453
                dispreg(ln,20, "uSP ", m_state.m_uR[13], (m_cursor==41));
454
                cc = m_state.m_uR[14];
455
                if (m_show_cc) {
456
                        mvprintw(ln,40, " uCC :%16s", "");
457
                        dispreg(ln, 40, "uCC ", m_state.m_uR[14], (m_cursor==42));
458
                } else {
459
                        mvprintw(ln,40, " uCC :%16s", "");
460
                        mvprintw(ln,40, "%suCC :%s%s%s%s%s%s%s",
461
                                (m_cursor == 42)?">":" ",
462
                                (cc&0x1000)?"FE":"", // Floating point Exception
463
                                (cc&0x0800)?"DV":"", // Division by zero
464
                                (cc&0x0400)?"BE":"", // Bus Error
465
                                (cc&0x0200)?"TP":"", // Trap
466
                                (cc&0x0100)?"IL":"", // Illegal instruction
467
                                (cc&0x0040)?"ST":"", // Single-step
468
                                ((gie)&&(cc&0x0010))?"SL":""); // Sleep
469
                        mvprintw(ln,54,"%s%s%s%s",
470
                                (cc&8)?"V":" ",
471
                                (cc&4)?"N":" ",
472
                                (cc&2)?"C":" ",
473
                                (cc&1)?"Z":" ");
474
                }
475
                dispreg(ln,60, "uPC ", m_state.m_uR[15], (m_cursor==43));
476
 
477
                attroff(A_BOLD);
478
                ln+=3;
479
 
480 51 dgisselq
                showins(ln+4, " ", 0, true);
481 31 dgisselq
                {
482
                        int     lclln = ln+3;
483 51 dgisselq
                        for(int i=1; ((i<5)&&(lclln > ln)); i++)
484
                                lclln = showins(lclln, (i==1)?">":" ", i, false);
485 31 dgisselq
                        for(int i=0; i<5; i++)
486
                                showstack(ln+i, (i==0)?">":" ", i);
487
                }
488
        }
489
 
490
        void    cursor_up(void) {
491
                if (m_cursor > 3)
492
                        m_cursor -= 4;
493
        } void  cursor_down(void) {
494
                if (m_cursor < 40)
495
                        m_cursor += 4;
496
        } void  cursor_left(void) {
497
                if (m_cursor > 0)
498
                        m_cursor--;
499
                else    m_cursor = 43;
500
        } void  cursor_right(void) {
501
                if (m_cursor < 43)
502
                        m_cursor++;
503
                else    m_cursor = 0;
504
        }
505
 
506
        int     cursor(void) { return m_cursor; }
507
};
508
 
509
const   int ZIPPY::MAXERR = 100000;
510
 
511
FPGA    *m_fpga;
512
 
513
void    get_value(ZIPPY *zip) {
514
        int     wy, wx, ra;
515
        int     c = zip->cursor();
516
 
517
        wx = (c & 0x03) * 20 + 9 + 1;
518
        wy = (c >> 2);
519
        if (wy >= 3+4)
520
                wy++;
521
        if (wy > 3)
522
                wy += 2;
523
        wy++;
524
 
525
        if (c >= 12)
526
                ra = c - 12;
527
        else
528
                ra = c + 32;
529
 
530
        bool    done = false;
531
        char    str[16];
532
        int     pos = 0; str[pos] = '\0';
533
        attron(A_NORMAL | A_UNDERLINE);
534
        mvprintw(wy, wx, "%-8s", "");
535
        while(!done) {
536
                int     chv = getch();
537
                switch(chv) {
538
                case KEY_ESCAPE:
539
                        pos = 0; str[pos] = '\0'; done = true;
540
                        break;
541
                case KEY_RETURN: case KEY_ENTER: case KEY_UP: case KEY_DOWN:
542
                        done = true;
543
                        break;
544
                case KEY_LEFT: case KEY_BACKSPACE:
545
                        if (pos > 0) pos--;
546
                        break;
547
                case KEY_CLEAR:
548
                        pos = 0;
549
                        break;
550
                case '0': case ' ': str[pos++] = '0'; break;
551
                case '1': str[pos++] = '1'; break;
552
                case '2': str[pos++] = '2'; break;
553
                case '3': str[pos++] = '3'; break;
554
                case '4': str[pos++] = '4'; break;
555
                case '5': str[pos++] = '5'; break;
556
                case '6': str[pos++] = '6'; break;
557
                case '7': str[pos++] = '7'; break;
558
                case '8': str[pos++] = '8'; break;
559
                case '9': str[pos++] = '9'; break;
560
                case 'A': case 'a': str[pos++] = 'A'; break;
561
                case 'B': case 'b': str[pos++] = 'B'; break;
562
                case 'C': case 'c': str[pos++] = 'C'; break;
563
                case 'D': case 'd': str[pos++] = 'D'; break;
564
                case 'E': case 'e': str[pos++] = 'E'; break;
565
                case 'F': case 'f': str[pos++] = 'F'; break;
566
                }
567
 
568
                if (pos > 8)
569
                        pos = 8;
570
                str[pos] = '\0';
571
 
572
                attron(A_NORMAL | A_UNDERLINE);
573
                mvprintw(wy, wx, "%-8s", str);
574
                if (pos > 0) {
575
                        attron(A_NORMAL | A_UNDERLINE | A_BLINK);
576
                        mvprintw(wy, wx+pos-1, "%c", str[pos-1]);
577
                }
578
                attrset(A_NORMAL);
579
        }
580
 
581
        if (pos > 0) {
582
                int     v;
583
                v = strtoul(str, NULL, 16);
584
                zip->cmd_write(ra, v);
585
        }
586
}
587
 
588
void    on_sigint(int v) {
589
        endwin();
590
 
591
        fprintf(stderr, "Interrupted!\n");
592
        exit(-2);
593
}
594
 
595
void    stall_screen(void) {
596
        erase();
597
        mvprintw(0,0, "CPU is stalled.  (Q to quit)\n");
598
}
599
 
600
int     main(int argc, char **argv) {
601
        // FPGAOPEN(m_fpga);
602
        ZIPPY   *zip; //
603
 
604
        FPGAOPEN(m_fpga);
605
        zip = new ZIPPY(m_fpga);
606
 
607 51 dgisselq
        try {
608 31 dgisselq
 
609 51 dgisselq
                initscr();
610
                raw();
611
                noecho();
612
                keypad(stdscr, true);
613 31 dgisselq
 
614 51 dgisselq
                signal(SIGINT, on_sigint);
615 31 dgisselq
 
616 51 dgisselq
                int     chv;
617
                bool    done = false;
618 31 dgisselq
 
619 51 dgisselq
                zip->halt();
620
                for(int i=0; (i<5)&&(zip->stalled()); i++)
621 31 dgisselq
                        ;
622 51 dgisselq
                if (!zip->stalled())
623
                        zip->read_state();
624
                else
625
                        stall_screen();
626
                while((!done)&&(!gbl_err)) {
627
                        chv = getch();
628
                        switch(chv) {
629
                        case 'c': case 'C':
630
                                zip->toggle_cc();
631
                                break;
632
                        case 'g': case 'G':
633
                                m_fpga->writeio(R_ZIPCTRL, CPU_GO);
634
                                // We just released the CPU, so we're now done.
635
                                done = true;
636
                                break;
637
                        case 'l': case 'L': case CTRL('L'):
638
                                redrawwin(stdscr);
639
                        case 'm': case 'M':
640
                                zip->show_user_timers(false);
641
                                break;
642
                        case 'q': case 'Q': case CTRL('C'):
643
                        case KEY_CANCEL: case KEY_CLOSE: case KEY_EXIT:
644
                        case KEY_ESCAPE:
645
                                done = true;
646
                                break;
647
                        case 'r': case 'R':
648
                                zip->reset();
649
                                erase();
650
                                break;
651
                        case 't': case 'T':
652
                        case 's': case 'S':
653
                                zip->step();
654
                                break;
655
                        case 'u': case 'U':
656
                                zip->show_user_timers(true);
657
                                break;
658
                        case '\r': case  '\n':
659
                        case KEY_IC: case KEY_ENTER:
660
                                get_value(zip);
661
                                break;
662
                        case KEY_UP:
663
                                zip->cursor_up();
664
                                break;
665
                        case KEY_DOWN:
666
                                zip->cursor_down();
667
                                break;
668
                        case KEY_LEFT:
669
                                zip->cursor_left();
670
                                break;
671
                        case KEY_RIGHT:
672
                                zip->cursor_right();
673
                                break;
674
                        case ERR: case KEY_CLEAR:
675
                        default:
676
                                ;
677
                        }
678
 
679
                        if ((done)||(gbl_err))
680
                                break;
681
                        else if (zip->stalled())
682
                                stall_screen();
683
                        else
684
                                zip->read_state();
685 31 dgisselq
                }
686 51 dgisselq
        } catch(const char *err) {
687
                fprintf(stderr, "ERR: Caught exception -- %s", err);
688
        } catch(...) {
689
                fprintf(stderr, "ERR: Caught anonymous exception!!\n");
690 31 dgisselq
        }
691
 
692
        endwin();
693
 
694
        if (gbl_err) {
695
                printf("Killed on error: could not access bus!\n");
696
                exit(-2);
697
        }
698
}
699
 

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