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[/] [openarty/] [trunk/] [sw/] [host/] [zipstate.cpp] - Blame information for rev 34

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Line No. Rev Author Line
1 31 dgisselq
////////////////////////////////////////////////////////////////////////////////
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//
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// Filename:    zipstate.cpp
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//
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// Project:     OpenArty, an entirely open SoC based upon the Arty platform
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//
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// Purpose:     To get a quick (understandable) peek at what the ZipCPU
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//              is up to without stopping the CPU.  This is basically
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//      identical to a "wbregs cpu" command, save that the bit fields of the
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//      result are broken out into something more human readable.
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//
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//
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// Creator:     Dan Gisselquist, Ph.D.
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//              Gisselquist Technology, LLC
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of  the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program.  (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.)  If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License:     GPL, v3, as defined and found on www.gnu.org,
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//              http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <strings.h>
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#include <ctype.h>
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#include <string.h>
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#include <signal.h>
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#include <assert.h>
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#include "port.h"
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#include "llcomms.h"
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#include "regdefs.h"
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FPGA    *m_fpga;
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void    closeup(int v) {
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        m_fpga->kill();
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        exit(0);
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}
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unsigned int    cmd_read(FPGA *fpga, int r) {
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        const unsigned int      MAXERR = 1000;
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        unsigned int    errcount = 0;
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        unsigned int    s;
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        fpga->writeio(R_ZIPCTRL, CPU_HALT|(r&0x03f));
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        while((((s = fpga->readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR))
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                errcount++;
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        if (errcount >= MAXERR) {
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                printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%02x)\n",
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                        errcount, r);
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                printf("ZIPCTRL = 0x%08x", s);
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                if ((s & 0x0200)==0) printf(" STALL");
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                if  (s & 0x0400)     printf(" HALTED");
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                if ((s & 0x03000)==0x01000)
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                        printf(" SW-HALT");
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                else {
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                        if (s & 0x01000) printf(" SLEEPING");
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                        if (s & 0x02000) printf(" GIE(UsrMode)");
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                } printf("\n");
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                exit(EXIT_FAILURE);
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        } return fpga->readio(R_ZIPDATA);
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}
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void    usage(void) {
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        printf("USAGE: zipstate\n");
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}
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int main(int argc, char **argv) {
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        int     skp=0, port = FPGAPORT;
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        bool    long_state = false;
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        unsigned int    v;
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        skp=1;
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        for(int argn=0; argn<argc-skp; argn++) {
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                if (argv[argn+skp][0] == '-') {
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                        if (argv[argn+skp][1] == 'l')
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                                long_state = true;
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                        skp++; argn--;
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                } else
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                        argv[argn] = argv[argn+skp];
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        } argc -= skp;
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        FPGAOPEN(m_fpga);
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        if (!long_state) {
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                v = m_fpga->readio(R_ZIPCTRL);
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                printf("0x%08x: ", v);
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                if (v & 0x0080) printf("PINT ");
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                // if (v & 0x0100) printf("STEP "); // self resetting
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                if((v & 0x00200)==0) printf("STALL ");
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                if (v & 0x00400) printf("HALTED ");
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                if((v & 0x03000)==0x01000) {
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                        printf("SW-HALT");
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                } else {
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                        if (v & 0x01000) printf("SLEEPING ");
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                        if (v & 0x02000) printf("GIE(UsrMode) ");
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                }
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                // if (v & 0x0800) printf("CLR-CACHE ");
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                printf("\n");
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        } else {
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                printf("Reading the long-state ...\n");
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                for(int i=0; i<14; i++) {
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                        printf("sR%-2d: 0x%08x ", i, cmd_read(m_fpga, i));
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                        if ((i&3)==3)
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                                printf("\n");
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                } printf("sCC : 0x%08x ", cmd_read(m_fpga, 14));
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                printf("sPC : 0x%08x ", cmd_read(m_fpga, 15));
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                printf("\n\n");
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                for(int i=0; i<14; i++) {
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                        printf("uR%-2d: 0x%08x ", i, cmd_read(m_fpga, i+16));
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                        if ((i&3)==3)
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                                printf("\n");
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                } printf("uCC : 0x%08x ", cmd_read(m_fpga, 14+16));
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                printf("uPC : 0x%08x ", cmd_read(m_fpga, 15+16));
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                printf("\n\n");
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        }
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        delete  m_fpga;
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}
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