OpenCores
URL https://opencores.org/ocsvn/opencpu32/opencpu32/trunk

Subversion Repositories opencpu32

[/] [opencpu32/] [trunk/] [hdl/] [opencpu32/] [Alu.vhd] - Blame information for rev 17

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 5 leonardoar
--! @file
2
--! @brief Arithmetic logic unit http://en.wikipedia.org/wiki/Arithmetic_logic_unit
3
 
4 8 leonardoar
--! Use standard library and import the packages (std_logic_1164,std_logic_unsigned,std_logic_arith)
5 5 leonardoar
library IEEE;
6 8 leonardoar
use ieee.std_logic_1164.all;
7
use ieee.std_logic_unsigned.all;
8
use ieee.std_logic_arith.all;
9 5 leonardoar
 
10
--! Use CPU Definitions package
11 8 leonardoar
use work.pkgOpenCPU32.all;
12 5 leonardoar
 
13
--! ALU is a digital circuit that performs arithmetic and logical operations.
14
 
15
--! ALU is a digital circuit that performs arithmetic and logical operations. It's the fundamental part of the CPU
16
entity Alu is
17 9 leonardoar
    generic (n : integer := nBits - 1);                                 --! Generic value (Used to easily change the size of the Alu on the package)
18 8 leonardoar
         Port ( A : in  STD_LOGIC_VECTOR (n downto 0);           --! Alu Operand 1
19
           B : in  STD_LOGIC_VECTOR (n downto 0);                --! Alu Operand 2
20
           S : out  STD_LOGIC_VECTOR (n downto 0);               --! Alu Output
21
           sel : in  aluOps);                                                                   --! Select operation
22 5 leonardoar
end Alu;
23
 
24 9 leonardoar
--! @brief Arithmetic logic unit, refer to this page for more information http://en.wikipedia.org/wiki/Arithmetic_logic_unit
25
--! @details This circuit will be excited by the control unit to perfom some arithimetic, or logic operation (Depending on the opcode selected)
26 10 leonardoar
--! \n You can see some samples on the Internet: http://www.vlsibank.com/sessionspage.asp?titl_id=12222
27 5 leonardoar
architecture Behavioral of Alu is
28
 
29
begin
30 9 leonardoar
        --! Behavior description of combinational circuit (Can not infer any FF(Flip flop)) of the Alu
31 8 leonardoar
        process (A,B,sel) is
32 17 leonardoar
        variable mulResult : std_logic_vector(((nBits*2) - 1)downto 0);
33 8 leonardoar
        begin
34
                case sel is
35 16 leonardoar
                        when alu_pass =>
36
                                --Pass operation
37
                                S <= A;
38
 
39 8 leonardoar
                        when alu_sum =>
40 9 leonardoar
                                --Sum operation
41 8 leonardoar
                                S <= A + B;
42
 
43
                        when alu_sub =>
44 9 leonardoar
                                --Subtraction operation
45 8 leonardoar
                                S <= A - B;
46
 
47
                        when alu_inc =>
48 9 leonardoar
                                --Increment operation
49
                                S <= A + conv_std_logic_vector(1, n+1);
50 8 leonardoar
 
51
                        when alu_dec =>
52 9 leonardoar
                                --Decrement operation
53
                                S <= A - conv_std_logic_vector(1, n+1);
54
 
55
                        when alu_mul =>
56
                                --Multiplication operation
57 17 leonardoar
                                mulResult := A * B;
58
                                S <= mulResult((nBits - 1) downto 0);
59 8 leonardoar
 
60
                        when alu_and =>
61 9 leonardoar
                                --And operation
62 8 leonardoar
                                S <= A and B;
63
 
64
                        when alu_or =>
65 9 leonardoar
                                --Or operation
66 8 leonardoar
                                S <= A or B;
67
 
68
                        when alu_xor =>
69 9 leonardoar
                                --Xor operation
70
                                S <= A xor B;
71
 
72
                        when alu_not =>
73
                                --Not operation
74
                                S <= not A;
75 8 leonardoar
 
76
                        when others =>
77
                                S <= (others => 'Z');
78
                end case;
79
        end process;
80 5 leonardoar
 
81
end Behavioral;
82
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.