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[/] [opencpu32/] [trunk/] [hdl/] [opencpu32/] [Alu.vhd] - Blame information for rev 27

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--! @file
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--! @brief Arithmetic logic unit http://en.wikipedia.org/wiki/Arithmetic_logic_unit
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--! Use standard library and import the packages (std_logic_1164,std_logic_unsigned,std_logic_arith)
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library IEEE;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_arith.all;
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--! Use CPU Definitions package
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use work.pkgOpenCPU32.all;
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--! ALU is a digital circuit that performs arithmetic and logical operations.
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--! ALU is a digital circuit that performs arithmetic and logical operations. It's the fundamental part of the CPU
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entity Alu is
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    generic (n : integer := nBits - 1);                                 --! Generic value (Used to easily change the size of the Alu on the package)
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         Port ( A : in  STD_LOGIC_VECTOR (n downto 0);           --! Alu Operand 1
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           B : in  STD_LOGIC_VECTOR (n downto 0);                --! Alu Operand 2
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           S : out  STD_LOGIC_VECTOR (n downto 0);               --! Alu Output
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           sel : in  aluOps);                                                                   --! Select operation
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end Alu;
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--! @brief Arithmetic logic unit, refer to this page for more information http://en.wikipedia.org/wiki/Arithmetic_logic_unit
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--! @details This circuit will be excited by the control unit to perfom some arithimetic, or logic operation (Depending on the opcode selected)
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--! \n You can see some samples on the Internet: http://www.vlsibank.com/sessionspage.asp?titl_id=12222
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architecture Behavioral of Alu is
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begin
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        --! Behavior description of combinational circuit (Can not infer any FF(Flip flop)) of the Alu
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        process (A,B,sel) is
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        variable mulResult : std_logic_vector(((nBits*2) - 1)downto 0);
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        begin
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                case sel is
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                        when alu_pass =>
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                                --Pass operation
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                                S <= A;
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                        when alu_passB =>
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                                --Pass operation
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                                S <= B;
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                        when alu_sum =>
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                                --Sum operation
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                                S <= A + B;
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                        when alu_sub =>
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                                --Subtraction operation
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                                S <= A - B;
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                        when alu_inc =>
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                                --Increment operation
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                                S <= A + conv_std_logic_vector(1, n+1);
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                        when alu_dec =>
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                                --Decrement operation
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                                S <= A - conv_std_logic_vector(1, n+1);
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                        when alu_mul =>
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                                --Multiplication operation
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                                mulResult := A * B;
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                                S <= mulResult((nBits - 1) downto 0);
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                        when alu_and =>
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                                --And operation
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                                S <= A and B;
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                        when alu_or =>
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                                --Or operation
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                                S <= A or B;
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                        when alu_xor =>
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                                --Xor operation
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                                S <= A xor B;
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                        when alu_not =>
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                                --Not operation
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                                S <= not A;
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                        when others =>
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                                S <= (others => 'Z');
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                end case;
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        end process;
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end Behavioral;
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