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leonardoar |
--! @file
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--! @brief ControlUnit http://en.wikipedia.org/wiki/Control_unit
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--! Use standard library and import the packages (std_logic_1164,std_logic_unsigned,std_logic_arith)
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library IEEE;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_arith.all;
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--! Use CPU Definitions package
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use work.pkgOpenCPU32.all;
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--! The control unit coordinates the input and output devices of a computer system. It fetches the code of all of the instructions \n
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--! in the microprograms. It directs the operation of the other units by providing timing and control signals. \n
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--! all computer resources are managed by the Control Unit.It directs the flow of data between the cpu and the other devices.\n
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--! The outputs of the control unit control the activity of the rest of the device. A control unit can be thought of as a finite-state machine.
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--! The purpose of datapaths is to provide routes for data to travel between functional units.
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entity ControlUnit is
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Port ( reset : in STD_LOGIC;
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clk : in STD_LOGIC;
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FlagsDp : in STD_LOGIC_VECTOR (7 downto 0);
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DataDp : in STD_LOGIC_VECTOR (7 downto 0);
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MuxDp : out STD_LOGIC_VECTOR (2 downto 0);
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ImmDp : out STD_LOGIC_VECTOR (7 downto 0);
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DpRegFileWriteAddr : out STD_LOGIC;
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DpRegFileWriteEn : out STD_LOGIC;
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DpRegFileReadAddrA : out STD_LOGIC;
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DpRegFileReadAddrB : out STD_LOGIC;
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DpRegFileReadEnA : out STD_LOGIC;
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DpRegFileReadEnB : out STD_LOGIC;
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MemoryDataInput : in STD_LOGIC_VECTOR (7 downto 0);
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MemoryDataAddr : out STD_LOGIC_VECTOR (7 downto 0);
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MemoryDataOut : out STD_LOGIC_VECTOR (7 downto 0));
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end ControlUnit;
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--! @brief ControlUnit http://en.wikipedia.org/wiki/Control_unit
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--! @details The control unit receives external instructions or commands which it converts into a sequence of control signals that the control \n
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--! unit applies to data path to implement a sequence of register-transfer level operations.
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architecture Behavioral of ControlUnit is
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begin
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end Behavioral;
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