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juko |
/*
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* .--------------. .----------------. .------------.
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* | .------------. | .--------------. | .----------. |
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* | | ____ ____ | | | ____ ____ | | | ______ | |
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* | ||_ || _|| | ||_ \ / _|| | | .' ___ || |
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* ___ _ __ ___ _ __ | | | |__| | | | | | \/ | | | |/ .' \_|| |
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* / _ \| '_ \ / _ \ '_ \ | | | __ | | | | | |\ /| | | | || | | |
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* (_) | |_) | __/ | | || | _| | | |_ | | | _| |_\/_| |_ | | |\ `.___.'\| |
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* \___/| .__/ \___|_| |_|| ||____||____|| | ||_____||_____|| | | `._____.'| |
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* | | | | | | | | | | | |
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* |_| | '------------' | '--------------' | '----------' |
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* '--------------' '----------------' '------------'
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*
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* openHMC - An Open Source Hybrid Memory Cube Controller
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* (C) Copyright 2014 Computer Architecture Group - University of Heidelberg
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* www.ziti.uni-heidelberg.de
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* B6, 26
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* 68159 Mannheim
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* Germany
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*
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* Contact: openhmc@ziti.uni-heidelberg.de
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* http://ra.ziti.uni-heidelberg.de/openhmc
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*
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* This source file is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This source file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this source file. If not, see <http://www.gnu.org/licenses/>.
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*
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*
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* Module name: hmc_controller_top
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*
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*/
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`default_nettype none
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module openhmc_top #(
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//Define width of the datapath
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parameter LOG_FPW = 2, //Legal Values: 1,2,3
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parameter FPW = 4, //Legal Values: 2,4,6,8
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parameter DWIDTH = FPW*128, //Leave untouched
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//Define HMC interface width
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parameter LOG_NUM_LANES = 3, //Set 3 for half-width, 4 for full-width
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parameter NUM_LANES = 2**LOG_NUM_LANES, //Leave untouched
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parameter NUM_DATA_BYTES = FPW*16, //Leave untouched
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//Define width of the register file
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parameter HMC_RF_WWIDTH = 64,
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parameter HMC_RF_RWIDTH = 64,
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parameter HMC_RF_AWIDTH = 4,
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//Configure the Functionality
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parameter LOG_MAX_RTC = 8, //Set the depth of the RX input buffer. Must be >= LOG(rf_rx_buffer_rtc) in the RF
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parameter HMC_RX_AC_COUPLED = 1, //Set to 0 to remove the run length limiter, saves logic and 1 cycle delay
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parameter CTRL_LANE_POLARITY = 1, //Set to 0 if lane polarity is not applicable or performed by the transceivers, saves logic and 1 cycle delay
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parameter CTRL_LANE_REVERSAL = 1, //Set to 0 if lane reversal is not applicable or performed by the transceivers, saves logic
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//Set the direction of bitslip. Set to 1 if bitslip performs a shift right, otherwise set to 0 (see the corresponding transceiver user guide)
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parameter BITSLIP_SHIFT_RIGHT = 1,
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//Debug Params
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parameter DBG_RX_TOKEN_MON = 1 //Remove the RX Link token monitor, saves logic
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) (
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//----------------------------------
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//----SYSTEM INTERFACES
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//----------------------------------
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input wire clk_user,
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input wire clk_hmc,
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input wire res_n_user,
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input wire res_n_hmc,
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//----------------------------------
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//----Connect AXI Ports
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//----------------------------------
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//From AXI to HMC Ctrl TX
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input wire s_axis_tx_TVALID,
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output wire s_axis_tx_TREADY,
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input wire [DWIDTH-1:0] s_axis_tx_TDATA,
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input wire [NUM_DATA_BYTES-1:0] s_axis_tx_TUSER,
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//From HMC Ctrl RX to AXI
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output wire m_axis_rx_TVALID,
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input wire m_axis_rx_TREADY,
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output wire [DWIDTH-1:0] m_axis_rx_TDATA,
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output wire [NUM_DATA_BYTES-1:0] m_axis_rx_TUSER,
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//----------------------------------
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//----Connect Transceiver
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//----------------------------------
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output wire [DWIDTH-1:0] phy_data_tx_link2phy,
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input wire [DWIDTH-1:0] phy_data_rx_phy2link,
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output wire [NUM_LANES-1:0] phy_bit_slip,
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output wire [NUM_LANES-1:0] phy_lane_polarity, //All 0 if CTRL_LANE_POLARITY=1
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input wire phy_ready,
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//----------------------------------
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//----Connect HMC
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//----------------------------------
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output wire P_RST_N,
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output wire hmc_LxRXPS,
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input wire hmc_LxTXPS,
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input wire FERR_N, //Not connected
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//----------------------------------
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//----Connect RF
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//----------------------------------
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input wire [HMC_RF_AWIDTH-1:0] rf_address,
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output wire [HMC_RF_RWIDTH-1:0] rf_read_data,
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output wire rf_invalid_address,
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output wire rf_access_complete,
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input wire rf_read_en,
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input wire rf_write_en,
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input wire [HMC_RF_WWIDTH-1:0] rf_write_data
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);
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//=====================================================================================================
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//-----------------------------------------------------------------------------------------------------
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//---------WIRING AND SIGNAL STUFF---------------------------------------------------------------------
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//-----------------------------------------------------------------------------------------------------
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//=====================================================================================================
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// ----Assign AXI interface wires
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wire [4*FPW-1:0] m_axis_rx_TUSER_temp;
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assign m_axis_rx_TUSER = {{NUM_DATA_BYTES-(4*FPW){1'b0}}, m_axis_rx_TUSER_temp};
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wire s_axis_tx_TREADY_n;
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assign s_axis_tx_TREADY = ~s_axis_tx_TREADY_n;
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wire m_axis_rx_TVALID_n;
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assign m_axis_rx_TVALID = ~m_axis_rx_TVALID_n;
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// ----TX FIFO Wires
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wire [DWIDTH-1:0] tx_d_in_data;
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wire tx_shift_out;
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wire tx_empty;
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wire tx_a_empty;
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wire [3*FPW-1:0] tx_d_in_ctrl;
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// ----RX FIFO Wires
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wire [DWIDTH-1:0] rx_d_in_data;
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wire rx_shift_in;
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wire rx_full;
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wire rx_a_full;
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wire [4*FPW-1:0] rx_d_in_ctrl;
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// ----RX LINK TO TX LINK
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wire rx2tx_link_retry;
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wire rx2tx_error_abort_mode;
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wire rx2tx_error_abort_mode_cleared;
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wire [7:0] rx2tx_hmc_frp;
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wire [7:0] rx2tx_rrp;
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wire [7:0] rx2tx_returned_tokens;
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wire [LOG_FPW:0] rx2tx_hmc_tokens_to_return;
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wire [LOG_FPW:0] rx2tx_hmc_poisoned_tokens_to_return;
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// ----Register File
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//Counter
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wire rf_cnt_retry;
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wire rf_run_length_bit_flip;
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wire rf_error_abort_not_cleared;
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wire [HMC_RF_RWIDTH-1:0] rf_cnt_poisoned;
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wire [HMC_RF_RWIDTH-1:0] rf_cnt_p;
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wire [HMC_RF_RWIDTH-1:0] rf_cnt_np;
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wire [HMC_RF_RWIDTH-1:0] rf_cnt_r;
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wire [HMC_RF_RWIDTH-1:0] rf_cnt_rsp_rcvd;
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//Status
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wire [1:0] rf_link_status;
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wire [2:0] rf_hmc_init_status;
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wire [1:0] rf_tx_init_status;
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wire [9:0] rf_hmc_tokens_av;
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wire [9:0] rf_rx_tokens_av;
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wire rf_hmc_sleep;
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//Init Status
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wire rf_all_descramblers_aligned;
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wire [NUM_LANES-1:0] rf_descrambler_aligned;
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wire [NUM_LANES-1:0] rf_descrambler_part_aligned;
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//Control
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wire [5:0] rf_bit_slip_time;
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wire rf_hmc_init_cont_set;
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wire rf_set_hmc_sleep;
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wire rf_scrambler_disable;
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wire [NUM_LANES-1:0] rf_lane_polarity;
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wire [NUM_LANES-1:0] rf_descramblers_locked;
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wire [9:0] rf_rx_buffer_rtc;
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wire rf_lane_reversal_detected;
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wire [4:0] rf_irtry_received_threshold;
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wire [4:0] rf_irtry_to_send;
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wire rf_run_length_enable;
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wire [2:0] rf_first_cube_ID;
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//Debug
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wire rf_dbg_dont_send_tret;
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wire rf_dbg_halt_on_error_abort;
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wire rf_dbg_halt_on_tx_retry;
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// ----Assign PHY wires
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assign phy_lane_polarity = (CTRL_LANE_POLARITY==1) ? {NUM_LANES{1'b0}} : rf_lane_polarity;
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//=====================================================================================================
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//-----------------------------------------------------------------------------------------------------
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//---------INSTANTIATIONS HERE-------------------------------------------------------------------------
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//-----------------------------------------------------------------------------------------------------
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//=====================================================================================================
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//----------------------------------------------------------------------
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//-----TX-----TX-----TX-----TX-----TX-----TX-----TX-----TX-----TX-----TX
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//----------------------------------------------------------------------
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openhmc_async_fifo #(
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.DWIDTH(DWIDTH+(FPW*3)),
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.ENTRIES(16)
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) fifo_tx_data (
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//System
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.si_clk(clk_user),
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.so_clk(clk_hmc),
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.si_res_n(res_n_user),
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.so_res_n(res_n_hmc),
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//From AXI-4 TX IF
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.d_in({s_axis_tx_TUSER[(FPW*3)-1:0],s_axis_tx_TDATA}),
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.shift_in(s_axis_tx_TVALID && s_axis_tx_TREADY),
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.full(s_axis_tx_TREADY_n),
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.almost_full(),
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//To TX Link Logic
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.d_out({tx_d_in_ctrl,tx_d_in_data}),
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.shift_out(tx_shift_out),
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.empty(tx_empty),
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.almost_empty(tx_a_empty)
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);
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tx_link #(
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.LOG_FPW(LOG_FPW),
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.FPW(FPW),
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.NUM_LANES(NUM_LANES),
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.HMC_PTR_SIZE(8),
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.HMC_RF_RWIDTH(HMC_RF_RWIDTH),
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.HMC_RX_AC_COUPLED(HMC_RX_AC_COUPLED),
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//Debug
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.DBG_RX_TOKEN_MON(DBG_RX_TOKEN_MON)
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) tx_link_I(
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//----------------------------------
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//----SYSTEM INTERFACE
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//----------------------------------
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.clk(clk_hmc),
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.res_n(res_n_hmc),
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//----------------------------------
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//----TO HMC PHY
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//----------------------------------
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.phy_scrambled_data_out(phy_data_tx_link2phy),
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//----------------------------------
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//----HMC IF
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//----------------------------------
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.hmc_LxRXPS(hmc_LxRXPS),
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.hmc_LxTXPS(hmc_LxTXPS),
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//----------------------------------
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//----FROM HMC_TX_HTAX_LOGIC
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//----------------------------------
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.d_in_data(tx_d_in_data),
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.d_in_flit_is_valid(tx_d_in_ctrl[FPW-1:0]),
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.d_in_flit_is_hdr(tx_d_in_ctrl[(2*FPW)-1:1*FPW]),
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.d_in_flit_is_tail(tx_d_in_ctrl[(3*FPW)-1:(2*FPW)]),
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.d_in_empty(tx_empty),
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.d_in_a_empty(tx_a_empty),
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.d_in_shift_out(tx_shift_out),
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//----------------------------------
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//----RX Block
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//----------------------------------
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.rx_force_tx_retry(rx2tx_link_retry),
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.rx_error_abort_mode(rx2tx_error_abort_mode),
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.rx_error_abort_mode_cleared(rx2tx_error_abort_mode_cleared),
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.rx_hmc_frp(rx2tx_hmc_frp),
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.rx_rrp(rx2tx_rrp),
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.rx_returned_tokens(rx2tx_returned_tokens),
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.rx_hmc_tokens_to_return(rx2tx_hmc_tokens_to_return),
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.rx_hmc_poisoned_tokens_to_return(rx2tx_hmc_poisoned_tokens_to_return),
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//----------------------------------
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//----RF
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//----------------------------------
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//Monitoring 1-cycle set to increment
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.rf_cnt_retry(rf_cnt_retry),
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.rf_sent_p(rf_cnt_p),
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.rf_sent_np(rf_cnt_np),
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.rf_sent_r(rf_cnt_r),
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.rf_run_length_bit_flip(rf_run_length_bit_flip),
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.rf_error_abort_not_cleared(rf_error_abort_not_cleared),
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//Status
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.rf_hmc_is_in_sleep(rf_hmc_sleep),
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.rf_hmc_received_init_null(rf_hmc_init_status[0]),
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.rf_link_is_up(rf_link_status[1]),
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.rf_descramblers_aligned(rf_all_descramblers_aligned),
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.rf_tx_init_status(rf_tx_init_status),
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.rf_hmc_tokens_av(rf_hmc_tokens_av),
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.rf_rx_tokens_av(rf_rx_tokens_av),
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//Control
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.rf_hmc_sleep_requested(rf_set_hmc_sleep),
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.rf_hmc_init_cont_set(rf_hmc_init_cont_set),
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.rf_scrambler_disable(rf_scrambler_disable),
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.rf_rx_buffer_rtc(rf_rx_buffer_rtc),
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.rf_first_cube_ID(rf_first_cube_ID),
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.rf_irtry_to_send(rf_irtry_to_send),
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.rf_run_length_enable(rf_run_length_enable),
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//Debug
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|
|
.rf_dbg_dont_send_tret(rf_dbg_dont_send_tret),
|
312 |
|
|
.rf_dbg_halt_on_error_abort(rf_dbg_halt_on_error_abort),
|
313 |
|
|
.rf_dbg_halt_on_tx_retry(rf_dbg_halt_on_tx_retry)
|
314 |
|
|
|
315 |
|
|
);
|
316 |
|
|
|
317 |
|
|
//----------------------------------------------------------------------
|
318 |
|
|
//-----RX-----RX-----RX-----RX-----RX-----RX-----RX-----RX-----RX-----RX
|
319 |
|
|
//----------------------------------------------------------------------
|
320 |
|
|
rx_link #(
|
321 |
|
|
.LOG_FPW(LOG_FPW),
|
322 |
|
|
.FPW(FPW),
|
323 |
|
|
.LOG_NUM_LANES(LOG_NUM_LANES),
|
324 |
|
|
.HMC_RF_RWIDTH(HMC_RF_RWIDTH),
|
325 |
|
|
//Configure the functionality
|
326 |
|
|
.LOG_MAX_RTC(LOG_MAX_RTC),
|
327 |
|
|
.CTRL_LANE_POLARITY(CTRL_LANE_POLARITY),
|
328 |
|
|
.CTRL_LANE_REVERSAL(CTRL_LANE_REVERSAL),
|
329 |
|
|
.BITSLIP_SHIFT_RIGHT(BITSLIP_SHIFT_RIGHT)
|
330 |
|
|
) rx_link_I (
|
331 |
|
|
|
332 |
|
|
//----------------------------------
|
333 |
|
|
//----SYSTEM INTERFACE
|
334 |
|
|
//----------------------------------
|
335 |
|
|
.clk(clk_hmc),
|
336 |
|
|
.res_n(res_n_hmc),
|
337 |
|
|
|
338 |
|
|
//----------------------------------
|
339 |
|
|
//----TO HMC PHY
|
340 |
|
|
//----------------------------------
|
341 |
|
|
.phy_scrambled_data_in(phy_data_rx_phy2link),
|
342 |
|
|
.init_bit_slip(phy_bit_slip),
|
343 |
|
|
|
344 |
|
|
//----------------------------------
|
345 |
|
|
//----FROM TO RX HTAX FIFO
|
346 |
|
|
//----------------------------------
|
347 |
|
|
.d_out_fifo_data(rx_d_in_data),
|
348 |
|
|
.d_out_fifo_full(rx_full),
|
349 |
|
|
.d_out_fifo_a_full(rx_a_full),
|
350 |
|
|
.d_out_fifo_shift_in(rx_shift_in),
|
351 |
|
|
.d_out_fifo_ctrl(rx_d_in_ctrl),
|
352 |
|
|
|
353 |
|
|
//----------------------------------
|
354 |
|
|
//----TO TX Block
|
355 |
|
|
//----------------------------------
|
356 |
|
|
.tx_link_retry(rx2tx_link_retry),
|
357 |
|
|
.tx_error_abort_mode(rx2tx_error_abort_mode),
|
358 |
|
|
.tx_error_abort_mode_cleared(rx2tx_error_abort_mode_cleared),
|
359 |
|
|
.tx_hmc_frp(rx2tx_hmc_frp),
|
360 |
|
|
.tx_rrp(rx2tx_rrp),
|
361 |
|
|
.tx_returned_tokens(rx2tx_returned_tokens),
|
362 |
|
|
.tx_hmc_tokens_to_return(rx2tx_hmc_tokens_to_return),
|
363 |
|
|
.tx_hmc_poisoned_tokens_to_return(rx2tx_hmc_poisoned_tokens_to_return),
|
364 |
|
|
|
365 |
|
|
//----------------------------------
|
366 |
|
|
//----RF
|
367 |
|
|
//----------------------------------
|
368 |
|
|
//Monitoring 1-cycle set to increment
|
369 |
|
|
.rf_cnt_poisoned(rf_cnt_poisoned),
|
370 |
|
|
.rf_cnt_rsp(rf_cnt_rsp_rcvd),
|
371 |
|
|
//Status
|
372 |
|
|
.rf_link_status(rf_link_status),
|
373 |
|
|
.rf_hmc_init_status(rf_hmc_init_status),
|
374 |
|
|
.rf_hmc_sleep(rf_hmc_sleep),
|
375 |
|
|
//Init Status
|
376 |
|
|
.rf_all_descramblers_aligned(rf_all_descramblers_aligned),
|
377 |
|
|
.rf_descrambler_aligned(rf_descrambler_aligned),
|
378 |
|
|
.rf_descrambler_part_aligned(rf_descrambler_part_aligned),
|
379 |
|
|
.rf_descramblers_locked(rf_descramblers_locked),
|
380 |
|
|
.rf_tx_sends_ts1(rf_tx_init_status[1] && !rf_tx_init_status[0]),
|
381 |
|
|
//Control
|
382 |
|
|
.rf_bit_slip_time(rf_bit_slip_time),
|
383 |
|
|
.rf_hmc_init_cont_set(rf_hmc_init_cont_set),
|
384 |
|
|
.rf_lane_polarity(rf_lane_polarity),
|
385 |
|
|
.rf_scrambler_disable(rf_scrambler_disable),
|
386 |
|
|
.rf_lane_reversal_detected(rf_lane_reversal_detected),
|
387 |
|
|
.rf_irtry_received_threshold(rf_irtry_received_threshold)
|
388 |
|
|
);
|
389 |
|
|
|
390 |
|
|
openhmc_async_fifo #(
|
391 |
|
|
.DWIDTH(DWIDTH+(FPW*4)),
|
392 |
|
|
.ENTRIES(16)
|
393 |
|
|
) fifo_rx_data(
|
394 |
|
|
//System
|
395 |
|
|
.si_clk(clk_hmc),
|
396 |
|
|
.so_clk(clk_user),
|
397 |
|
|
.si_res_n(res_n_hmc),
|
398 |
|
|
.so_res_n(res_n_user),
|
399 |
|
|
|
400 |
|
|
//To RX LINK Logic
|
401 |
|
|
.d_in({rx_d_in_ctrl,rx_d_in_data}),
|
402 |
|
|
.shift_in(rx_shift_in),
|
403 |
|
|
.full(rx_full),
|
404 |
|
|
.almost_full(rx_a_full),
|
405 |
|
|
|
406 |
|
|
//AXI-4 RX IF
|
407 |
|
|
.d_out({m_axis_rx_TUSER_temp,m_axis_rx_TDATA}),
|
408 |
|
|
.shift_out(m_axis_rx_TVALID && m_axis_rx_TREADY),
|
409 |
|
|
.empty(m_axis_rx_TVALID_n),
|
410 |
|
|
.almost_empty()
|
411 |
|
|
|
412 |
|
|
);
|
413 |
|
|
|
414 |
|
|
//----------------------------------------------------------------------
|
415 |
|
|
//---Register File---Register File---Register File---Register File---Reg
|
416 |
|
|
//----------------------------------------------------------------------
|
417 |
|
|
//Instantiate register file depending on the number of lanes
|
418 |
|
|
generate
|
419 |
|
|
if(NUM_LANES==8) begin : register_file_8x
|
420 |
|
|
openhmc_8x_rf openhmc_rf_I (
|
421 |
|
|
//system IF
|
422 |
|
|
.res_n(res_n_hmc),
|
423 |
|
|
.clk(clk_hmc),
|
424 |
|
|
|
425 |
|
|
//rf access
|
426 |
|
|
.address(rf_address),
|
427 |
|
|
.read_data(rf_read_data),
|
428 |
|
|
.invalid_address(rf_invalid_address),
|
429 |
|
|
.access_complete(rf_access_complete),
|
430 |
|
|
.read_en(rf_read_en),
|
431 |
|
|
.write_en(rf_write_en),
|
432 |
|
|
.write_data(rf_write_data),
|
433 |
|
|
|
434 |
|
|
//status registers
|
435 |
|
|
.status_general_link_up_next(rf_link_status[1]),
|
436 |
|
|
.status_general_link_training_next(rf_link_status[0]),
|
437 |
|
|
.status_general_sleep_mode_next(rf_hmc_sleep),
|
438 |
|
|
.status_general_phy_ready_next(phy_ready),
|
439 |
|
|
.status_general_lanes_reversed_next(rf_lane_reversal_detected),
|
440 |
|
|
.status_general_hmc_tokens_remaining_next(rf_hmc_tokens_av),
|
441 |
|
|
.status_general_rx_tokens_remaining_next(rf_rx_tokens_av),
|
442 |
|
|
.status_general_lane_polarity_reversed_next(rf_lane_polarity),
|
443 |
|
|
|
444 |
|
|
//init status
|
445 |
|
|
.status_init_lane_descramblers_locked_next(rf_descramblers_locked),
|
446 |
|
|
.status_init_descrambler_part_aligned_next(rf_descrambler_part_aligned),
|
447 |
|
|
.status_init_descrambler_aligned_next(rf_descrambler_aligned),
|
448 |
|
|
.status_init_all_descramblers_aligned_next(rf_all_descramblers_aligned),
|
449 |
|
|
.status_init_tx_init_status_next(rf_tx_init_status),
|
450 |
|
|
.status_init_hmc_init_TS1_next(rf_hmc_init_status[0]),
|
451 |
|
|
|
452 |
|
|
//counters
|
453 |
|
|
.sent_np_cnt_next(rf_cnt_np),
|
454 |
|
|
.sent_p_cnt_next(rf_cnt_p),
|
455 |
|
|
.sent_r_cnt_next(rf_cnt_r),
|
456 |
|
|
.poisoned_packets_cnt_next(rf_cnt_poisoned),
|
457 |
|
|
.rcvd_rsp_cnt_next(rf_cnt_rsp_rcvd),
|
458 |
|
|
|
459 |
|
|
//Single bit counter
|
460 |
|
|
.tx_link_retries_count_countup(rf_cnt_retry),
|
461 |
|
|
.errors_on_rx_count_countup(rx2tx_error_abort_mode_cleared),
|
462 |
|
|
.run_length_bit_flip_count_countup(rf_run_length_bit_flip),
|
463 |
|
|
.error_abort_not_cleared_count_countup(rf_error_abort_not_cleared),
|
464 |
|
|
|
465 |
|
|
//control
|
466 |
|
|
.control_p_rst_n(P_RST_N),
|
467 |
|
|
.control_hmc_init_cont_set(rf_hmc_init_cont_set),
|
468 |
|
|
.control_set_hmc_sleep(rf_set_hmc_sleep),
|
469 |
|
|
.control_scrambler_disable(rf_scrambler_disable),
|
470 |
|
|
.control_run_length_enable(rf_run_length_enable),
|
471 |
|
|
.control_first_cube_ID(rf_first_cube_ID),
|
472 |
|
|
.control_debug_dont_send_tret(rf_dbg_dont_send_tret),
|
473 |
|
|
.control_debug_halt_on_error_abort(rf_dbg_halt_on_error_abort),
|
474 |
|
|
.control_debug_halt_on_tx_retry(rf_dbg_halt_on_tx_retry),
|
475 |
|
|
.control_rx_token_count(rf_rx_buffer_rtc),
|
476 |
|
|
.control_irtry_received_threshold(rf_irtry_received_threshold),
|
477 |
|
|
.control_irtry_to_send(rf_irtry_to_send),
|
478 |
|
|
.control_bit_slip_time(rf_bit_slip_time)
|
479 |
|
|
|
480 |
|
|
);
|
481 |
|
|
end else begin : register_file_16x
|
482 |
|
|
openhmc_16x_rf openhmc_rf_I (
|
483 |
|
|
//system IF
|
484 |
|
|
.res_n(res_n_hmc),
|
485 |
|
|
.clk(clk_hmc),
|
486 |
|
|
|
487 |
|
|
//rf access
|
488 |
|
|
.address(rf_address),
|
489 |
|
|
.read_data(rf_read_data),
|
490 |
|
|
.invalid_address(rf_invalid_address),
|
491 |
|
|
.access_complete(rf_access_complete),
|
492 |
|
|
.read_en(rf_read_en),
|
493 |
|
|
.write_en(rf_write_en),
|
494 |
|
|
.write_data(rf_write_data),
|
495 |
|
|
|
496 |
|
|
//status registers
|
497 |
|
|
.status_general_link_up_next(rf_link_status[1]),
|
498 |
|
|
.status_general_link_training_next(rf_link_status[0]),
|
499 |
|
|
.status_general_sleep_mode_next(rf_hmc_sleep),
|
500 |
|
|
.status_general_phy_ready_next(phy_ready),
|
501 |
|
|
.status_general_lanes_reversed_next(rf_lane_reversal_detected),
|
502 |
|
|
.status_general_hmc_tokens_remaining_next(rf_hmc_tokens_av),
|
503 |
|
|
.status_general_rx_tokens_remaining_next(rf_rx_tokens_av),
|
504 |
|
|
.status_general_lane_polarity_reversed_next(rf_lane_polarity),
|
505 |
|
|
|
506 |
|
|
//init status
|
507 |
|
|
.status_init_lane_descramblers_locked_next(rf_descramblers_locked),
|
508 |
|
|
.status_init_descrambler_part_aligned_next(rf_descrambler_part_aligned),
|
509 |
|
|
.status_init_descrambler_aligned_next(rf_descrambler_aligned),
|
510 |
|
|
.status_init_all_descramblers_aligned_next(rf_all_descramblers_aligned),
|
511 |
|
|
.status_init_tx_init_status_next(rf_tx_init_status),
|
512 |
|
|
.status_init_hmc_init_TS1_next(rf_hmc_init_status[0]),
|
513 |
|
|
|
514 |
|
|
//counters
|
515 |
|
|
.sent_np_cnt_next(rf_cnt_np),
|
516 |
|
|
.sent_p_cnt_next(rf_cnt_p),
|
517 |
|
|
.sent_r_cnt_next(rf_cnt_r),
|
518 |
|
|
.poisoned_packets_cnt_next(rf_cnt_poisoned),
|
519 |
|
|
.rcvd_rsp_cnt_next(rf_cnt_rsp_rcvd),
|
520 |
|
|
|
521 |
|
|
//Single bit counter
|
522 |
|
|
.tx_link_retries_count_countup(rf_cnt_retry),
|
523 |
|
|
.errors_on_rx_count_countup(rx2tx_error_abort_mode_cleared),
|
524 |
|
|
.run_length_bit_flip_count_countup(rf_run_length_bit_flip),
|
525 |
|
|
.error_abort_not_cleared_count_countup(rf_error_abort_not_cleared),
|
526 |
|
|
|
527 |
|
|
//control
|
528 |
|
|
.control_p_rst_n(P_RST_N),
|
529 |
|
|
.control_hmc_init_cont_set(rf_hmc_init_cont_set),
|
530 |
|
|
.control_set_hmc_sleep(rf_set_hmc_sleep),
|
531 |
|
|
.control_scrambler_disable(rf_scrambler_disable),
|
532 |
|
|
.control_run_length_enable(rf_run_length_enable),
|
533 |
|
|
.control_first_cube_ID(rf_first_cube_ID),
|
534 |
|
|
.control_debug_dont_send_tret(rf_dbg_dont_send_tret),
|
535 |
|
|
.control_debug_halt_on_error_abort(rf_dbg_halt_on_error_abort),
|
536 |
|
|
.control_debug_halt_on_tx_retry(rf_dbg_halt_on_tx_retry),
|
537 |
|
|
.control_rx_token_count(rf_rx_buffer_rtc),
|
538 |
|
|
.control_irtry_received_threshold(rf_irtry_received_threshold),
|
539 |
|
|
.control_irtry_to_send(rf_irtry_to_send),
|
540 |
|
|
.control_bit_slip_time(rf_bit_slip_time)
|
541 |
|
|
);
|
542 |
|
|
end
|
543 |
|
|
endgenerate
|
544 |
|
|
|
545 |
|
|
endmodule
|
546 |
|
|
|
547 |
|
|
`default_nettype wire
|