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/*
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* .--------------. .----------------. .------------.
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* | .------------. | .--------------. | .----------. |
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* | | ____ ____ | | | ____ ____ | | | ______ | |
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* | ||_ || _|| | ||_ \ / _|| | | .' ___ || |
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* ___ _ __ ___ _ __ | | | |__| | | | | | \/ | | | |/ .' \_|| |
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* / _ \| '_ \ / _ \ '_ \ | | | __ | | | | | |\ /| | | | || | | |
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* (_) | |_) | __/ | | || | _| | | |_ | | | _| |_\/_| |_ | | |\ `.___.'\| |
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* \___/| .__/ \___|_| |_|| ||____||____|| | ||_____||_____|| | | `._____.'| |
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* | | | | | | | | | | | |
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* |_| | '------------' | '--------------' | '----------' |
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* '--------------' '----------------' '------------'
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*
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* openHMC - An Open Source Hybrid Memory Cube Controller
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* (C) Copyright 2014 Computer Architecture Group - University of Heidelberg
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* www.ziti.uni-heidelberg.de
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* B6, 26
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* 68159 Mannheim
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* Germany
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*
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* Contact: openhmc@ziti.uni-heidelberg.de
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* http://ra.ziti.uni-heidelberg.de/openhmc
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*
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* This source file is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This source file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this source file. If not, see .
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*
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*
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*/
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`ifndef CAG_RGM_RFS_ENV_SV
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`define CAG_RGM_RFS_ENV_SV
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class cag_rgm_rfs_env #(
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parameter ADDR_WIDTH = 6,
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parameter WRITE_DATA_WIDTH = 64,
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parameter READ_DATA_WIDTH = 64
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) extends uvm_env;
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uvm_active_passive_enum is_active = UVM_ACTIVE;
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cag_rgm_rfs_driver #(.ADDR_WIDTH(ADDR_WIDTH), .READ_DATA_WIDTH(READ_DATA_WIDTH), .WRITE_DATA_WIDTH(WRITE_DATA_WIDTH)) driver;
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cag_rgm_rfs_monitor #(.ADDR_WIDTH(ADDR_WIDTH), .READ_DATA_WIDTH(READ_DATA_WIDTH), .WRITE_DATA_WIDTH(WRITE_DATA_WIDTH)) monitor;
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cag_rgm_sequencer sequencer;
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`uvm_component_param_utils_begin(cag_rgm_rfs_env #(.ADDR_WIDTH(ADDR_WIDTH), .READ_DATA_WIDTH(READ_DATA_WIDTH), .WRITE_DATA_WIDTH(WRITE_DATA_WIDTH)))
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`uvm_field_enum(uvm_active_passive_enum, is_active, UVM_ALL_ON)
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`uvm_component_utils_end
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function new(string name="cag_rgm_rfs_env", uvm_component parent);
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super.new(name,parent);
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endfunction : new
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function void build();
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super.build();
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monitor = cag_rgm_rfs_monitor #(.ADDR_WIDTH(ADDR_WIDTH), .READ_DATA_WIDTH(READ_DATA_WIDTH), .WRITE_DATA_WIDTH(WRITE_DATA_WIDTH))::type_id::create("monitor",this);
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if(is_active == UVM_ACTIVE) begin
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driver = cag_rgm_rfs_driver #(.ADDR_WIDTH(ADDR_WIDTH), .READ_DATA_WIDTH(READ_DATA_WIDTH), .WRITE_DATA_WIDTH(WRITE_DATA_WIDTH))::type_id::create("driver",this);
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sequencer = cag_rgm_sequencer::type_id::create("sequencer",this);
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end
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endfunction : build
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function void connect();
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super.connect();
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if(is_active == UVM_ACTIVE) begin
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driver.seq_item_port.connect(sequencer.seq_item_export);
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monitor.response_port.connect(sequencer.resp_port);
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end
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endfunction : connect
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function void assign_vi( virtual interface cag_rgm_rfs_if #(.ADDR_WIDTH(ADDR_WIDTH), .READ_DATA_WIDTH(READ_DATA_WIDTH), .WRITE_DATA_WIDTH(WRITE_DATA_WIDTH)) vif);
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monitor.assign_vi(vif);
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if(is_active == UVM_ACTIVE)
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driver.assign_vi(vif);
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endfunction : assign_vi
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function void set_rf(cag_rgm_register_file rf);
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if(is_active == UVM_ACTIVE)
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sequencer.set_rf(rf);
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endfunction : set_rf
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endclass : cag_rgm_rfs_env
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`endif // CAG_RGM_RFS_ENV_SV
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