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/*
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* .--------------. .----------------. .------------.
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* | .------------. | .--------------. | .----------. |
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* | | ____ ____ | | | ____ ____ | | | ______ | |
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* | ||_ || _|| | ||_ \ / _|| | | .' ___ || |
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* ___ _ __ ___ _ __ | | | |__| | | | | | \/ | | | |/ .' \_|| |
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* / _ \| '_ \ / _ \ '_ \ | | | __ | | | | | |\ /| | | | || | | |
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* (_) | |_) | __/ | | || | _| | | |_ | | | _| |_\/_| |_ | | |\ `.___.'\| |
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* \___/| .__/ \___|_| |_|| ||____||____|| | ||_____||_____|| | | `._____.'| |
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* | | | | | | | | | | | |
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* |_| | '------------' | '--------------' | '----------' |
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* '--------------' '----------------' '------------'
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*
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* openHMC - An Open Source Hybrid Memory Cube Controller
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* (C) Copyright 2014 Computer Architecture Group - University of Heidelberg
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* www.ziti.uni-heidelberg.de
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* B6, 26
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* 68159 Mannheim
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* Germany
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*
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* Contact: openhmc@ziti.uni-heidelberg.de
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* http://ra.ziti.uni-heidelberg.de/openhmc
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*
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* This source file is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This source file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this source file. If not, see .
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*
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*
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*/
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`ifndef OPENHMC_INIT_SEQ
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`define OPENHMC_INIT_SEQ
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class openhmc_init_seq extends hmc_base_seq;
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// hmc_link_config link_config;
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function new(string name="openhmc_init_seq");
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super.new(name);
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endfunction : new
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`uvm_object_utils(openhmc_init_seq)
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`uvm_declare_p_sequencer(vseqr)
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bit phy_tx_ready = 1'b0;
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bit phy_rx_ready = 1'b0;
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bit link_up = 1'b0;
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int timeout = 0;
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int delay;
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task body();
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//-- configure the HMC controller
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reg_openhmc_rf_control_c control;
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reg_openhmc_rf_status_general_c status;
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reg_openhmc_rf_status_init_c status_init;
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reg_openhmc_rf_counter_reset_c cnt_reset;
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`uvm_info(get_type_name(), "Running init sequence", UVM_NONE)
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$cast(control,p_sequencer.rf_seqr_hmc.get_by_name("control"));
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control.set_check_on_read(1'b0);
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p_sequencer.rf_seqr_hmc.read_reg(control);
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control.fields.rx_token_count_ = p_sequencer.link_cfg.rx_tokens;
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control.fields.scrambler_disable_ = ~p_sequencer.link_cfg.scramblers_enabled;
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control.fields.bit_slip_time_ = 40;
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control.fields.set_hmc_sleep_ = 0;
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control.fields.run_length_enable_ = ~p_sequencer.link_cfg.scramblers_enabled;
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control.fields.irtry_to_send_ = p_sequencer.link_cfg.requester.irtry_flit_count_to_send;
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control.fields.irtry_received_threshold_ = p_sequencer.link_cfg.requester.irtry_flit_count_received_threshold;
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p_sequencer.rf_seqr_hmc.write_reg(control);
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//Dummy Read to status init
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$cast(status_init,p_sequencer.rf_seqr_hmc.get_by_name("status_init"));
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status_init.set_check_on_read(1'b0);
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p_sequencer.rf_seqr_hmc.read_reg(status_init);
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//Dummy counter reset
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$cast(cnt_reset,p_sequencer.rf_seqr_hmc.get_by_name("counter_reset"));
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cnt_reset.fields.rreinit_ = 1;
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p_sequencer.rf_seqr_hmc.write_reg(cnt_reset);
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//-- Wait until the PHY is out of reset
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$cast(status,p_sequencer.rf_seqr_hmc.get_by_name("status_general"));
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status.set_check_on_read(1'b0);
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while (phy_tx_ready == 1'b0)
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begin
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#1us;
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p_sequencer.rf_seqr_hmc.read_reg(status);
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phy_tx_ready = status.fields.phy_tx_ready_;
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`uvm_info(get_type_name(), "Waiting for the PHY TX to get ready", UVM_NONE)
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end
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`uvm_info(get_type_name(), "Phy TX ready", UVM_NONE)
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//------------------------------------------------------- Set Reset and Init Continue
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control.fields.p_rst_n_ = 1;
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p_sequencer.rf_seqr_hmc.write_reg(control);
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#1us;
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control.fields.hmc_init_cont_set_ = 1;
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p_sequencer.rf_seqr_hmc.write_reg(control);
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`uvm_info(get_type_name(), "Init cont in RF set", UVM_NONE)
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//------------------------------------------------------- Wait for the PHY to get ready
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while (phy_rx_ready == 1'b0)
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begin
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#1us;
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p_sequencer.rf_seqr_hmc.read_reg(status);
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phy_rx_ready = status.fields.phy_rx_ready_;
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`uvm_info(get_type_name(), "Waiting for PHY RX to get ready", UVM_NONE)
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end
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`uvm_info(get_type_name(), "Phy RX is ready", UVM_NONE)
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//-- Poll on link_up to make sure that it comes up.
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while (link_up == 1'b0)
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begin
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if (timeout == 8000) //-- Try Resetting it.
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begin
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`uvm_fatal(get_type_name(), "The link didn't come up...")
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end
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#4ns;
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p_sequencer.rf_seqr_hmc.read_reg(status);
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link_up = status.fields.link_up_;
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timeout = timeout + 1;
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end
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`uvm_info(get_type_name(), "Link is UP !", UVM_NONE)
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endtask : body
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endclass : openhmc_init_seq
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`endif // OPENHMC_INIT_SEQ
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