OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [rtl/] [verilog/] [openMSP430_undefines.v] - Blame information for rev 134

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 33 olivier.gi 
//----------------------------------------------------------------------------
2 117 olivier.gi 
// Copyright (C) 2009 , Olivier Girard
3 33 olivier.gi 
//
4 117 olivier.gi 
// Redistribution and use in source and binary forms, with or without
5 
// modification, are permitted provided that the following conditions
6 
// are met:
7 
//     * Redistributions of source code must retain the above copyright
8 
//       notice, this list of conditions and the following disclaimer.
9 
//     * Redistributions in binary form must reproduce the above copyright
10 
//       notice, this list of conditions and the following disclaimer in the
11 
//       documentation and/or other materials provided with the distribution.
12 
//     * Neither the name of the authors nor the names of its contributors
13 
//       may be used to endorse or promote products derived from this software
14 
//       without specific prior written permission.
15 33 olivier.gi 
//
16 117 olivier.gi 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
20 
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
21 
// OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 
// THE POSSIBILITY OF SUCH DAMAGE
27 33 olivier.gi 
//
28 
//----------------------------------------------------------------------------
29 
//
30 
// *File Name: openMSP430_undefines.v
31 
//
32 
// *Module Description:
33 
//                      openMSP430 Verilog `undef file
34 
//
35 
// *Author(s):
36 
//              - Olivier Girard,    olgirard@gmail.com
37 
//
38 
//----------------------------------------------------------------------------
39 
// $Rev: 23 $
40 
// $LastChangedBy: olivier.girard $
41 
// $LastChangedDate: 2009-08-30 18:39:26 +0200 (Sun, 30 Aug 2009) $
42 
//----------------------------------------------------------------------------
43 
 
44 
//----------------------------------------------------------------------------
45 111 olivier.gi 
// BASIC SYSTEM CONFIGURATION
46 33 olivier.gi 
//----------------------------------------------------------------------------
47 
 
48 111 olivier.gi 
// Program Memory sizes
49 72 olivier.gi 
`ifdef PMEM_SIZE_59_KB
50 
`undef PMEM_SIZE_59_KB
51 
`endif
52 
`ifdef PMEM_SIZE_55_KB
53 
`undef PMEM_SIZE_55_KB
54 
`endif
55 
`ifdef PMEM_SIZE_54_KB
56 
`undef PMEM_SIZE_54_KB
57 
`endif
58 
`ifdef PMEM_SIZE_51_KB
59 
`undef PMEM_SIZE_51_KB
60 
`endif
61 
`ifdef PMEM_SIZE_48_KB
62 
`undef PMEM_SIZE_48_KB
63 
`endif
64 
`ifdef PMEM_SIZE_41_KB
65 
`undef PMEM_SIZE_41_KB
66 
`endif
67 
`ifdef PMEM_SIZE_32_KB
68 
`undef PMEM_SIZE_32_KB
69 
`endif
70 
`ifdef PMEM_SIZE_24_KB
71 
`undef PMEM_SIZE_24_KB
72 
`endif
73 
`ifdef PMEM_SIZE_16_KB
74 
`undef PMEM_SIZE_16_KB
75 
`endif
76 
`ifdef PMEM_SIZE_12_KB
77 
`undef PMEM_SIZE_12_KB
78 
`endif
79 
`ifdef PMEM_SIZE_8_KB
80 
`undef PMEM_SIZE_8_KB
81 
`endif
82 
`ifdef PMEM_SIZE_4_KB
83 
`undef PMEM_SIZE_4_KB
84 
`endif
85 
`ifdef PMEM_SIZE_2_KB
86 
`undef PMEM_SIZE_2_KB
87 
`endif
88 
`ifdef PMEM_SIZE_1_KB
89 
`undef PMEM_SIZE_1_KB
90 
`endif
91 111 olivier.gi 
 
92 
// Data Memory sizes
93 72 olivier.gi 
`ifdef DMEM_SIZE_32_KB
94 
`undef DMEM_SIZE_32_KB
95 
`endif
96 
`ifdef DMEM_SIZE_24_KB
97 
`undef DMEM_SIZE_24_KB
98 
`endif
99 
`ifdef DMEM_SIZE_16_KB
100 
`undef DMEM_SIZE_16_KB
101 
`endif
102 
`ifdef DMEM_SIZE_10_KB
103 
`undef DMEM_SIZE_10_KB
104 
`endif
105 
`ifdef DMEM_SIZE_8_KB
106 
`undef DMEM_SIZE_8_KB
107 
`endif
108 
`ifdef DMEM_SIZE_5_KB
109 
`undef DMEM_SIZE_5_KB
110 
`endif
111 
`ifdef DMEM_SIZE_4_KB
112 
`undef DMEM_SIZE_4_KB
113 
`endif
114 
`ifdef DMEM_SIZE_2p5_KB
115 
`undef DMEM_SIZE_2p5_KB
116 
`endif
117 
`ifdef DMEM_SIZE_2_KB
118 
`undef DMEM_SIZE_2_KB
119 
`endif
120 
`ifdef DMEM_SIZE_1_KB
121 
`undef DMEM_SIZE_1_KB
122 
`endif
123 
`ifdef DMEM_SIZE_512_B
124 
`undef DMEM_SIZE_512_B
125 
`endif
126 
`ifdef DMEM_SIZE_256_B
127 
`undef DMEM_SIZE_256_B
128 
`endif
129 
`ifdef DMEM_SIZE_128_B
130 
`undef DMEM_SIZE_128_B
131 
`endif
132 111 olivier.gi 
 
133 
// Include/Exclude Hardware Multiplier
134 
`ifdef MULTIPLIER
135 
`undef MULTIPLIER
136 33 olivier.gi 
`endif
137 111 olivier.gi 
 
138 
// Include Debug interface
139 
`ifdef DBG_EN
140 
`undef DBG_EN
141 
`endif
142 
 
143 
 
144 
//----------------------------------------------------------------------------
145 
// ADVANCED SYSTEM CONFIGURATION (FOR EXPERIENCED USERS)
146 
//----------------------------------------------------------------------------
147 
 
148 
// Peripheral Memory Space:
149 
`ifdef PER_SIZE_32_KB
150 
`undef PER_SIZE_32_KB
151 
`endif
152 
`ifdef PER_SIZE_16_KB
153 
`undef PER_SIZE_16_KB
154 
`endif
155 
`ifdef PER_SIZE_8_KB
156 
`undef PER_SIZE_8_KB
157 
`endif
158 
`ifdef PER_SIZE_4_KB
159 
`undef PER_SIZE_4_KB
160 
`endif
161 
`ifdef PER_SIZE_2_KB
162 
`undef PER_SIZE_2_KB
163 
`endif
164 
`ifdef PER_SIZE_1_KB
165 
`undef PER_SIZE_1_KB
166 
`endif
167 
`ifdef PER_SIZE_512_B
168 
`undef PER_SIZE_512_B
169 
`endif
170 
 
171 
// Let the CPU break after a PUC occurrence by default
172 
`ifdef DBG_RST_BRK_EN
173 
`undef DBG_RST_BRK_EN
174 
`endif
175 
 
176 
// Custom user version number
177 
`ifdef USER_VERSION
178 
`undef USER_VERSION
179 
`endif
180 
 
181 134 olivier.gi 
// Include/Exclude Watchdog timer
182 
`ifdef WATCHDOG
183 
`undef WATCHDOG
184 
`endif
185 111 olivier.gi 
 
186 134 olivier.gi 
// Include/Exclude Non-Maskable-Interrupt support
187 
`ifdef NMI
188 
`undef NMI
189 
`endif
190 
 
191 111 olivier.gi 
//----------------------------------------------------------------------------
192 
// EXPERT SYSTEM CONFIGURATION ( !!!! EXPERTS ONLY !!!! )
193 
//----------------------------------------------------------------------------
194 
 
195 
// Number of hardware breakpoint units
196 
`ifdef DBG_HWBRK_0
197 
`undef DBG_HWBRK_0
198 
`endif
199 
`ifdef DBG_HWBRK_1
200 
`undef DBG_HWBRK_1
201 
`endif
202 
`ifdef DBG_HWBRK_2
203 
`undef DBG_HWBRK_2
204 
`endif
205 
`ifdef DBG_HWBRK_3
206 
`undef DBG_HWBRK_3
207 
`endif
208 
 
209 
// Enable/Disable the hardware breakpoint RANGE mode
210 
`ifdef DBG_HWBRK_RANGE
211 
`undef DBG_HWBRK_RANGE
212 
`endif
213 
 
214 
// Input synchronizers
215 
`ifdef SYNC_CPU_EN
216 
`undef SYNC_CPU_EN
217 
`endif
218 
`ifdef SYNC_DBG_EN
219 
`undef SYNC_DBG_EN
220 
`endif
221 
`ifdef SYNC_DBG_UART_RXD
222 
`undef SYNC_DBG_UART_RXD
223 
`endif
224 
`ifdef SYNC_NMI
225 
`undef SYNC_NMI
226 
`endif
227 
 
228 134 olivier.gi 
// ASIC version
229 
`ifdef ASIC
230 
`undef ASIC
231 
`endif
232 111 olivier.gi 
 
233 134 olivier.gi 
 
234 
//----------------------------------------------------------------------------
235 
// ASIC SYSTEM CONFIGURATION ( !!!! EXPERTS ONLY !!!! )
236 
//----------------------------------------------------------------------------
237 
 
238 
// Fine grained clock gating
239 
`ifdef CLOCK_GATING
240 
`undef CLOCK_GATING
241 
`endif
242 
 
243 
// LFXT clock domain
244 
`ifdef LFXT_DOMAIN
245 
`undef LFXT_DOMAIN
246 
`endif
247 
 
248 
// MCLK: Clock Mux
249 
`ifdef MCLK_MUX
250 
`undef MCLK_MUX
251 
`endif
252 
 
253 
// SMCLK: Clock Mux
254 
`ifdef SMCLK_MUX
255 
`undef SMCLK_MUX
256 
`endif
257 
 
258 
// WATCHDOG: Clock Mux
259 
`ifdef WATCHDOG_MUX
260 
`undef WATCHDOG_MUX
261 
`endif
262 
 
263 
// MCLK: Clock divider
264 
`ifdef MCLK_DIVIDER
265 
`undef MCLK_DIVIDER
266 
`endif
267 
 
268 
// SMCLK: Clock divider (/1/2/4/8)
269 
`ifdef SMCLK_DIVIDER
270 
`undef SMCLK_DIVIDER
271 
`endif
272 
 
273 
// ACLK: Clock divider (/1/2/4/8)
274 
`ifdef ACLK_DIVIDER
275 
`undef ACLK_DIVIDER
276 
`endif
277 
 
278 
// LOW POWER MODE: CPUOFF
279 
`ifdef CPUOFF_EN
280 
`undef CPUOFF_EN
281 
`endif
282 
 
283 
// LOW POWER MODE: OSCOFF
284 
`ifdef OSCOFF_EN
285 
`undef OSCOFF_EN
286 
`endif
287 
 
288 
// LOW POWER MODE: SCG0
289 
`ifdef SCG0_EN
290 
`undef SCG0_EN
291 
`endif
292 
 
293 
// LOW POWER MODE: SCG1
294 
`ifdef SCG1_EN
295 
`undef SCG1_EN
296 
`endif
297 
 
298 
 
299 111 olivier.gi 
//==========================================================================//
300 
//==========================================================================//
301 
//==========================================================================//
302 
//==========================================================================//
303 
//=====        SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!!      =====//
304 
//==========================================================================//
305 
//==========================================================================//
306 
//==========================================================================//
307 
//==========================================================================//
308 
 
309 
// Program Memory Size
310 72 olivier.gi 
`ifdef PMEM_AWIDTH
311 
`undef PMEM_AWIDTH
312 
`endif
313 111 olivier.gi 
`ifdef PMEM_SIZE
314 
`undef PMEM_SIZE
315 33 olivier.gi 
`endif
316 111 olivier.gi 
 
317 
// Data Memory Size
318 72 olivier.gi 
`ifdef DMEM_AWIDTH
319 
`undef DMEM_AWIDTH
320 
`endif
321 111 olivier.gi 
`ifdef DMEM_SIZE
322 
`undef DMEM_SIZE
323 
`endif
324 33 olivier.gi 
 
325 111 olivier.gi 
// Peripheral Memory Size
326 
`ifdef PER_AWIDTH
327 
`undef PER_AWIDTH
328 
`endif
329 
`ifdef PER_SIZE
330 
`undef PER_SIZE
331 
`endif
332 
 
333 33 olivier.gi 
// Data Memory Base Adresses
334 
`ifdef DMEM_BASE
335 
`undef DMEM_BASE
336 
`endif
337 
 
338 
// Program & Data Memory most significant address bit (for 16 bit words)
339 
`ifdef PMEM_MSB
340 
`undef PMEM_MSB
341 
`endif
342 
`ifdef DMEM_MSB
343 
`undef DMEM_MSB
344 
`endif
345 111 olivier.gi 
`ifdef PER_MSB
346 
`undef PER_MSB
347 
`endif
348 33 olivier.gi 
 
349 
// Instructions type
350 
`ifdef INST_SO
351 
`undef INST_SO
352 
`endif
353 
`ifdef INST_JMP
354 
`undef INST_JMP
355 
`endif
356 
`ifdef INST_TO
357 
`undef INST_TO
358 
`endif
359 
 
360 
// Single-operand arithmetic
361 
`ifdef RRC
362 
`undef RRC
363 
`endif
364 
`ifdef SWPB
365 
`undef SWPB
366 
`endif
367 
`ifdef RRA
368 
`undef RRA
369 
`endif
370 
`ifdef SXT
371 
`undef SXT
372 
`endif
373 
`ifdef PUSH
374 
`undef PUSH
375 
`endif
376 
`ifdef CALL
377 
`undef CALL
378 
`endif
379 
`ifdef RETI
380 
`undef RETI
381 
`endif
382 
`ifdef IRQ
383 
`undef IRQ
384 
`endif
385 
 
386 
// Conditional jump
387 
`ifdef JNE
388 
`undef JNE
389 
`endif
390 
`ifdef JEQ
391 
`undef JEQ
392 
`endif
393 
`ifdef JNC
394 
`undef JNC
395 
`endif
396 
`ifdef JC
397 
`undef JC
398 
`endif
399 
`ifdef JN
400 
`undef JN
401 
`endif
402 
`ifdef JGE
403 
`undef JGE
404 
`endif
405 
`ifdef JL
406 
`undef JL
407 
`endif
408 
`ifdef JMP
409 
`undef JMP
410 
`endif
411 
 
412 
// Two-operand arithmetic
413 
`ifdef MOV
414 
`undef MOV
415 
`endif
416 
`ifdef ADD
417 
`undef ADD
418 
`endif
419 
`ifdef ADDC
420 
`undef ADDC
421 
`endif
422 
`ifdef SUBC
423 
`undef SUBC
424 
`endif
425 
`ifdef SUB
426 
`undef SUB
427 
`endif
428 
`ifdef CMP
429 
`undef CMP
430 
`endif
431 
`ifdef DADD
432 
`undef DADD
433 
`endif
434 
`ifdef BIT
435 
`undef BIT
436 
`endif
437 
`ifdef BIC
438 
`undef BIC
439 
`endif
440 
`ifdef BIS
441 
`undef BIS
442 
`endif
443 
`ifdef XOR
444 
`undef XOR
445 
`endif
446 
`ifdef AND
447 
`undef AND
448 
`endif
449 
 
450 
// Addressing modes
451 
`ifdef DIR
452 
`undef DIR
453 
`endif
454 
`ifdef IDX
455 
`undef IDX
456 
`endif
457 
`ifdef INDIR
458 
`undef INDIR
459 
`endif
460 
`ifdef INDIR_I
461 
`undef INDIR_I
462 
`endif
463 
`ifdef SYMB
464 
`undef SYMB
465 
`endif
466 
`ifdef IMM
467 
`undef IMM
468 
`endif
469 
`ifdef ABS
470 
`undef ABS
471 
`endif
472 
`ifdef CONST
473 
`undef CONST
474 
`endif
475 
 
476 111 olivier.gi 
// Instruction state machine
477 
`ifdef I_IRQ_FETCH
478 
`undef I_IRQ_FETCH
479 
`endif
480 
`ifdef I_IRQ_DONE
481 
`undef I_IRQ_DONE
482 
`endif
483 
`ifdef I_DEC
484 
`undef I_DEC
485 
`endif
486 
`ifdef I_EXT1
487 
`undef I_EXT1
488 
`endif
489 
`ifdef I_EXT2
490 
`undef I_EXT2
491 
`endif
492 
`ifdef I_IDLE
493 
`undef I_IDLE
494 
`endif
495 
 
496 33 olivier.gi 
// Execution state machine
497 
`ifdef E_IRQ_0
498 
`undef E_IRQ_0
499 
`endif
500 
`ifdef E_IRQ_1
501 
`undef E_IRQ_1
502 
`endif
503 
`ifdef E_IRQ_2
504 
`undef E_IRQ_2
505 
`endif
506 
`ifdef E_IRQ_3
507 
`undef E_IRQ_3
508 
`endif
509 
`ifdef E_IRQ_4
510 
`undef E_IRQ_4
511 
`endif
512 
`ifdef E_SRC_AD
513 
`undef E_SRC_AD
514 
`endif
515 
`ifdef E_SRC_RD
516 
`undef E_SRC_RD
517 
`endif
518 
`ifdef E_SRC_WR
519 
`undef E_SRC_WR
520 
`endif
521 
`ifdef E_DST_AD
522 
`undef E_DST_AD
523 
`endif
524 
`ifdef E_DST_RD
525 
`undef E_DST_RD
526 
`endif
527 
`ifdef E_DST_WR
528 
`undef E_DST_WR
529 
`endif
530 
`ifdef E_EXEC
531 
`undef E_EXEC
532 
`endif
533 
`ifdef E_JUMP
534 
`undef E_JUMP
535 
`endif
536 
`ifdef E_IDLE
537 
`undef E_IDLE
538 
`endif
539 
 
540 
// ALU control signals
541 
`ifdef ALU_SRC_INV
542 
`undef ALU_SRC_INV
543 
`endif
544 
`ifdef ALU_INC
545 
`undef ALU_INC
546 
`endif
547 
`ifdef ALU_INC_C
548 
`undef ALU_INC_C
549 
`endif
550 
`ifdef ALU_ADD
551 
`undef ALU_ADD
552 
`endif
553 
`ifdef ALU_AND
554 
`undef ALU_AND
555 
`endif
556 
`ifdef ALU_OR
557 
`undef ALU_OR
558 
`endif
559 
`ifdef ALU_XOR
560 
`undef ALU_XOR
561 
`endif
562 
`ifdef ALU_DADD
563 
`undef ALU_DADD
564 
`endif
565 
`ifdef ALU_STAT_7
566 
`undef ALU_STAT_7
567 
`endif
568 
`ifdef ALU_STAT_F
569 
`undef ALU_STAT_F
570 
`endif
571 
`ifdef ALU_SHIFT
572 
`undef ALU_SHIFT
573 
`endif
574 
`ifdef EXEC_NO_WR
575 
`undef EXEC_NO_WR
576 
`endif
577 
 
578 
// Debug interface
579 
`ifdef DBG_UART_WR
580 
`undef DBG_UART_WR
581 
`endif
582 
`ifdef DBG_UART_BW
583 
`undef DBG_UART_BW
584 
`endif
585 
`ifdef DBG_UART_ADDR
586 
`undef DBG_UART_ADDR
587 
`endif
588 
 
589 
// Debug interface CPU_CTL register
590 
`ifdef HALT
591 
`undef HALT
592 
`endif
593 
`ifdef RUN
594 
`undef RUN
595 
`endif
596 
`ifdef ISTEP
597 
`undef ISTEP
598 
`endif
599 
`ifdef SW_BRK_EN
600 
`undef SW_BRK_EN
601 
`endif
602 
`ifdef FRZ_BRK_EN
603 
`undef FRZ_BRK_EN
604 
`endif
605 
`ifdef RST_BRK_EN
606 
`undef RST_BRK_EN
607 
`endif
608 
`ifdef CPU_RST
609 
`undef CPU_RST
610 
`endif
611 
 
612 
// Debug interface CPU_STAT register
613 
`ifdef HALT_RUN
614 
`undef HALT_RUN
615 
`endif
616 
`ifdef PUC_PND
617 
`undef PUC_PND
618 
`endif
619 
`ifdef SWBRK_PND
620 
`undef SWBRK_PND
621 
`endif
622 
`ifdef HWBRK0_PND
623 
`undef HWBRK0_PND
624 
`endif
625 
`ifdef HWBRK1_PND
626 
`undef HWBRK1_PND
627 
`endif
628 
 
629 
// Debug interface BRKx_CTL register
630 
`ifdef BRK_MODE_RD
631 
`undef BRK_MODE_RD
632 
`endif
633 
`ifdef BRK_MODE_WR
634 
`undef BRK_MODE_WR
635 
`endif
636 
`ifdef BRK_MODE
637 
`undef BRK_MODE
638 
`endif
639 
`ifdef BRK_EN
640 
`undef BRK_EN
641 
`endif
642 
`ifdef BRK_I_EN
643 
`undef BRK_I_EN
644 
`endif
645 
`ifdef BRK_RANGE
646 
`undef BRK_RANGE
647 
`endif
648 
 
649 
// Basic clock module: BCSCTL1 Control Register
650 
`ifdef DIVAx
651 
`undef DIVAx
652 
`endif
653 
 
654 
// Basic clock module: BCSCTL2 Control Register
655 134 olivier.gi 
`ifdef SELMx
656 
`undef SELMx
657 
`endif
658 
`ifdef DIVMx
659 
`undef DIVMx
660 
`endif
661 33 olivier.gi 
`ifdef SELS
662 
`undef SELS
663 
`endif
664 
`ifdef DIVSx
665 
`undef DIVSx
666 
`endif
667 
 
668 134 olivier.gi 
// MCLK Clock gate
669 
`ifdef MCLK_CGATE
670 
`undef MCLK_CGATE
671 
`endif
672 33 olivier.gi 
 
673 134 olivier.gi 
// SMCLK Clock gate
674 
`ifdef SMCLK_CGATE
675 
`undef SMCLK_CGATE
676 
`endif
677 
 
678 33 olivier.gi 
//
679 
// DEBUG INTERFACE EXTRA CONFIGURATION
680 
//======================================
681 
 
682 111 olivier.gi 
// Debug interface: CPU version
683 
`ifdef CPU_VERSION
684 
`undef CPU_VERSION
685 
`endif
686 
 
687 33 olivier.gi 
// Debug interface: Software breakpoint opcode
688 
`ifdef DBG_SWBRK_OP
689 
`undef DBG_SWBRK_OP
690 
`endif
691 
 
692 
// Debug UART interface auto data synchronization
693 
`ifdef DBG_UART_AUTO_SYNC
694 
`undef DBG_UART_AUTO_SYNC
695 
`endif
696 
 
697 
// Debug UART interface data rate
698 
`ifdef DBG_UART_BAUD
699 
`undef DBG_UART_BAUD
700 
`endif
701 
`ifdef DBG_DCO_FREQ
702 
`undef DBG_DCO_FREQ
703 
`endif
704 
`ifdef DBG_UART_CNT
705 
`undef DBG_UART_CNT
706 
`endif
707 57 olivier.gi 
 
708 111 olivier.gi 
// Debug interface selection
709 
`ifdef DBG_UART
710 
`undef DBG_UART
711 
`endif
712 
`ifdef DBG_JTAG
713 
`undef DBG_JTAG
714 
`endif
715 
 
716 57 olivier.gi 
// Enable/Disable the hardware breakpoint RANGE mode
717 
`ifdef HWBRK_RANGE
718 
`undef HWBRK_RANGE
719 67 olivier.gi 
`endif
720 
 
721 74 olivier.gi 
// Counter width for the debug interface UART
722 
`ifdef DBG_UART_XFER_CNT_W
723 
`undef DBG_UART_XFER_CNT_W
724 
`endif
725 
 
726 67 olivier.gi 
//
727 
// MULTIPLIER CONFIGURATION
728 
//======================================
729 
 
730 
`ifdef MPY_16x16
731 
`undef MPY_16x16
732 
`endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.