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[/] [openmsp430/] [trunk/] [core/] [rtl/] [verilog/] [openMSP430_undefines.v] - Blame information for rev 76

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Line No. Rev Author Line
1 33 olivier.gi
//----------------------------------------------------------------------------
2
// Copyright (C) 2001 Authors
3
//
4
// This source file may be used and distributed without restriction provided
5
// that this copyright statement is not removed from the file and that any
6
// derivative work contains the original copyright notice and the associated
7
// disclaimer.
8
//
9
// This source file is free software; you can redistribute it and/or modify
10
// it under the terms of the GNU Lesser General Public License as published
11
// by the Free Software Foundation; either version 2.1 of the License, or
12
// (at your option) any later version.
13
//
14
// This source is distributed in the hope that it will be useful, but WITHOUT
15
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
17
// License for more details.
18
//
19
// You should have received a copy of the GNU Lesser General Public License
20
// along with this source; if not, write to the Free Software Foundation,
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// Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
22
//
23
//----------------------------------------------------------------------------
24
// 
25
// *File Name: openMSP430_undefines.v
26
// 
27
// *Module Description:
28
//                      openMSP430 Verilog `undef file
29
//
30
// *Author(s):
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//              - Olivier Girard,    olgirard@gmail.com
32
//
33
//----------------------------------------------------------------------------
34
// $Rev: 23 $
35
// $LastChangedBy: olivier.girard $
36
// $LastChangedDate: 2009-08-30 18:39:26 +0200 (Sun, 30 Aug 2009) $
37
//----------------------------------------------------------------------------
38
 
39
//----------------------------------------------------------------------------
40
// SYSTEM CONFIGURATION
41
//----------------------------------------------------------------------------
42
 
43
// Program Memory Size:
44
`ifdef PMEM_AWIDTH
45
`undef PMEM_AWIDTH
46
`endif
47
 
48
// Data Memory Size:
49
`ifdef DMEM_AWIDTH
50
`undef DMEM_AWIDTH
51
`endif
52
 
53 67 olivier.gi
// Include/Exclude Hardware Multiplier
54
`ifdef MULTIPLIER
55
`undef MULTIPLIER
56
`endif
57
 
58 33 olivier.gi
//----------------------------------------------------------------------------
59
// REMOTE DEBUGGING INTERFACE CONFIGURATION
60
//----------------------------------------------------------------------------
61
 
62
// Include Debug interface
63
`ifdef DBG_EN
64
`undef DBG_EN
65
`endif
66
 
67
// Debug interface selection
68
`ifdef DBG_UART
69
`undef DBG_UART
70
`endif
71
`ifdef DBG_JTAG
72
`undef DBG_JTAG
73
`endif
74
 
75
// Number of hardware breakpoints
76
`ifdef DBG_HWBRK_0
77
`undef DBG_HWBRK_0
78
`endif
79
`ifdef DBG_HWBRK_1
80
`undef DBG_HWBRK_1
81
`endif
82
`ifdef DBG_HWBRK_2
83
`undef DBG_HWBRK_2
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`endif
85
`ifdef DBG_HWBRK_3
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`undef DBG_HWBRK_3
87
`endif
88
 
89
 
90
//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//=====        SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!!      =====//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
98
//==========================================================================//
99
 
100
// Program and Data Memory sizes
101 72 olivier.gi
`ifdef PMEM_SIZE_59_KB
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`undef PMEM_SIZE_59_KB
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`endif
104
`ifdef PMEM_SIZE_55_KB
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`undef PMEM_SIZE_55_KB
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`endif
107
`ifdef PMEM_SIZE_54_KB
108
`undef PMEM_SIZE_54_KB
109
`endif
110
`ifdef PMEM_SIZE_51_KB
111
`undef PMEM_SIZE_51_KB
112
`endif
113
`ifdef PMEM_SIZE_48_KB
114
`undef PMEM_SIZE_48_KB
115
`endif
116
`ifdef PMEM_SIZE_41_KB
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`undef PMEM_SIZE_41_KB
118
`endif
119
`ifdef PMEM_SIZE_32_KB
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`undef PMEM_SIZE_32_KB
121
`endif
122
`ifdef PMEM_SIZE_24_KB
123
`undef PMEM_SIZE_24_KB
124
`endif
125
`ifdef PMEM_SIZE_16_KB
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`undef PMEM_SIZE_16_KB
127
`endif
128
`ifdef PMEM_SIZE_12_KB
129
`undef PMEM_SIZE_12_KB
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`endif
131
`ifdef PMEM_SIZE_8_KB
132
`undef PMEM_SIZE_8_KB
133
`endif
134
`ifdef PMEM_SIZE_4_KB
135
`undef PMEM_SIZE_4_KB
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`endif
137
`ifdef PMEM_SIZE_2_KB
138
`undef PMEM_SIZE_2_KB
139
`endif
140
`ifdef PMEM_SIZE_1_KB
141
`undef PMEM_SIZE_1_KB
142
`endif
143
`ifdef DMEM_SIZE_32_KB
144
`undef DMEM_SIZE_32_KB
145
`endif
146
`ifdef DMEM_SIZE_24_KB
147
`undef DMEM_SIZE_24_KB
148
`endif
149
`ifdef DMEM_SIZE_16_KB
150
`undef DMEM_SIZE_16_KB
151
`endif
152
`ifdef DMEM_SIZE_10_KB
153
`undef DMEM_SIZE_10_KB
154
`endif
155
`ifdef DMEM_SIZE_8_KB
156
`undef DMEM_SIZE_8_KB
157
`endif
158
`ifdef DMEM_SIZE_5_KB
159
`undef DMEM_SIZE_5_KB
160
`endif
161
`ifdef DMEM_SIZE_4_KB
162
`undef DMEM_SIZE_4_KB
163
`endif
164
`ifdef DMEM_SIZE_2p5_KB
165
`undef DMEM_SIZE_2p5_KB
166
`endif
167
`ifdef DMEM_SIZE_2_KB
168
`undef DMEM_SIZE_2_KB
169
`endif
170
`ifdef DMEM_SIZE_1_KB
171
`undef DMEM_SIZE_1_KB
172
`endif
173
`ifdef DMEM_SIZE_512_B
174
`undef DMEM_SIZE_512_B
175
`endif
176
`ifdef DMEM_SIZE_256_B
177
`undef DMEM_SIZE_256_B
178
`endif
179
`ifdef DMEM_SIZE_128_B
180
`undef DMEM_SIZE_128_B
181
`endif
182 33 olivier.gi
`ifdef PMEM_SIZE
183
`undef PMEM_SIZE
184
`endif
185 72 olivier.gi
`ifdef PMEM_AWIDTH
186
`undef PMEM_AWIDTH
187
`endif
188 33 olivier.gi
`ifdef DMEM_SIZE
189
`undef DMEM_SIZE
190
`endif
191 72 olivier.gi
`ifdef DMEM_AWIDTH
192
`undef DMEM_AWIDTH
193
`endif
194 33 olivier.gi
 
195
// Data Memory Base Adresses
196
`ifdef DMEM_BASE
197
`undef DMEM_BASE
198
`endif
199
 
200
// Program & Data Memory most significant address bit (for 16 bit words)
201
`ifdef PMEM_MSB
202
`undef PMEM_MSB
203
`endif
204
`ifdef DMEM_MSB
205
`undef DMEM_MSB
206
`endif
207
 
208
 
209
// Instructions type
210
`ifdef INST_SO
211
`undef INST_SO
212
`endif
213
`ifdef INST_JMP
214
`undef INST_JMP
215
`endif
216
`ifdef INST_TO
217
`undef INST_TO
218
`endif
219
 
220
// Single-operand arithmetic
221
`ifdef RRC
222
`undef RRC
223
`endif
224
`ifdef SWPB
225
`undef SWPB
226
`endif
227
`ifdef RRA
228
`undef RRA
229
`endif
230
`ifdef SXT
231
`undef SXT
232
`endif
233
`ifdef PUSH
234
`undef PUSH
235
`endif
236
`ifdef CALL
237
`undef CALL
238
`endif
239
`ifdef RETI
240
`undef RETI
241
`endif
242
`ifdef IRQ
243
`undef IRQ
244
`endif
245
 
246
// Conditional jump
247
`ifdef JNE
248
`undef JNE
249
`endif
250
`ifdef JEQ
251
`undef JEQ
252
`endif
253
`ifdef JNC
254
`undef JNC
255
`endif
256
`ifdef JC
257
`undef JC
258
`endif
259
`ifdef JN
260
`undef JN
261
`endif
262
`ifdef JGE
263
`undef JGE
264
`endif
265
`ifdef JL
266
`undef JL
267
`endif
268
`ifdef JMP
269
`undef JMP
270
`endif
271
 
272
// Two-operand arithmetic
273
`ifdef MOV
274
`undef MOV
275
`endif
276
`ifdef ADD
277
`undef ADD
278
`endif
279
`ifdef ADDC
280
`undef ADDC
281
`endif
282
`ifdef SUBC
283
`undef SUBC
284
`endif
285
`ifdef SUB
286
`undef SUB
287
`endif
288
`ifdef CMP
289
`undef CMP
290
`endif
291
`ifdef DADD
292
`undef DADD
293
`endif
294
`ifdef BIT
295
`undef BIT
296
`endif
297
`ifdef BIC
298
`undef BIC
299
`endif
300
`ifdef BIS
301
`undef BIS
302
`endif
303
`ifdef XOR
304
`undef XOR
305
`endif
306
`ifdef AND
307
`undef AND
308
`endif
309
 
310
// Addressing modes
311
`ifdef DIR
312
`undef DIR
313
`endif
314
`ifdef IDX
315
`undef IDX
316
`endif
317
`ifdef INDIR
318
`undef INDIR
319
`endif
320
`ifdef INDIR_I
321
`undef INDIR_I
322
`endif
323
`ifdef SYMB
324
`undef SYMB
325
`endif
326
`ifdef IMM
327
`undef IMM
328
`endif
329
`ifdef ABS
330
`undef ABS
331
`endif
332
`ifdef CONST
333
`undef CONST
334
`endif
335
 
336
// Execution state machine
337
`ifdef E_IRQ_0
338
`undef E_IRQ_0
339
`endif
340
`ifdef E_IRQ_1
341
`undef E_IRQ_1
342
`endif
343
`ifdef E_IRQ_2
344
`undef E_IRQ_2
345
`endif
346
`ifdef E_IRQ_3
347
`undef E_IRQ_3
348
`endif
349
`ifdef E_IRQ_4
350
`undef E_IRQ_4
351
`endif
352
`ifdef E_SRC_AD
353
`undef E_SRC_AD
354
`endif
355
`ifdef E_SRC_RD
356
`undef E_SRC_RD
357
`endif
358
`ifdef E_SRC_WR
359
`undef E_SRC_WR
360
`endif
361
`ifdef E_DST_AD
362
`undef E_DST_AD
363
`endif
364
`ifdef E_DST_RD
365
`undef E_DST_RD
366
`endif
367
`ifdef E_DST_WR
368
`undef E_DST_WR
369
`endif
370
`ifdef E_EXEC
371
`undef E_EXEC
372
`endif
373
`ifdef E_JUMP
374
`undef E_JUMP
375
`endif
376
`ifdef E_IDLE
377
`undef E_IDLE
378
`endif
379
 
380
// ALU control signals
381
`ifdef ALU_SRC_INV
382
`undef ALU_SRC_INV
383
`endif
384
`ifdef ALU_INC
385
`undef ALU_INC
386
`endif
387
`ifdef ALU_INC_C
388
`undef ALU_INC_C
389
`endif
390
`ifdef ALU_ADD
391
`undef ALU_ADD
392
`endif
393
`ifdef ALU_AND
394
`undef ALU_AND
395
`endif
396
`ifdef ALU_OR
397
`undef ALU_OR
398
`endif
399
`ifdef ALU_XOR
400
`undef ALU_XOR
401
`endif
402
`ifdef ALU_DADD
403
`undef ALU_DADD
404
`endif
405
`ifdef ALU_STAT_7
406
`undef ALU_STAT_7
407
`endif
408
`ifdef ALU_STAT_F
409
`undef ALU_STAT_F
410
`endif
411
`ifdef ALU_SHIFT
412
`undef ALU_SHIFT
413
`endif
414
`ifdef EXEC_NO_WR
415
`undef EXEC_NO_WR
416
`endif
417
 
418
// Debug interface
419
`ifdef DBG_UART_WR
420
`undef DBG_UART_WR
421
`endif
422
`ifdef DBG_UART_BW
423
`undef DBG_UART_BW
424
`endif
425
`ifdef DBG_UART_ADDR
426
`undef DBG_UART_ADDR
427
`endif
428
 
429
// Debug interface CPU_CTL register
430
`ifdef HALT
431
`undef HALT
432
`endif
433
`ifdef RUN
434
`undef RUN
435
`endif
436
`ifdef ISTEP
437
`undef ISTEP
438
`endif
439
`ifdef SW_BRK_EN
440
`undef SW_BRK_EN
441
`endif
442
`ifdef FRZ_BRK_EN
443
`undef FRZ_BRK_EN
444
`endif
445
`ifdef RST_BRK_EN
446
`undef RST_BRK_EN
447
`endif
448
`ifdef CPU_RST
449
`undef CPU_RST
450
`endif
451
 
452
// Debug interface CPU_STAT register
453
`ifdef HALT_RUN
454
`undef HALT_RUN
455
`endif
456
`ifdef PUC_PND
457
`undef PUC_PND
458
`endif
459
`ifdef SWBRK_PND
460
`undef SWBRK_PND
461
`endif
462
`ifdef HWBRK0_PND
463
`undef HWBRK0_PND
464
`endif
465
`ifdef HWBRK1_PND
466
`undef HWBRK1_PND
467
`endif
468
 
469
// Debug interface BRKx_CTL register
470
`ifdef BRK_MODE_RD
471
`undef BRK_MODE_RD
472
`endif
473
`ifdef BRK_MODE_WR
474
`undef BRK_MODE_WR
475
`endif
476
`ifdef BRK_MODE
477
`undef BRK_MODE
478
`endif
479
`ifdef BRK_EN
480
`undef BRK_EN
481
`endif
482
`ifdef BRK_I_EN
483
`undef BRK_I_EN
484
`endif
485
`ifdef BRK_RANGE
486
`undef BRK_RANGE
487
`endif
488
 
489
// Basic clock module: BCSCTL1 Control Register
490
`ifdef DIVAx
491
`undef DIVAx
492
`endif
493
 
494
// Basic clock module: BCSCTL2 Control Register
495
`ifdef SELS
496
`undef SELS
497
`endif
498
`ifdef DIVSx
499
`undef DIVSx
500
`endif
501
 
502
// Timer A: TACTL Control Register
503
`ifdef TASSELx
504
`undef TASSELx
505
`endif
506
`ifdef TAIDx
507
`undef TAIDx
508
`endif
509
`ifdef TAMCx
510
`undef TAMCx
511
`endif
512
`ifdef TACLR
513
`undef TACLR
514
`endif
515
`ifdef TAIE
516
`undef TAIE
517
`endif
518
`ifdef TAIFG
519
`undef TAIFG
520
`endif
521
 
522
// Timer A: TACCTLx Capture/Compare Control Register
523
`ifdef TACMx
524
`undef TACMx
525
`endif
526
`ifdef TACCISx
527
`undef TACCISx
528
`endif
529
`ifdef TASCS
530
`undef TASCS
531
`endif
532
`ifdef TASCCI
533
`undef TASCCI
534
`endif
535
`ifdef TACAP
536
`undef TACAP
537
`endif
538
`ifdef TAOUTMODx
539
`undef TAOUTMODx
540
`endif
541
`ifdef TACCIE
542
`undef TACCIE
543
`endif
544
`ifdef TACCI
545
`undef TACCI
546
`endif
547
`ifdef TAOUT
548
`undef TAOUT
549
`endif
550
`ifdef TACOV
551
`undef TACOV
552
`endif
553
`ifdef TACCIFG
554
`undef TACCIFG
555
`endif
556
 
557
//
558
// DEBUG INTERFACE EXTRA CONFIGURATION
559
//======================================
560
 
561
// Debug interface: Software breakpoint opcode
562
`ifdef DBG_SWBRK_OP
563
`undef DBG_SWBRK_OP
564
`endif
565
 
566
// Debug UART interface auto data synchronization
567
`ifdef DBG_UART_AUTO_SYNC
568
`undef DBG_UART_AUTO_SYNC
569
`endif
570
 
571
// Debug UART interface data rate
572
`ifdef DBG_UART_BAUD
573
`undef DBG_UART_BAUD
574
`endif
575
`ifdef DBG_DCO_FREQ
576
`undef DBG_DCO_FREQ
577
`endif
578
`ifdef DBG_UART_CNT
579
`undef DBG_UART_CNT
580
`endif
581 57 olivier.gi
 
582
// Enable/Disable the hardware breakpoint RANGE mode
583
`ifdef HWBRK_RANGE
584
`undef HWBRK_RANGE
585 67 olivier.gi
`endif
586
 
587 74 olivier.gi
// Counter width for the debug interface UART
588
`ifdef DBG_UART_XFER_CNT_W
589
`undef DBG_UART_XFER_CNT_W
590
`endif
591
 
592 67 olivier.gi
//
593
// MULTIPLIER CONFIGURATION
594
//======================================
595
 
596
`ifdef MPY_16x16
597
`undef MPY_16x16
598
`endif

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