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olivier.gi |
/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/*===========================================================================*/
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/* MEMORY DEFINITION FILE */
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/*---------------------------------------------------------------------------*/
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/* */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/*---------------------------------------------------------------------------*/
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/* $Rev: 19 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
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/*===========================================================================*/
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olivier.gi |
.set PER_LENGTH, PER_SIZE_HEX
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olivier.gi |
/*---------------------------------------------------------------------------*/
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/* SFR */
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/*---------------------------------------------------------------------------*/
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.set IE1, 0x0000
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.set IE1_HI, 0x0001
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.set IFG1, 0x0002
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.set IFG1_HI, 0x0003
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.set CPU_ID_LO, 0x0004
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.set CPU_ID_HI, 0x0006
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olivier.gi |
.set CPU_NR, 0x0008
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olivier.gi |
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/*---------------------------------------------------------------------------*/
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/* GPIOs */
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/*---------------------------------------------------------------------------*/
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.set P1IN, 0x0020
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.set P1OUT, 0x0021
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.set P1DIR, 0x0022
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.set P1IFG, 0x0023
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.set P1IES, 0x0024
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.set P1IE, 0x0025
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.set P1SEL, 0x0026
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.set P2IN, 0x0028
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.set P2OUT, 0x0029
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.set P2DIR, 0x002A
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.set P2IFG, 0x002B
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.set P2IES, 0x002C
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.set P2IE, 0x002D
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.set P2SEL, 0x002E
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.set P3IN, 0x0018
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.set P3OUT, 0x0019
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.set P3DIR, 0x001A
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.set P3SEL, 0x001B
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.set P4IN, 0x001C
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.set P4OUT, 0x001D
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.set P4DIR, 0x001E
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.set P4SEL, 0x001F
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olivier.gi |
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olivier.gi |
.set P5IN, 0x0030
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.set P5OUT, 0x0031
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.set P5DIR, 0x0032
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.set P5SEL, 0x0033
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.set P6IN, 0x0034
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.set P6OUT, 0x0035
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.set P6DIR, 0x0036
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.set P6SEL, 0x0037
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/*---------------------------------------------------------------------------*/
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/* BASIC CLOCK MODULE */
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/*---------------------------------------------------------------------------*/
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.set BCSCTL1, 0x0057
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.set BCSCTL2, 0x0058
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/*---------------------------------------------------------------------------*/
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/* WATCHDOG TIMER */
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/*---------------------------------------------------------------------------*/
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.set WDTCTL, 0x0120
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/*---------------------------------------------------------------------------*/
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/* HARDWARE MULTIPLIER */
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/*---------------------------------------------------------------------------*/
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.set MPY, 0x0130
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.set MPYS, 0x0132
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.set MAC, 0x0134
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.set MACS, 0x0136
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.set OP2, 0x0138
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.set RESLO, 0x013A
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.set RESHI, 0x013C
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.set SUMEXT, 0x013E
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/*---------------------------------------------------------------------------*/
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/* TIMER A */
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/*---------------------------------------------------------------------------*/
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.set TACTL, 0x0160
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.set TAR, 0x0170
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.set TACCTL0, 0x0162
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.set TACCR0, 0x0172
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.set TACCTL1, 0x0164
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.set TACCR1, 0x0174
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.set TACCTL2, 0x0166
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.set TACCR2, 0x0176
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.set TAIV, 0x012E
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/*---------------------------------------------------------------------------*/
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/* DATA MEMORY MAPPING */
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/*---------------------------------------------------------------------------*/
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.set DMEM_BASE, PER_SIZE
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.set DMEM_200, (DMEM_BASE+0x00)
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.set DMEM_201, (DMEM_BASE+0x01)
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.set DMEM_202, (DMEM_BASE+0x02)
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.set DMEM_203, (DMEM_BASE+0x03)
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.set DMEM_204, (DMEM_BASE+0x04)
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.set DMEM_205, (DMEM_BASE+0x05)
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.set DMEM_206, (DMEM_BASE+0x06)
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.set DMEM_207, (DMEM_BASE+0x07)
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.set DMEM_208, (DMEM_BASE+0x08)
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.set DMEM_209, (DMEM_BASE+0x09)
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.set DMEM_20A, (DMEM_BASE+0x0A)
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.set DMEM_20B, (DMEM_BASE+0x0B)
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.set DMEM_20C, (DMEM_BASE+0x0C)
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.set DMEM_20D, (DMEM_BASE+0x0D)
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.set DMEM_20E, (DMEM_BASE+0x0E)
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.set DMEM_20F, (DMEM_BASE+0x0F)
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.set DMEM_210, (DMEM_BASE+0x10)
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.set DMEM_211, (DMEM_BASE+0x11)
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.set DMEM_212, (DMEM_BASE+0x12)
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.set DMEM_213, (DMEM_BASE+0x13)
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.set DMEM_214, (DMEM_BASE+0x14)
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.set DMEM_215, (DMEM_BASE+0x15)
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.set DMEM_216, (DMEM_BASE+0x16)
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.set DMEM_217, (DMEM_BASE+0x17)
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.set DMEM_218, (DMEM_BASE+0x18)
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.set DMEM_219, (DMEM_BASE+0x19)
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.set DMEM_21A, (DMEM_BASE+0x1A)
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.set DMEM_21B, (DMEM_BASE+0x1B)
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.set DMEM_21C, (DMEM_BASE+0x1C)
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.set DMEM_21D, (DMEM_BASE+0x1D)
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.set DMEM_21E, (DMEM_BASE+0x1E)
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.set DMEM_21F, (DMEM_BASE+0x1F)
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.set DMEM_220, (DMEM_BASE+0x20)
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.set DMEM_221, (DMEM_BASE+0x21)
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.set DMEM_222, (DMEM_BASE+0x22)
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.set DMEM_223, (DMEM_BASE+0x23)
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.set DMEM_224, (DMEM_BASE+0x24)
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.set DMEM_225, (DMEM_BASE+0x25)
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.set DMEM_226, (DMEM_BASE+0x26)
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.set DMEM_227, (DMEM_BASE+0x27)
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.set DMEM_228, (DMEM_BASE+0x28)
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.set DMEM_229, (DMEM_BASE+0x29)
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.set DMEM_22A, (DMEM_BASE+0x2A)
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.set DMEM_22B, (DMEM_BASE+0x2B)
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.set DMEM_22C, (DMEM_BASE+0x2C)
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.set DMEM_22D, (DMEM_BASE+0x2D)
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.set DMEM_22E, (DMEM_BASE+0x2E)
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.set DMEM_22F, (DMEM_BASE+0x2F)
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.set DMEM_230, (DMEM_BASE+0x30)
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.set DMEM_231, (DMEM_BASE+0x31)
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.set DMEM_232, (DMEM_BASE+0x32)
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.set DMEM_233, (DMEM_BASE+0x33)
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.set DMEM_234, (DMEM_BASE+0x34)
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.set DMEM_235, (DMEM_BASE+0x35)
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.set DMEM_236, (DMEM_BASE+0x36)
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.set DMEM_237, (DMEM_BASE+0x37)
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.set DMEM_238, (DMEM_BASE+0x38)
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.set DMEM_239, (DMEM_BASE+0x39)
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.set DMEM_23A, (DMEM_BASE+0x3A)
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.set DMEM_23B, (DMEM_BASE+0x3B)
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.set DMEM_23C, (DMEM_BASE+0x3C)
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.set DMEM_23D, (DMEM_BASE+0x3D)
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.set DMEM_23E, (DMEM_BASE+0x3E)
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.set DMEM_23F, (DMEM_BASE+0x3F)
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.set DMEM_240, (DMEM_BASE+0x40)
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.set DMEM_241, (DMEM_BASE+0x41)
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.set DMEM_242, (DMEM_BASE+0x42)
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.set DMEM_243, (DMEM_BASE+0x43)
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.set DMEM_244, (DMEM_BASE+0x44)
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.set DMEM_245, (DMEM_BASE+0x45)
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.set DMEM_246, (DMEM_BASE+0x46)
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.set DMEM_247, (DMEM_BASE+0x47)
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.set DMEM_248, (DMEM_BASE+0x48)
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.set DMEM_249, (DMEM_BASE+0x49)
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.set DMEM_24A, (DMEM_BASE+0x4A)
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.set DMEM_24B, (DMEM_BASE+0x4B)
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.set DMEM_24C, (DMEM_BASE+0x4C)
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.set DMEM_24D, (DMEM_BASE+0x4D)
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.set DMEM_24E, (DMEM_BASE+0x4E)
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.set DMEM_24F, (DMEM_BASE+0x4F)
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.set DMEM_250, (DMEM_BASE+0x50)
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.set DMEM_251, (DMEM_BASE+0x51)
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.set DMEM_252, (DMEM_BASE+0x52)
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.set DMEM_253, (DMEM_BASE+0x53)
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.set DMEM_254, (DMEM_BASE+0x54)
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.set DMEM_255, (DMEM_BASE+0x55)
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.set DMEM_256, (DMEM_BASE+0x56)
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.set DMEM_257, (DMEM_BASE+0x57)
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.set DMEM_258, (DMEM_BASE+0x58)
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.set DMEM_259, (DMEM_BASE+0x59)
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.set DMEM_25A, (DMEM_BASE+0x5A)
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.set DMEM_25B, (DMEM_BASE+0x5B)
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.set DMEM_25C, (DMEM_BASE+0x5C)
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.set DMEM_25D, (DMEM_BASE+0x5D)
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.set DMEM_25E, (DMEM_BASE+0x5E)
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.set DMEM_25F, (DMEM_BASE+0x5F)
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.set DMEM_260, (DMEM_BASE+0x60)
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.set DMEM_261, (DMEM_BASE+0x61)
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.set DMEM_262, (DMEM_BASE+0x62)
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.set DMEM_263, (DMEM_BASE+0x63)
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.set DMEM_264, (DMEM_BASE+0x64)
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.set DMEM_265, (DMEM_BASE+0x65)
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.set DMEM_266, (DMEM_BASE+0x66)
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.set DMEM_267, (DMEM_BASE+0x67)
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239 |
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.set DMEM_268, (DMEM_BASE+0x68)
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240 |
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.set DMEM_269, (DMEM_BASE+0x69)
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241 |
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.set DMEM_26A, (DMEM_BASE+0x6A)
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242 |
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.set DMEM_26B, (DMEM_BASE+0x6B)
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243 |
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.set DMEM_26C, (DMEM_BASE+0x6C)
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244 |
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.set DMEM_26D, (DMEM_BASE+0x6D)
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245 |
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.set DMEM_26E, (DMEM_BASE+0x6E)
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246 |
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.set DMEM_26F, (DMEM_BASE+0x6F)
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247 |
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248 |
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.set DMEM_300, (DMEM_BASE+0x100)
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249 |
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250 |
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/*---------------------------------------------------------------------------*/
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251 |
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/* PROGRAM MEMORY MAPPING */
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252 |
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/*---------------------------------------------------------------------------*/
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253 |
200 |
olivier.gi |
.set PMEM_LENGTH, PMEM_SIZE
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254 |
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.set PMEM_EDE_LENGTH, PMEM_EDE_SIZE
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