URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [run/] [load_waveform.sav] - Blame information for rev 211

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[timestart] 2700000
[size] 1680 990
[pos] -678 -4
*-23.404364 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] tb_openMSP430.
[treeopen] tb_openMSP430.dut.
@22
tb_openMSP430.r15[15:0]
tb_openMSP430.error[31:0]
tb_openMSP430.dut.pmem_dout[15:0]
@820
tb_openMSP430.inst_full[255:0]
@22
tb_openMSP430.inst_pc[15:0]
@820
tb_openMSP430.e_state[255:0]
tb_openMSP430.i_state[255:0]
@22
tb_openMSP430.r1[15:0]
tb_openMSP430.r4[15:0]
tb_openMSP430.r6[15:0]
tb_openMSP430.mem250[15:0]
tb_openMSP430.mem24E[15:0]
@200
-
@28
(10)tb_openMSP430.wkup[13:0]
(10)tb_openMSP430.irq[13:0]
(11)tb_openMSP430.wkup[13:0]
(11)tb_openMSP430.irq[13:0]
@200
-
@28
tb_openMSP430.dco_wkup
tb_openMSP430.dco_enable
tb_openMSP430.dco_clk
@200
-
@28
tb_openMSP430.lfxt_wkup
tb_openMSP430.lfxt_enable
tb_openMSP430.lfxt_clk
@200
-
@28
tb_openMSP430.dut.clock_module_0.cpu_en
@29
tb_openMSP430.dut.clock_module_0.dbg_en
@28
tb_openMSP430.dut.frontend_0.cpuoff
tb_openMSP430.dut.clock_module_0.oscoff
tb_openMSP430.dut.clock_module_0.scg0
tb_openMSP430.dut.clock_module_0.scg1
@200
-
@28
tb_openMSP430.mclk
tb_openMSP430.smclk
tb_openMSP430.aclk
tb_openMSP430.dbg_clk
tb_openMSP430.dut.clock_module_0.mclk_enable
tb_openMSP430.dut.clock_module_0.mclk_wkup
[pattern_trace] 1
[pattern_trace] 0

Line No.	Rev	Author	Line
1	134	olivier.gi	`[timestart] 2700000`
2			`[size] 1680 990`
3			`[pos] -678 -4`
4			`*-23.404364 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1`
5	2	olivier.gi	`[treeopen] tb_openMSP430.`
6	134	olivier.gi	`[treeopen] tb_openMSP430.dut.`
7	2	olivier.gi	`@22`
8			`tb_openMSP430.r15[15:0]`
9			`tb_openMSP430.error[31:0]`
10	134	olivier.gi	`tb_openMSP430.dut.pmem_dout[15:0]`
11	2	olivier.gi	`@820`
12			`tb_openMSP430.inst_full[255:0]`
13			`@22`
14			`tb_openMSP430.inst_pc[15:0]`
15			`@820`
16			`tb_openMSP430.e_state[255:0]`
17			`tb_openMSP430.i_state[255:0]`
18			`@22`
19			`tb_openMSP430.r1[15:0]`
20			`tb_openMSP430.r4[15:0]`
21			`tb_openMSP430.r6[15:0]`
22			`tb_openMSP430.mem250[15:0]`
23			`tb_openMSP430.mem24E[15:0]`
24	134	olivier.gi	`@200`
25			`-`
26			`@28`
27			`(10)tb_openMSP430.wkup[13:0]`
28			`(10)tb_openMSP430.irq[13:0]`
29			`(11)tb_openMSP430.wkup[13:0]`
30			`(11)tb_openMSP430.irq[13:0]`
31			`@200`
32			`-`
33			`@28`
34			`tb_openMSP430.dco_wkup`
35			`tb_openMSP430.dco_enable`
36			`tb_openMSP430.dco_clk`
37			`@200`
38			`-`
39			`@28`
40			`tb_openMSP430.lfxt_wkup`
41			`tb_openMSP430.lfxt_enable`
42			`tb_openMSP430.lfxt_clk`
43			`@200`
44			`-`
45			`@28`
46			`tb_openMSP430.dut.clock_module_0.cpu_en`
47			`@29`
48			`tb_openMSP430.dut.clock_module_0.dbg_en`
49			`@28`
50			`tb_openMSP430.dut.frontend_0.cpuoff`
51			`tb_openMSP430.dut.clock_module_0.oscoff`
52			`tb_openMSP430.dut.clock_module_0.scg0`
53			`tb_openMSP430.dut.clock_module_0.scg1`
54			`@200`
55			`-`
56			`@28`
57			`tb_openMSP430.mclk`
58			`tb_openMSP430.smclk`
59			`tb_openMSP430.aclk`
60			`tb_openMSP430.dbg_clk`
61			`tb_openMSP430.dut.clock_module_0.mclk_enable`
62			`tb_openMSP430.dut.clock_module_0.mclk_wkup`
63			`[pattern_trace] 1`
64			`[pattern_trace] 0`

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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [run/] [load_waveform.sav] - Blame information for rev 211