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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                               CLOCK MODULE                                */
/*---------------------------------------------------------------------------*/
/* Test the clock module:                                                    */
/*                        - Check the ACLK and SMCLK clock generation.       */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 111 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $          */
/*===========================================================================*/
 
.global main
 
.set   DMEM_BASE, (__data_start     )
.set   DMEM_200,  (__data_start+0x00)
.set   DMEM_250,  (__data_start+0x50)
 
.set   BCSCTL1, 0x0057
.set   BCSCTL2, 0x0058
 
 
WAIT_FUNC:
        dec r14
        jnz WAIT_FUNC
        ret
 
main:
        mov #DMEM_250, r1       ; # Initialize stack pointer
        mov   #0x0000, &DMEM_200
        mov   #0x0000, r15
 
       /* --------------                ACLK GENERATION             ----------------- */
 
        mov.b  #0x00, &BCSCTL1  ; # Div /1
        mov    #0x0001, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov.b  #0x10, &BCSCTL1  ; # Div /2
        mov    #0x0002, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov.b  #0x20, &BCSCTL1  ; # Div /4
        mov    #0x0003, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov.b  #0x30, &BCSCTL1  ; # Div /8
        mov    #0x0004, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov  #0x1000, r15
 
 
       /* --------------      SMCLK GENERATION - LFXT_CLK INPUT    ----------------- */
 
        mov.b  #0x08, &BCSCTL2  ; # Div /1
        mov    #0x1001, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov.b  #0x0A, &BCSCTL2  ; # Div /2
        mov    #0x1002, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov.b  #0x0C, &BCSCTL2  ; # Div /4
        mov    #0x1003, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov.b  #0x0E, &BCSCTL2  ; # Div /8
        mov    #0x1004, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov  #0x2000, r15
 
 
       /* --------------      SMCLK GENERATION - DCO_CLK INPUT     ----------------- */
 
        mov.b  #0x00, &BCSCTL2  ; # Div /1
        mov    #0x2001, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov.b  #0x02, &BCSCTL2  ; # Div /2
        mov    #0x2002, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov.b  #0x04, &BCSCTL2  ; # Div /4
        mov    #0x2003, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov.b  #0x06, &BCSCTL2  ; # Div /8
        mov    #0x2004, r15
        mov    #0x0130, r14
        call   #WAIT_FUNC
 
        mov  #0x3000, r15
 
 
        /* --------------      CPU ENABLE - CPU_EN INPUT     ----------------- */
 
        mov    #0x0800, r14
        call   #WAIT_FUNC
 
        mov  #0x4000, r15
 
 
        /* --------------      RD/WR ACCESS TO REGISTERS     ----------------- */
 
        mov.b     #0x00, &BCSCTL1
        mov.b     #0x00, &BCSCTL2
        mov.b  &BCSCTL1, r4
        mov.b  &BCSCTL2, r5
 
        mov.b     #0xff, &BCSCTL1
        mov.b  &BCSCTL1, r6
        mov.b  &BCSCTL2, r7
 
        mov.b     #0x00, &BCSCTL1
        mov.b  &BCSCTL1, r8
        mov.b  &BCSCTL2, r9
 
        mov.b     #0xff, &BCSCTL2
        mov.b  &BCSCTL1, r10
        mov.b  &BCSCTL2, r11
 
        mov.b     #0x00, &BCSCTL2
        mov.b  &BCSCTL1, r12
        mov.b  &BCSCTL2, r13
 
 
        mov     #0x5000, r15
        mov     #0x0010, r14
        call    #WAIT_FUNC
 
 
        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
.section .vectors, "a"
.word end_of_test        ; Interrupt  0 (lowest priority)    
.word end_of_test        ; Interrupt  1                      
.word end_of_test        ; Interrupt  2                      
.word end_of_test        ; Interrupt  3                      
.word end_of_test        ; Interrupt  4                      
.word end_of_test        ; Interrupt  5                      
.word end_of_test        ; Interrupt  6                      
.word end_of_test        ; Interrupt  7                      
.word end_of_test        ; Interrupt  8                      
.word end_of_test        ; Interrupt  9                      
.word end_of_test        ; Interrupt 10                      Watchdog timer
.word end_of_test        ; Interrupt 11                      
.word end_of_test        ; Interrupt 12                      
.word end_of_test        ; Interrupt 13                      
.word end_of_test        ; Interrupt 14                      NMI
.word main               ; Interrupt 15 (highest priority)   RESET

Line No.	Rev	Author	Line
1	2	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24			`/* CLOCK MODULE */`
25			`/---------------------------------------------------------------------------/`
26			`/* Test the clock module: */`
27			`/* - Check the ACLK and SMCLK clock generation. */`
28	18	olivier.gi	`/* */`
29			`/* Author(s): */`
30			`/* - Olivier Girard, olgirard@gmail.com */`
31			`/* */`
32			`/---------------------------------------------------------------------------/`
33	19	olivier.gi	`/* $Rev: 111 $ */`
34			`/* $LastChangedBy: olivier.girard $ */`
35			`/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $ */`
36	2	olivier.gi	`/===========================================================================/`
37
38			`.global main`
39
40	111	olivier.gi	`.set DMEM_BASE, (__data_start )`
41			`.set DMEM_200, (__data_start+0x00)`
42			`.set DMEM_250, (__data_start+0x50)`
43
44	2	olivier.gi	`.set BCSCTL1, 0x0057`
45			`.set BCSCTL2, 0x0058`
46
47
48			`WAIT_FUNC:`
49			`dec r14`
50			`jnz WAIT_FUNC`
51			`ret`
52
53			`main:`
54	111	olivier.gi	`mov #DMEM_250, r1 ; # Initialize stack pointer`
55			`mov #0x0000, &DMEM_200`
56			`mov #0x0000, r15`
57	2	olivier.gi
58			`/* -------------- ACLK GENERATION ----------------- */`
59
60			`mov.b #0x00, &BCSCTL1 ; # Div /1`
61			`mov #0x0001, r15`
62			`mov #0x0130, r14`
63			`call #WAIT_FUNC`
64
65			`mov.b #0x10, &BCSCTL1 ; # Div /2`
66			`mov #0x0002, r15`
67			`mov #0x0130, r14`
68			`call #WAIT_FUNC`
69
70			`mov.b #0x20, &BCSCTL1 ; # Div /4`
71			`mov #0x0003, r15`
72			`mov #0x0130, r14`
73			`call #WAIT_FUNC`
74
75			`mov.b #0x30, &BCSCTL1 ; # Div /8`
76			`mov #0x0004, r15`
77			`mov #0x0130, r14`
78			`call #WAIT_FUNC`
79
80			`mov #0x1000, r15`
81
82
83			`/* -------------- SMCLK GENERATION - LFXT_CLK INPUT ----------------- */`
84
85			`mov.b #0x08, &BCSCTL2 ; # Div /1`
86			`mov #0x1001, r15`
87			`mov #0x0130, r14`
88			`call #WAIT_FUNC`
89
90			`mov.b #0x0A, &BCSCTL2 ; # Div /2`
91			`mov #0x1002, r15`
92			`mov #0x0130, r14`
93			`call #WAIT_FUNC`
94
95			`mov.b #0x0C, &BCSCTL2 ; # Div /4`
96			`mov #0x1003, r15`
97			`mov #0x0130, r14`
98			`call #WAIT_FUNC`
99
100			`mov.b #0x0E, &BCSCTL2 ; # Div /8`
101			`mov #0x1004, r15`
102			`mov #0x0130, r14`
103			`call #WAIT_FUNC`
104
105			`mov #0x2000, r15`
106
107
108			`/* -------------- SMCLK GENERATION - DCO_CLK INPUT ----------------- */`
109
110			`mov.b #0x00, &BCSCTL2 ; # Div /1`
111			`mov #0x2001, r15`
112			`mov #0x0130, r14`
113			`call #WAIT_FUNC`
114
115			`mov.b #0x02, &BCSCTL2 ; # Div /2`
116			`mov #0x2002, r15`
117			`mov #0x0130, r14`
118			`call #WAIT_FUNC`
119
120			`mov.b #0x04, &BCSCTL2 ; # Div /4`
121			`mov #0x2003, r15`
122			`mov #0x0130, r14`
123			`call #WAIT_FUNC`
124
125			`mov.b #0x06, &BCSCTL2 ; # Div /8`
126			`mov #0x2004, r15`
127			`mov #0x0130, r14`
128			`call #WAIT_FUNC`
129
130			`mov #0x3000, r15`
131
132	106	olivier.gi
133			`/* -------------- CPU ENABLE - CPU_EN INPUT ----------------- */`
134
135			`mov #0x0800, r14`
136			`call #WAIT_FUNC`
137
138			`mov #0x4000, r15`
139
140	111	olivier.gi
141			`/* -------------- RD/WR ACCESS TO REGISTERS ----------------- */`
142
143			`mov.b #0x00, &BCSCTL1`
144			`mov.b #0x00, &BCSCTL2`
145			`mov.b &BCSCTL1, r4`
146			`mov.b &BCSCTL2, r5`
147
148			`mov.b #0xff, &BCSCTL1`
149			`mov.b &BCSCTL1, r6`
150			`mov.b &BCSCTL2, r7`
151
152			`mov.b #0x00, &BCSCTL1`
153			`mov.b &BCSCTL1, r8`
154			`mov.b &BCSCTL2, r9`
155
156			`mov.b #0xff, &BCSCTL2`
157			`mov.b &BCSCTL1, r10`
158			`mov.b &BCSCTL2, r11`
159
160			`mov.b #0x00, &BCSCTL2`
161			`mov.b &BCSCTL1, r12`
162			`mov.b &BCSCTL2, r13`
163
164
165			`mov #0x5000, r15`
166			`mov #0x0010, r14`
167			`call #WAIT_FUNC`
168
169
170	2	olivier.gi	`/* ---------------------- END OF TEST --------------- */`
171			`end_of_test:`
172			`nop`
173			`br #0xffff`
174
175
176			`/* ---------------------- INTERRUPT VECTORS --------------- */`
177
178			`.section .vectors, "a"`
179			`.word end_of_test ; Interrupt 0 (lowest priority)`
180			`.word end_of_test ; Interrupt 1`
181			`.word end_of_test ; Interrupt 2`
182			`.word end_of_test ; Interrupt 3`
183			`.word end_of_test ; Interrupt 4`
184			`.word end_of_test ; Interrupt 5`
185			`.word end_of_test ; Interrupt 6`
186			`.word end_of_test ; Interrupt 7`
187			`.word end_of_test ; Interrupt 8`
188			`.word end_of_test ; Interrupt 9`
189			`.word end_of_test ; Interrupt 10 Watchdog timer`
190			`.word end_of_test ; Interrupt 11`
191			`.word end_of_test ; Interrupt 12`
192			`.word end_of_test ; Interrupt 13`
193			`.word end_of_test ; Interrupt 14 NMI`
194			`.word main ; Interrupt 15 (highest priority) RESET`

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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [clock_module.s43] - Blame information for rev 111