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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [dma_rdwr_8b.v] - Blame information for rev 219

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1 202 olivier.gi
/*===========================================================================*/
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/* Copyright (C) 2001 Authors                                                */
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/*                                                                           */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any   */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer.                                                               */
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/*                                                                           */
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/* This source file is free software; you can redistribute it and/or modify  */
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/* it under the terms of the GNU Lesser General Public License as published  */
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/* by the Free Software Foundation; either version 2.1 of the License, or    */
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/* (at your option) any later version.                                       */
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/*                                                                           */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
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/* License for more details.                                                 */
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/*                                                                           */
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/* You should have received a copy of the GNU Lesser General Public License  */
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/* along with this source; if not, write to the Free Software Foundation,    */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
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/*                                                                           */
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/*===========================================================================*/
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/*                              DMA INTERFACE                                */
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/*---------------------------------------------------------------------------*/
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/* Test the DMA interface:                                                   */
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/*                        - Check Memory RD/WR features.                     */
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/*                                                                           */
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/* Author(s):                                                                */
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/*             - Olivier Girard,    olgirard@gmail.com                       */
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/*                                                                           */
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/*---------------------------------------------------------------------------*/
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/* $Rev$                                                                */
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/* $LastChangedBy$                                          */
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/* $LastChangedDate$          */
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/*===========================================================================*/
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`define VERY_LONG_TIMEOUT
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parameter TMPL8B_CNTRL1  = 16'h0090;
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parameter TMPL8B_CNTRL2  = 16'h0091;
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parameter TMPL8B_CNTRL3  = 16'h0092;
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parameter TMPL8B_CNTRL4  = 16'h0093;
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integer jj;
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integer inst_number_old;
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integer inst_number_diff;
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initial
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   begin
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      $display(" ===============================================");
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      $display("|                 START SIMULATION              |");
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      $display(" ===============================================");
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`ifdef DMA_IF_EN
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      // Disable automatic DMA verification
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      #10;
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      dma_verif_on = 0;
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      repeat(30) @(posedge mclk);
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      stimulus_done = 0;
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      //-------------------------------------------------------------
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      // LOW/HIGH PRIORITY DMA
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      //-------------------------------------------------------------
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      for ( jj=0; jj<=1; jj=jj+1)
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        begin
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           if (jj==0)
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             begin
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                dma_priority=0;
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                $display("\n\n---------------------------------------");
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                $display("   LOW Priority 8B DMA transfer tests");
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                $display("---------------------------------------\n");
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             end
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           else
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             begin
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                dma_priority=1;
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                $display("\n\n---------------------------------------");
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                $display("   HIGH Priority 8B DMA transfer tests");
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                $display("---------------------------------------\n");
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             end
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           // RD/WR ACCESS: Program memory (8b)
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           //--------------------------------------------------------
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           $display("MARCH-X: Program memory 8b:");
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           // Wait random time until MARCH-X starts
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           dma_rand_wait = $urandom_range(1,40);
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           repeat(dma_rand_wait) @(posedge mclk);
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           // Run MARCH-X on program memory
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           // (make sure we don't overwrite firmware, i.e. the first 48 bytes)
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           inst_number_old=inst_number;
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           march_x_8b(('h10000-`PMEM_SIZE+48), 16'hfffe, 1);
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           inst_number_diff=inst_number-inst_number_old;
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           if ( dma_priority & (inst_number_diff>2))   tb_error("CPU is not stopped in high priority mode");
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           if (~dma_priority & (inst_number_diff<500)) tb_error("CPU is stopped in low priority mode");
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           // RD/WR ACCESS: Data memory (8b)
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           //--------------------------------------------------------
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           $display("\n\nMARCH-X: Data memory 8b:");
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           // Wait random time until MARCH-X starts
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           dma_rand_wait = $urandom_range(1,40);
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           repeat(dma_rand_wait) @(posedge mclk);
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           // Run MARCH-X on data memory
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           // (make sure we don't overwrite firmware data, i.e. DMEM_200)
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           inst_number_old=inst_number;
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           march_x_8b((`PER_SIZE+2), (`PER_SIZE+`DMEM_SIZE-2), 1);
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           inst_number_diff=inst_number-inst_number_old;
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           if ( dma_priority & (inst_number_diff>2))   tb_error("CPU is not stopped in high priority mode");
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           if (~dma_priority & (inst_number_diff<100)) tb_error("CPU is stopped in low priority mode");
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           // RD/WR ACCESS: Peripheral memory (8b)
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           //--------------------------------------------------------
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           $display("\n\nMARCH-X: Peripheral memory 8b ...");
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           // Wait random time until MARCH-X starts
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           dma_rand_wait = $urandom_range(1,40);
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           repeat(dma_rand_wait) @(posedge mclk);
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           // Run MARCH-X on 8B template peripheral
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           inst_number_old=inst_number;
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           repeat(100) march_x_8b(TMPL8B_CNTRL1, TMPL8B_CNTRL4, 0);
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           inst_number_diff=inst_number-inst_number_old;
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           if ( dma_priority & (inst_number_diff>2))   tb_error("CPU is not stopped in high priority mode");
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           if (~dma_priority & (inst_number_diff<500)) tb_error("CPU is stopped in low priority mode");
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        end
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      // End of test
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      //--------------------------------------------------
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      $display("\n");
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      repeat(3000) @(posedge mclk);
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      dma_write_8b(16'h0000-`PMEM_SIZE, 16'h0001, 1'b0);
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      @(r15==16'h2000);
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      if (r10 !== mem200) tb_error("Final Increment counter missmatch... firmware execution failed");
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      stimulus_done = 1;
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`else
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       tb_skip_finish("|      (DMA interface support not included)    |");
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`endif
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   end
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//-------------------------------------------------------------
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// Make sure firmware executes properly during the whole test
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//-------------------------------------------------------------
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// Make sure there is the right amount of clock cycle between the counter increments
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// (low-priority mode only)
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integer mclk_cnt;
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always @(posedge mclk) mclk_cnt=mclk_cnt+1;
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// Check counter increment
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initial
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  begin
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     // Wait for firmware to start
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     @(r15==16'h1000);
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     // Synchronize with first increment
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     @(mem200); @(negedge mclk);
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     mclk_cnt=0;
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     forever
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       begin
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          // When register R10 is incremented, make sure DMEM_200 = R10-1
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          @(r10); @(negedge mclk);
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          if (r10 !== (mem200+1))                                 tb_error("R10 Increment counter missmatch... firmware execution failed");
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          if (~dma_priority & ((mclk_cnt < 4) | (mclk_cnt > 10))) tb_error("DMEM_200 -> R10 exec time error... firmware execution failed");
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          mclk_cnt=0;
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          // When DMEM_200 is incremented, make sure DMEM_200 = R10
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          @(mem200); @(negedge mclk);
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          if (r10 !== mem200)                                     tb_error("DMEM_200 Increment counter missmatch... firmware execution failed");
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          if (~dma_priority & ((mclk_cnt < 3) | (mclk_cnt > 9)))  tb_error("R10 -> DMEM_200 exec time error... firmware execution failed");
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          mclk_cnt=0;
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       end
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  end
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//------------------------------------------------------
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// MARCH-X functions
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//------------------------------------------------------
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task march_x_8b;
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   input  [15:0] addr_start;
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   input  [15:0] addr_end;
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   input         verbose;
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   integer       ii;
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   begin
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      // MARCH X : down (w0); up (r0,w1); down (r1,w0); up (r0)
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      if (verbose) $display("                                - down(w0)    ... ");
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      for ( ii=addr_end; ii >= addr_start; ii=ii-1)
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        begin
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           dma_write_8b(ii, 8'h00, 1'b0);
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        end
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      if (verbose) $display("                                - up(r0,w1)   ... ");
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      for ( ii=addr_start; ii <= addr_end; ii=ii+1)
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        begin
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           dma_read_8b(ii,  8'h00, 1'b0);
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           dma_write_8b(ii, 8'hff, 1'b0);
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        end
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      if (verbose) $display("                                - down(r1,w0) ... ");
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      for ( ii=addr_end; ii >= addr_start; ii=ii-1)
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        begin
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           dma_read_8b(ii,  8'hff, 1'b0);
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           dma_write_8b(ii, 8'h00, 1'b0);
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        end
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      if (verbose) $display("                                - up(r0)      ... ");
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      for ( ii=addr_start; ii <= addr_end; ii=ii+1)
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        begin
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           dma_read_8b(ii,  8'h00, 1'b0);
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        end
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   end
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endtask // march_x_8b

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