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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [gpio_rdwr.s43] - Blame information for rev 166

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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                            DIGITAL I/O                                    */
/*---------------------------------------------------------------------------*/
/* Test the Digital I/O interface:                                           */
/*                                   - Read/Write register access.           */
/*                                   - I/O Functionality.                    */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 141 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2012-05-05 23:22:06 +0200 (Sat, 05 May 2012) $          */
/*===========================================================================*/
 
.include "pmem_defs.asm"
 
.global main
 
main:
        /* -------------- PORT 1: TEST RD/WR REGISTER ACCESS --------------- */
 
        mov.b #0xaa,  &P1IN          ; P1IN
        mov.b &P1IN,  &DMEM_200
        mov.b #0x55,  &P1IN
        mov.b &P1IN,  &DMEM_201
 
        mov.b #0xaa,  &P1OUT         ; P1OUT
        mov.b &P1OUT, &DMEM_202
        mov.b #0x55,  &P1OUT
        mov.b &P1OUT, &DMEM_203
 
        mov.b #0x5a,  &P1DIR         ; P1DIR
        mov.b &P1DIR, &DMEM_204
        mov.b #0xa5,  &P1DIR
        mov.b &P1DIR, &DMEM_205
 
        mov.b #0x55,  &P1IFG         ; P1IFG
        mov.b &P1IFG, &DMEM_206
        mov.b #0xaa,  &P1IFG
        mov.b &P1IFG, &DMEM_207
 
        mov.b #0xa5,  &P1IES         ; P1IES
        mov.b &P1IES, &DMEM_208
        mov.b #0x5a,  &P1IES
        mov.b &P1IES, &DMEM_209
 
        mov.b #0xaa,  &P1IE          ; P1IE
        mov.b &P1IE,  &DMEM_20A
        mov.b #0x55,  &P1IE
        mov.b &P1IE,  &DMEM_20B
 
        mov.b #0xcd,  &P1SEL         ; P1SEL
        mov.b &P1SEL, &DMEM_20C
        mov.b #0x32,  &P1SEL
        mov.b &P1SEL, &DMEM_20D
 
 
        mov.b #0x00,  &P1IN          ; Re-Initialize
        mov.b #0x00,  &P1OUT
        mov.b #0x00,  &P1DIR
        mov.b #0x00,  &P1IFG
        mov.b #0x00,  &P1IES
        mov.b #0x00,  &P1IE
        mov.b #0x00,  &P1SEL
 
        mov   #0x0001, r15
 
 
        /* -------------- PORT 2: TEST RD/WR REGISTER ACCESS --------------- */
 
        mov.b #0xaa,  &P2IN          ; P2IN
        mov.b &P2IN,  &DMEM_210
        mov.b #0x55,  &P2IN
        mov.b &P2IN,  &DMEM_211
 
        mov.b #0xaa,  &P2OUT         ; P2OUT
        mov.b &P2OUT, &DMEM_212
        mov.b #0x55,  &P2OUT
        mov.b &P2OUT, &DMEM_213
 
        mov.b #0x5a,  &P2DIR         ; P2DIR
        mov.b &P2DIR, &DMEM_214
        mov.b #0xa5,  &P2DIR
        mov.b &P2DIR, &DMEM_215
 
        mov.b #0x55,  &P2IFG         ; P2IFG
        mov.b &P2IFG, &DMEM_216
        mov.b #0xaa,  &P2IFG
        mov.b &P2IFG, &DMEM_217
 
        mov.b #0xa5,  &P2IES         ; P2IES
        mov.b &P2IES, &DMEM_218
        mov.b #0x5a,  &P2IES
        mov.b &P2IES, &DMEM_219
 
        mov.b #0xaa,  &P2IE          ; P2IE
        mov.b &P2IE,  &DMEM_21A
        mov.b #0x55,  &P2IE
        mov.b &P2IE,  &DMEM_21B
 
        mov.b #0xcd,  &P2SEL         ; P2SEL
        mov.b &P2SEL, &DMEM_21C
        mov.b #0x32,  &P2SEL
        mov.b &P2SEL, &DMEM_21D
 
        mov.b #0x00,  &P2IN          ; Re-Initialize
        mov.b #0x00,  &P2OUT
        mov.b #0x00,  &P2DIR
        mov.b #0x00,  &P2IFG
        mov.b #0x00,  &P2IES
        mov.b #0x00,  &P2IE
        mov.b #0x00,  &P2SEL
 
        mov   #0x0002, r15
 
 
        /* -------------- PORT 3: TEST RD/WR REGISTER ACCESS --------------- */
 
        mov.b #0xaa,  &P3IN          ; P3IN
        mov.b &P3IN,  &DMEM_220
        mov.b #0x55,  &P3IN
        mov.b &P3IN,  &DMEM_221
 
        mov.b #0xaa,  &P3OUT         ; P3OUT
        mov.b &P3OUT, &DMEM_222
        mov.b #0x55,  &P3OUT
        mov.b &P3OUT, &DMEM_223
 
        mov.b #0x5a,  &P3DIR         ; P3DIR
        mov.b &P3DIR, &DMEM_224
        mov.b #0xa5,  &P3DIR
        mov.b &P3DIR, &DMEM_225
 
        mov.b #0xcd,  &P3SEL         ; P3SEL
        mov.b &P3SEL, &DMEM_226
        mov.b #0x32,  &P3SEL
        mov.b &P3SEL, &DMEM_227
 
        mov.b #0x00,  &P3IN          ; Re-Initialize
        mov.b #0x00,  &P3OUT
        mov.b #0x00,  &P3DIR
        mov.b #0x00,  &P3SEL
 
        mov   #0x0003, r15
 
 
        /* -------------- PORT 4: TEST RD/WR REGISTER ACCESS --------------- */
 
        mov.b #0xaa,  &P4IN          ; P4IN
        mov.b &P4IN,  &DMEM_230
        mov.b #0x55,  &P4IN
        mov.b &P4IN,  &DMEM_231
 
        mov.b #0xaa,  &P4OUT         ; P4OUT
        mov.b &P4OUT, &DMEM_232
        mov.b #0x55,  &P4OUT
        mov.b &P4OUT, &DMEM_233
 
        mov.b #0x5a,  &P4DIR         ; P4DIR
        mov.b &P4DIR, &DMEM_234
        mov.b #0xa5,  &P4DIR
        mov.b &P4DIR, &DMEM_235
 
        mov.b #0xcd,  &P4SEL         ; P4SEL
        mov.b &P4SEL, &DMEM_236
        mov.b #0x32,  &P4SEL
        mov.b &P4SEL, &DMEM_237
 
        mov.b #0x00,  &P4IN          ; Re-Initialize
        mov.b #0x00,  &P4OUT
        mov.b #0x00,  &P4DIR
        mov.b #0x00,  &P4SEL
 
        mov   #0x0004, r15
 
 
        /* -------------- PORT 5: TEST RD/WR REGISTER ACCESS --------------- */
 
        mov.b #0xaa,  &P5IN          ; P5IN
        mov.b &P5IN,  &DMEM_240
        mov.b #0x55,  &P5IN
        mov.b &P5IN,  &DMEM_241
 
        mov.b #0xaa,  &P5OUT         ; P5OUT
        mov.b &P5OUT, &DMEM_242
        mov.b #0x55,  &P5OUT
        mov.b &P5OUT, &DMEM_243
 
        mov.b #0x5a,  &P5DIR         ; P5DIR
        mov.b &P5DIR, &DMEM_244
        mov.b #0xa5,  &P5DIR
        mov.b &P5DIR, &DMEM_245
 
        mov.b #0xcd,  &P5SEL         ; P5SEL
        mov.b &P5SEL, &DMEM_246
        mov.b #0x32,  &P5SEL
        mov.b &P5SEL, &DMEM_247
 
        mov.b #0x00,  &P5IN          ; Re-Initialize
        mov.b #0x00,  &P5OUT
        mov.b #0x00,  &P5DIR
        mov.b #0x00,  &P5SEL
 
        mov   #0x0005, r15
 
 
        /* -------------- PORT 6: TEST RD/WR REGISTER ACCESS --------------- */
 
        mov.b #0xaa,  &P6IN          ; P6IN
        mov.b &P6IN,  &DMEM_250
        mov.b #0x55,  &P6IN
        mov.b &P6IN,  &DMEM_251
 
        mov.b #0xaa,  &P6OUT         ; P6OUT
        mov.b &P6OUT, &DMEM_252
        mov.b #0x55,  &P6OUT
        mov.b &P6OUT, &DMEM_253
 
        mov.b #0x5a,  &P6DIR         ; P6DIR
        mov.b &P6DIR, &DMEM_254
        mov.b #0xa5,  &P6DIR
        mov.b &P6DIR, &DMEM_255
 
        mov.b #0xcd,  &P6SEL         ; P6SEL
        mov.b &P6SEL, &DMEM_256
        mov.b #0x32,  &P6SEL
        mov.b &P6SEL, &DMEM_257
 
        mov.b #0x00,  &P6IN          ; Re-Initialize
        mov.b #0x00,  &P6OUT
        mov.b #0x00,  &P6DIR
        mov.b #0x00,  &P6SEL
 
        mov   #0x0006, r15
 
 
        /* -------------- PORT 1: TEST I/O FUNCTIONALITY --------------- */
 
        mov     #DMEM_200, r15        ;# Test Input path
        nop
p1_din_loop:
        mov.b &P1IN,  0(r15)
        inc      r15
        cmp     #DMEM_208, r15
        jne     p1_din_loop
 
 
        mov.b #0x01,   &P1OUT       ; Test Output path
        mov   #0x1100, r15
p1_dout_loop:
        rla.b &P1OUT
        inc      r15
        cmp     #0x1107, r15
        jne     p1_dout_loop
 
 
        mov.b #0x01,   &P1DIR       ; Test Direction register
        mov   #0x1200, r15
p1_dir_loop:
        rla.b &P1DIR
        inc      r15
        cmp     #0x1207, r15
        jne     p1_dir_loop
 
 
        mov.b #0x01,   &P1SEL       ; Test Function Select register
        mov   #0x1300, r15
p1_sel_loop:
        rla.b &P1SEL
        inc      r15
        cmp     #0x1307, r15
        jne     p1_sel_loop
 
 
        mov.b #0x00,  &P1OUT        ; Re-Initialize
        mov.b #0x00,  &P1DIR
        mov.b #0x00,  &P1SEL
 
 
        /* -------------- PORT 2: TEST I/O FUNCTIONALITY --------------- */
 
        mov     #DMEM_210, r15        ;# Test Input path
        nop
p2_din_loop:
        mov.b &P2IN,  0(r15)
        inc      r15
        cmp     #DMEM_218, r15
        jne     p2_din_loop
 
 
        mov.b #0x01,   &P2OUT       ; Test Output path
        mov   #0x2100, r15
p2_dout_loop:
        rla.b &P2OUT
        inc      r15
        cmp     #0x2107, r15
        jne     p2_dout_loop
 
 
        mov.b #0x01,   &P2DIR       ; Test Direction register
        mov   #0x2200, r15
p2_dir_loop:
        rla.b &P2DIR
        inc      r15
        cmp     #0x2207, r15
        jne     p2_dir_loop
 
 
        mov.b #0x01,   &P2SEL       ; Test Function Select register
        mov   #0x2300, r15
p2_sel_loop:
        rla.b &P2SEL
        inc      r15
        cmp     #0x2307, r15
        jne     p2_sel_loop
 
 
        mov.b #0x00,  &P2OUT        ; Re-Initialize
        mov.b #0x00,  &P2DIR
        mov.b #0x00,  &P2SEL
 
 
        /* -------------- PORT 3: TEST I/O FUNCTIONALITY --------------- */
 
        mov     #DMEM_220, r15        ;# Test Input path
        nop
p3_din_loop:
        mov.b &P3IN,  0(r15)
        inc      r15
        cmp     #DMEM_228, r15
        jne     p3_din_loop
 
 
        mov.b #0x01,   &P3OUT       ; Test Output path
        mov   #0x3100, r15
p3_dout_loop:
        rla.b &P3OUT
        inc      r15
        cmp     #0x3107, r15
        jne     p3_dout_loop
 
 
        mov.b #0x01,   &P3DIR       ; Test Direction register
        mov   #0x3200, r15
p3_dir_loop:
        rla.b &P3DIR
        inc      r15
        cmp     #0x3207, r15
        jne     p3_dir_loop
 
 
        mov.b #0x01,   &P3SEL       ; Test Function Select register
        mov   #0x3300, r15
p3_sel_loop:
        rla.b &P3SEL
        inc      r15
        cmp     #0x3307, r15
        jne     p3_sel_loop
 
 
        mov.b #0x00,  &P3OUT        ; Re-Initialize
        mov.b #0x00,  &P3DIR
        mov.b #0x00,  &P3SEL
 
 
        /* -------------- PORT 4: TEST I/O FUNCTIONALITY --------------- */
 
        mov     #DMEM_230, r15        ;# Test Input path
        nop
p4_din_loop:
        mov.b &P4IN,  0(r15)
        inc      r15
        cmp     #DMEM_238, r15
        jne     p4_din_loop
 
 
        mov.b #0x01,   &P4OUT       ; Test Output path
        mov   #0x4100, r15
p4_dout_loop:
        rla.b &P4OUT
        inc      r15
        cmp     #0x4107, r15
        jne     p4_dout_loop
 
 
        mov.b #0x01,   &P4DIR       ; Test Direction register
        mov   #0x4200, r15
p4_dir_loop:
        rla.b &P4DIR
        inc      r15
        cmp     #0x4207, r15
        jne     p4_dir_loop
 
 
        mov.b #0x01,   &P4SEL       ; Test Function Select register
        mov   #0x4300, r15
p4_sel_loop:
        rla.b &P4SEL
        inc      r15
        cmp     #0x4307, r15
        jne     p4_sel_loop
 
 
        mov.b #0x00,  &P4OUT        ; Re-Initialize
        mov.b #0x00,  &P4DIR
        mov.b #0x00,  &P4SEL
 
 
        /* -------------- PORT 5: TEST I/O FUNCTIONALITY --------------- */
 
        mov     #DMEM_240, r15        ;# Test Input path
        nop
p5_din_loop:
        mov.b &P5IN,  0(r15)
        inc      r15
        cmp     #DMEM_248, r15
        jne     p5_din_loop
 
 
        mov.b #0x01,   &P5OUT       ; Test Output path
        mov   #0x5100, r15
p5_dout_loop:
        rla.b &P5OUT
        inc      r15
        cmp     #0x5107, r15
        jne     p5_dout_loop
 
 
        mov.b #0x01,   &P5DIR       ; Test Direction register
        mov   #0x5200, r15
p5_dir_loop:
        rla.b &P5DIR
        inc      r15
        cmp     #0x5207, r15
        jne     p5_dir_loop
 
 
        mov.b #0x01,   &P5SEL       ; Test Function Select register
        mov   #0x5300, r15
p5_sel_loop:
        rla.b &P5SEL
        inc      r15
        cmp     #0x5307, r15
        jne     p5_sel_loop
 
 
        mov.b #0x00,  &P5OUT        ; Re-Initialize
        mov.b #0x00,  &P5DIR
        mov.b #0x00,  &P5SEL
 
 
        /* -------------- PORT 6: TEST I/O FUNCTIONALITY --------------- */
 
        mov     #DMEM_250, r15        ;# Test Input path
        nop
p6_din_loop:
        mov.b &P6IN,  0(r15)
        inc      r15
        cmp     #DMEM_258, r15
        jne     p6_din_loop
 
 
        mov.b #0x01,   &P6OUT       ; Test Output path
        mov   #0x6100, r15
p6_dout_loop:
        rla.b &P6OUT
        inc      r15
        cmp     #0x6107, r15
        jne     p6_dout_loop
 
 
        mov.b #0x01,   &P6DIR       ; Test Direction register
        mov   #0x6200, r15
p6_dir_loop:
        rla.b &P6DIR
        inc      r15
        cmp     #0x6207, r15
        jne     p6_dir_loop
 
 
        mov.b #0x01,   &P6SEL       ; Test Function Select register
        mov   #0x6300, r15
p6_sel_loop:
        rla.b &P6SEL
        inc      r15
        cmp     #0x6307, r15
        jne     p6_sel_loop
 
 
        mov.b #0x00,  &P6OUT        ; Re-Initialize
        mov.b #0x00,  &P6DIR
        mov.b #0x00,  &P6SEL
 
 
 
        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    
.word end_of_test  ; Interrupt  1                      
.word end_of_test  ; Interrupt  2                      
.word end_of_test  ; Interrupt  3                      
.word end_of_test  ; Interrupt  4                      
.word end_of_test  ; Interrupt  5                      
.word end_of_test  ; Interrupt  6                      
.word end_of_test  ; Interrupt  7                      
.word end_of_test  ; Interrupt  8                      
.word end_of_test  ; Interrupt  9                      
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      
.word end_of_test  ; Interrupt 12                      
.word end_of_test  ; Interrupt 13                      
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET

Line No.	Rev	Author	Line
1	2	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24			`/* DIGITAL I/O */`
25			`/---------------------------------------------------------------------------/`
26			`/* Test the Digital I/O interface: */`
27			`/* - Read/Write register access. */`
28			`/* - I/O Functionality. */`
29	18	olivier.gi	`/* */`
30			`/* Author(s): */`
31			`/* - Olivier Girard, olgirard@gmail.com */`
32			`/* */`
33			`/---------------------------------------------------------------------------/`
34	19	olivier.gi	`/* $Rev: 141 $ */`
35			`/* $LastChangedBy: olivier.girard $ */`
36			`/* $LastChangedDate: 2012-05-05 23:22:06 +0200 (Sat, 05 May 2012) $ */`
37	2	olivier.gi	`/===========================================================================/`
38
39	141	olivier.gi	`.include "pmem_defs.asm"`
40
41	2	olivier.gi	`.global main`
42
43			`main:`
44			`/* -------------- PORT 1: TEST RD/WR REGISTER ACCESS --------------- */`
45
46			`mov.b #0xaa, &P1IN ; P1IN`
47	111	olivier.gi	`mov.b &P1IN, &DMEM_200`
48	2	olivier.gi	`mov.b #0x55, &P1IN`
49	111	olivier.gi	`mov.b &P1IN, &DMEM_201`
50	2	olivier.gi
51			`mov.b #0xaa, &P1OUT ; P1OUT`
52	111	olivier.gi	`mov.b &P1OUT, &DMEM_202`
53	2	olivier.gi	`mov.b #0x55, &P1OUT`
54	111	olivier.gi	`mov.b &P1OUT, &DMEM_203`
55	2	olivier.gi
56			`mov.b #0x5a, &P1DIR ; P1DIR`
57	111	olivier.gi	`mov.b &P1DIR, &DMEM_204`
58	2	olivier.gi	`mov.b #0xa5, &P1DIR`
59	111	olivier.gi	`mov.b &P1DIR, &DMEM_205`
60	2	olivier.gi
61			`mov.b #0x55, &P1IFG ; P1IFG`
62	111	olivier.gi	`mov.b &P1IFG, &DMEM_206`
63	2	olivier.gi	`mov.b #0xaa, &P1IFG`
64	111	olivier.gi	`mov.b &P1IFG, &DMEM_207`
65	2	olivier.gi
66			`mov.b #0xa5, &P1IES ; P1IES`
67	111	olivier.gi	`mov.b &P1IES, &DMEM_208`
68	2	olivier.gi	`mov.b #0x5a, &P1IES`
69	111	olivier.gi	`mov.b &P1IES, &DMEM_209`
70	2	olivier.gi
71			`mov.b #0xaa, &P1IE ; P1IE`
72	111	olivier.gi	`mov.b &P1IE, &DMEM_20A`
73	2	olivier.gi	`mov.b #0x55, &P1IE`
74	111	olivier.gi	`mov.b &P1IE, &DMEM_20B`
75	2	olivier.gi
76			`mov.b #0xcd, &P1SEL ; P1SEL`
77	111	olivier.gi	`mov.b &P1SEL, &DMEM_20C`
78	2	olivier.gi	`mov.b #0x32, &P1SEL`
79	111	olivier.gi	`mov.b &P1SEL, &DMEM_20D`
80	2	olivier.gi
81
82			`mov.b #0x00, &P1IN ; Re-Initialize`
83			`mov.b #0x00, &P1OUT`
84			`mov.b #0x00, &P1DIR`
85			`mov.b #0x00, &P1IFG`
86			`mov.b #0x00, &P1IES`
87			`mov.b #0x00, &P1IE`
88			`mov.b #0x00, &P1SEL`
89
90			`mov #0x0001, r15`
91
92
93			`/* -------------- PORT 2: TEST RD/WR REGISTER ACCESS --------------- */`
94
95			`mov.b #0xaa, &P2IN ; P2IN`
96	111	olivier.gi	`mov.b &P2IN, &DMEM_210`
97	2	olivier.gi	`mov.b #0x55, &P2IN`
98	111	olivier.gi	`mov.b &P2IN, &DMEM_211`
99	2	olivier.gi
100			`mov.b #0xaa, &P2OUT ; P2OUT`
101	111	olivier.gi	`mov.b &P2OUT, &DMEM_212`
102	2	olivier.gi	`mov.b #0x55, &P2OUT`
103	111	olivier.gi	`mov.b &P2OUT, &DMEM_213`
104	2	olivier.gi
105			`mov.b #0x5a, &P2DIR ; P2DIR`
106	111	olivier.gi	`mov.b &P2DIR, &DMEM_214`
107	2	olivier.gi	`mov.b #0xa5, &P2DIR`
108	111	olivier.gi	`mov.b &P2DIR, &DMEM_215`
109	2	olivier.gi
110			`mov.b #0x55, &P2IFG ; P2IFG`
111	111	olivier.gi	`mov.b &P2IFG, &DMEM_216`
112	2	olivier.gi	`mov.b #0xaa, &P2IFG`
113	111	olivier.gi	`mov.b &P2IFG, &DMEM_217`
114	2	olivier.gi
115			`mov.b #0xa5, &P2IES ; P2IES`
116	111	olivier.gi	`mov.b &P2IES, &DMEM_218`
117	2	olivier.gi	`mov.b #0x5a, &P2IES`
118	111	olivier.gi	`mov.b &P2IES, &DMEM_219`
119	2	olivier.gi
120			`mov.b #0xaa, &P2IE ; P2IE`
121	111	olivier.gi	`mov.b &P2IE, &DMEM_21A`
122	2	olivier.gi	`mov.b #0x55, &P2IE`
123	111	olivier.gi	`mov.b &P2IE, &DMEM_21B`
124	2	olivier.gi
125			`mov.b #0xcd, &P2SEL ; P2SEL`
126	111	olivier.gi	`mov.b &P2SEL, &DMEM_21C`
127	2	olivier.gi	`mov.b #0x32, &P2SEL`
128	111	olivier.gi	`mov.b &P2SEL, &DMEM_21D`
129	2	olivier.gi
130			`mov.b #0x00, &P2IN ; Re-Initialize`
131			`mov.b #0x00, &P2OUT`
132			`mov.b #0x00, &P2DIR`
133			`mov.b #0x00, &P2IFG`
134			`mov.b #0x00, &P2IES`
135			`mov.b #0x00, &P2IE`
136			`mov.b #0x00, &P2SEL`
137
138			`mov #0x0002, r15`
139
140
141			`/* -------------- PORT 3: TEST RD/WR REGISTER ACCESS --------------- */`
142
143			`mov.b #0xaa, &P3IN ; P3IN`
144	111	olivier.gi	`mov.b &P3IN, &DMEM_220`
145	2	olivier.gi	`mov.b #0x55, &P3IN`
146	111	olivier.gi	`mov.b &P3IN, &DMEM_221`
147	2	olivier.gi
148			`mov.b #0xaa, &P3OUT ; P3OUT`
149	111	olivier.gi	`mov.b &P3OUT, &DMEM_222`
150	2	olivier.gi	`mov.b #0x55, &P3OUT`
151	111	olivier.gi	`mov.b &P3OUT, &DMEM_223`
152	2	olivier.gi
153			`mov.b #0x5a, &P3DIR ; P3DIR`
154	111	olivier.gi	`mov.b &P3DIR, &DMEM_224`
155	2	olivier.gi	`mov.b #0xa5, &P3DIR`
156	111	olivier.gi	`mov.b &P3DIR, &DMEM_225`
157	2	olivier.gi
158			`mov.b #0xcd, &P3SEL ; P3SEL`
159	111	olivier.gi	`mov.b &P3SEL, &DMEM_226`
160	2	olivier.gi	`mov.b #0x32, &P3SEL`
161	111	olivier.gi	`mov.b &P3SEL, &DMEM_227`
162	2	olivier.gi
163			`mov.b #0x00, &P3IN ; Re-Initialize`
164			`mov.b #0x00, &P3OUT`
165			`mov.b #0x00, &P3DIR`
166			`mov.b #0x00, &P3SEL`
167
168			`mov #0x0003, r15`
169
170
171			`/* -------------- PORT 4: TEST RD/WR REGISTER ACCESS --------------- */`
172
173			`mov.b #0xaa, &P4IN ; P4IN`
174	111	olivier.gi	`mov.b &P4IN, &DMEM_230`
175	2	olivier.gi	`mov.b #0x55, &P4IN`
176	111	olivier.gi	`mov.b &P4IN, &DMEM_231`
177	2	olivier.gi
178			`mov.b #0xaa, &P4OUT ; P4OUT`
179	111	olivier.gi	`mov.b &P4OUT, &DMEM_232`
180	2	olivier.gi	`mov.b #0x55, &P4OUT`
181	111	olivier.gi	`mov.b &P4OUT, &DMEM_233`
182	2	olivier.gi
183			`mov.b #0x5a, &P4DIR ; P4DIR`
184	111	olivier.gi	`mov.b &P4DIR, &DMEM_234`
185	2	olivier.gi	`mov.b #0xa5, &P4DIR`
186	111	olivier.gi	`mov.b &P4DIR, &DMEM_235`
187	2	olivier.gi
188			`mov.b #0xcd, &P4SEL ; P4SEL`
189	111	olivier.gi	`mov.b &P4SEL, &DMEM_236`
190	2	olivier.gi	`mov.b #0x32, &P4SEL`
191	111	olivier.gi	`mov.b &P4SEL, &DMEM_237`
192	2	olivier.gi
193			`mov.b #0x00, &P4IN ; Re-Initialize`
194			`mov.b #0x00, &P4OUT`
195			`mov.b #0x00, &P4DIR`
196			`mov.b #0x00, &P4SEL`
197
198			`mov #0x0004, r15`
199
200
201			`/* -------------- PORT 5: TEST RD/WR REGISTER ACCESS --------------- */`
202
203			`mov.b #0xaa, &P5IN ; P5IN`
204	111	olivier.gi	`mov.b &P5IN, &DMEM_240`
205	2	olivier.gi	`mov.b #0x55, &P5IN`
206	111	olivier.gi	`mov.b &P5IN, &DMEM_241`
207	2	olivier.gi
208			`mov.b #0xaa, &P5OUT ; P5OUT`
209	111	olivier.gi	`mov.b &P5OUT, &DMEM_242`
210	2	olivier.gi	`mov.b #0x55, &P5OUT`
211	111	olivier.gi	`mov.b &P5OUT, &DMEM_243`
212	2	olivier.gi
213			`mov.b #0x5a, &P5DIR ; P5DIR`
214	111	olivier.gi	`mov.b &P5DIR, &DMEM_244`
215	2	olivier.gi	`mov.b #0xa5, &P5DIR`
216	111	olivier.gi	`mov.b &P5DIR, &DMEM_245`
217	2	olivier.gi
218			`mov.b #0xcd, &P5SEL ; P5SEL`
219	111	olivier.gi	`mov.b &P5SEL, &DMEM_246`
220	2	olivier.gi	`mov.b #0x32, &P5SEL`
221	111	olivier.gi	`mov.b &P5SEL, &DMEM_247`
222	2	olivier.gi
223			`mov.b #0x00, &P5IN ; Re-Initialize`
224			`mov.b #0x00, &P5OUT`
225			`mov.b #0x00, &P5DIR`
226			`mov.b #0x00, &P5SEL`
227
228			`mov #0x0005, r15`
229
230
231			`/* -------------- PORT 6: TEST RD/WR REGISTER ACCESS --------------- */`
232
233			`mov.b #0xaa, &P6IN ; P6IN`
234	111	olivier.gi	`mov.b &P6IN, &DMEM_250`
235	2	olivier.gi	`mov.b #0x55, &P6IN`
236	111	olivier.gi	`mov.b &P6IN, &DMEM_251`
237	2	olivier.gi
238			`mov.b #0xaa, &P6OUT ; P6OUT`
239	111	olivier.gi	`mov.b &P6OUT, &DMEM_252`
240	2	olivier.gi	`mov.b #0x55, &P6OUT`
241	111	olivier.gi	`mov.b &P6OUT, &DMEM_253`
242	2	olivier.gi
243			`mov.b #0x5a, &P6DIR ; P6DIR`
244	111	olivier.gi	`mov.b &P6DIR, &DMEM_254`
245	2	olivier.gi	`mov.b #0xa5, &P6DIR`
246	111	olivier.gi	`mov.b &P6DIR, &DMEM_255`
247	2	olivier.gi
248			`mov.b #0xcd, &P6SEL ; P6SEL`
249	111	olivier.gi	`mov.b &P6SEL, &DMEM_256`
250	2	olivier.gi	`mov.b #0x32, &P6SEL`
251	111	olivier.gi	`mov.b &P6SEL, &DMEM_257`
252	2	olivier.gi
253			`mov.b #0x00, &P6IN ; Re-Initialize`
254			`mov.b #0x00, &P6OUT`
255			`mov.b #0x00, &P6DIR`
256			`mov.b #0x00, &P6SEL`
257
258			`mov #0x0006, r15`
259
260
261			`/* -------------- PORT 1: TEST I/O FUNCTIONALITY --------------- */`
262
263	111	olivier.gi	`mov #DMEM_200, r15 ;# Test Input path`
264	79	olivier.gi	`nop`
265	2	olivier.gi	`p1_din_loop:`
266			`mov.b &P1IN, 0(r15)`
267			`inc r15`
268	111	olivier.gi	`cmp #DMEM_208, r15`
269	2	olivier.gi	`jne p1_din_loop`
270
271
272			`mov.b #0x01, &P1OUT ; Test Output path`
273			`mov #0x1100, r15`
274			`p1_dout_loop:`
275			`rla.b &P1OUT`
276			`inc r15`
277			`cmp #0x1107, r15`
278			`jne p1_dout_loop`
279
280
281			`mov.b #0x01, &P1DIR ; Test Direction register`
282			`mov #0x1200, r15`
283			`p1_dir_loop:`
284			`rla.b &P1DIR`
285			`inc r15`
286			`cmp #0x1207, r15`
287			`jne p1_dir_loop`
288
289
290			`mov.b #0x01, &P1SEL ; Test Function Select register`
291			`mov #0x1300, r15`
292			`p1_sel_loop:`
293			`rla.b &P1SEL`
294			`inc r15`
295			`cmp #0x1307, r15`
296			`jne p1_sel_loop`
297
298
299			`mov.b #0x00, &P1OUT ; Re-Initialize`
300			`mov.b #0x00, &P1DIR`
301			`mov.b #0x00, &P1SEL`
302
303
304			`/* -------------- PORT 2: TEST I/O FUNCTIONALITY --------------- */`
305
306	111	olivier.gi	`mov #DMEM_210, r15 ;# Test Input path`
307	79	olivier.gi	`nop`
308	2	olivier.gi	`p2_din_loop:`
309			`mov.b &P2IN, 0(r15)`
310			`inc r15`
311	111	olivier.gi	`cmp #DMEM_218, r15`
312	2	olivier.gi	`jne p2_din_loop`
313
314
315			`mov.b #0x01, &P2OUT ; Test Output path`
316			`mov #0x2100, r15`
317			`p2_dout_loop:`
318			`rla.b &P2OUT`
319			`inc r15`
320			`cmp #0x2107, r15`
321			`jne p2_dout_loop`
322
323
324			`mov.b #0x01, &P2DIR ; Test Direction register`
325			`mov #0x2200, r15`
326			`p2_dir_loop:`
327			`rla.b &P2DIR`
328			`inc r15`
329			`cmp #0x2207, r15`
330			`jne p2_dir_loop`
331
332
333			`mov.b #0x01, &P2SEL ; Test Function Select register`
334			`mov #0x2300, r15`
335			`p2_sel_loop:`
336			`rla.b &P2SEL`
337			`inc r15`
338			`cmp #0x2307, r15`
339			`jne p2_sel_loop`
340
341
342			`mov.b #0x00, &P2OUT ; Re-Initialize`
343			`mov.b #0x00, &P2DIR`
344			`mov.b #0x00, &P2SEL`
345
346
347			`/* -------------- PORT 3: TEST I/O FUNCTIONALITY --------------- */`
348
349	111	olivier.gi	`mov #DMEM_220, r15 ;# Test Input path`
350	79	olivier.gi	`nop`
351	2	olivier.gi	`p3_din_loop:`
352			`mov.b &P3IN, 0(r15)`
353			`inc r15`
354	111	olivier.gi	`cmp #DMEM_228, r15`
355	2	olivier.gi	`jne p3_din_loop`
356
357
358			`mov.b #0x01, &P3OUT ; Test Output path`
359			`mov #0x3100, r15`
360			`p3_dout_loop:`
361			`rla.b &P3OUT`
362			`inc r15`
363			`cmp #0x3107, r15`
364			`jne p3_dout_loop`
365
366
367			`mov.b #0x01, &P3DIR ; Test Direction register`
368			`mov #0x3200, r15`
369			`p3_dir_loop:`
370			`rla.b &P3DIR`
371			`inc r15`
372			`cmp #0x3207, r15`
373			`jne p3_dir_loop`
374
375
376			`mov.b #0x01, &P3SEL ; Test Function Select register`
377			`mov #0x3300, r15`
378			`p3_sel_loop:`
379			`rla.b &P3SEL`
380			`inc r15`
381			`cmp #0x3307, r15`
382			`jne p3_sel_loop`
383
384
385			`mov.b #0x00, &P3OUT ; Re-Initialize`
386			`mov.b #0x00, &P3DIR`
387			`mov.b #0x00, &P3SEL`
388
389
390			`/* -------------- PORT 4: TEST I/O FUNCTIONALITY --------------- */`
391
392	111	olivier.gi	`mov #DMEM_230, r15 ;# Test Input path`
393	79	olivier.gi	`nop`
394	2	olivier.gi	`p4_din_loop:`
395			`mov.b &P4IN, 0(r15)`
396			`inc r15`
397	111	olivier.gi	`cmp #DMEM_238, r15`
398	2	olivier.gi	`jne p4_din_loop`
399
400
401			`mov.b #0x01, &P4OUT ; Test Output path`
402			`mov #0x4100, r15`
403			`p4_dout_loop:`
404			`rla.b &P4OUT`
405			`inc r15`
406			`cmp #0x4107, r15`
407			`jne p4_dout_loop`
408
409
410			`mov.b #0x01, &P4DIR ; Test Direction register`
411			`mov #0x4200, r15`
412			`p4_dir_loop:`
413			`rla.b &P4DIR`
414			`inc r15`
415			`cmp #0x4207, r15`
416			`jne p4_dir_loop`
417
418
419			`mov.b #0x01, &P4SEL ; Test Function Select register`
420			`mov #0x4300, r15`
421			`p4_sel_loop:`
422			`rla.b &P4SEL`
423			`inc r15`
424			`cmp #0x4307, r15`
425			`jne p4_sel_loop`
426
427
428			`mov.b #0x00, &P4OUT ; Re-Initialize`
429			`mov.b #0x00, &P4DIR`
430			`mov.b #0x00, &P4SEL`
431
432
433			`/* -------------- PORT 5: TEST I/O FUNCTIONALITY --------------- */`
434
435	111	olivier.gi	`mov #DMEM_240, r15 ;# Test Input path`
436	79	olivier.gi	`nop`
437	2	olivier.gi	`p5_din_loop:`
438			`mov.b &P5IN, 0(r15)`
439			`inc r15`
440	111	olivier.gi	`cmp #DMEM_248, r15`
441	2	olivier.gi	`jne p5_din_loop`
442
443
444			`mov.b #0x01, &P5OUT ; Test Output path`
445			`mov #0x5100, r15`
446			`p5_dout_loop:`
447			`rla.b &P5OUT`
448			`inc r15`
449			`cmp #0x5107, r15`
450			`jne p5_dout_loop`
451
452
453			`mov.b #0x01, &P5DIR ; Test Direction register`
454			`mov #0x5200, r15`
455			`p5_dir_loop:`
456			`rla.b &P5DIR`
457			`inc r15`
458			`cmp #0x5207, r15`
459			`jne p5_dir_loop`
460
461
462			`mov.b #0x01, &P5SEL ; Test Function Select register`
463			`mov #0x5300, r15`
464			`p5_sel_loop:`
465			`rla.b &P5SEL`
466			`inc r15`
467			`cmp #0x5307, r15`
468			`jne p5_sel_loop`
469
470
471			`mov.b #0x00, &P5OUT ; Re-Initialize`
472			`mov.b #0x00, &P5DIR`
473			`mov.b #0x00, &P5SEL`
474
475
476			`/* -------------- PORT 6: TEST I/O FUNCTIONALITY --------------- */`
477
478	111	olivier.gi	`mov #DMEM_250, r15 ;# Test Input path`
479	79	olivier.gi	`nop`
480	2	olivier.gi	`p6_din_loop:`
481			`mov.b &P6IN, 0(r15)`
482			`inc r15`
483	111	olivier.gi	`cmp #DMEM_258, r15`
484	2	olivier.gi	`jne p6_din_loop`
485
486
487			`mov.b #0x01, &P6OUT ; Test Output path`
488			`mov #0x6100, r15`
489			`p6_dout_loop:`
490			`rla.b &P6OUT`
491			`inc r15`
492			`cmp #0x6107, r15`
493			`jne p6_dout_loop`
494
495
496			`mov.b #0x01, &P6DIR ; Test Direction register`
497			`mov #0x6200, r15`
498			`p6_dir_loop:`
499			`rla.b &P6DIR`
500			`inc r15`

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