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olivier.gi |
/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/*===========================================================================*/
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/* DIGITAL I/O */
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/*---------------------------------------------------------------------------*/
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/* Test the Digital I/O interface: */
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/* - Read/Write register access. */
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/* - I/O Functionality. */
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18 |
olivier.gi |
/* */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/*---------------------------------------------------------------------------*/
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19 |
olivier.gi |
/* $Rev: 19 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
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2 |
olivier.gi |
/*===========================================================================*/
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initial
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40 |
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begin
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41 |
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$display(" ===============================================");
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42 |
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$display("| START SIMULATION |");
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43 |
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$display(" ===============================================");
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44 |
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repeat(5) @(posedge mclk);
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45 |
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stimulus_done = 0;
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46 |
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47 |
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// PORT 1: TEST RD/WR REGISTER ACCESS
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48 |
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//--------------------------------------------------------
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49 |
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@(r15==16'h0001);
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50 |
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51 |
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if (mem200 !== 16'h0000) tb_error("====== P1IN != 0x0000 =====");
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52 |
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if (mem202 !== 16'h55aa) tb_error("====== P1OUT != 0x55aa =====");
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53 |
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if (mem204 !== 16'ha55a) tb_error("====== P1DIR != 0xa55a =====");
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54 |
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if (mem206 !== 16'haa55) tb_error("====== P1IFG != 0xaa55 =====");
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55 |
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if (mem208 !== 16'h5aa5) tb_error("====== P1IES != 0x5aa5 =====");
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56 |
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if (mem20A !== 16'h55aa) tb_error("====== P1IE != 0x55aa =====");
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57 |
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if (mem20C !== 16'h32cd) tb_error("====== P1SEL != 0x32cd =====");
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58 |
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59 |
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60 |
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// PORT 2: TEST RD/WR REGISTER ACCESS
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61 |
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//--------------------------------------------------------
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62 |
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@(r15==16'h0002);
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63 |
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64 |
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if (mem210 !== 16'h0000) tb_error("====== P2IN != 0x0000 =====");
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65 |
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if (mem212 !== 16'h55aa) tb_error("====== P2OUT != 0x55aa =====");
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66 |
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if (mem214 !== 16'ha55a) tb_error("====== P2DIR != 0xa55a =====");
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67 |
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if (mem216 !== 16'haa55) tb_error("====== P2IFG != 0xaa55 =====");
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68 |
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if (mem218 !== 16'h5aa5) tb_error("====== P2IES != 0x5aa5 =====");
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69 |
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if (mem21A !== 16'h55aa) tb_error("====== P2IE != 0x55aa =====");
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if (mem21C !== 16'h32cd) tb_error("====== P2SEL != 0x32cd =====");
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72 |
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73 |
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// PORT 3: TEST RD/WR REGISTER ACCESS
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//--------------------------------------------------------
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@(r15==16'h0003);
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76 |
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77 |
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if (mem220 !== 16'h0000) tb_error("====== P3IN != 0x0000 =====");
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78 |
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if (mem222 !== 16'h55aa) tb_error("====== P3OUT != 0x55aa =====");
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if (mem224 !== 16'ha55a) tb_error("====== P3DIR != 0xa55a =====");
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80 |
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if (mem226 !== 16'h32cd) tb_error("====== P3SEL != 0x32cd =====");
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81 |
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82 |
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83 |
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// PORT 4: TEST RD/WR REGISTER ACCESS
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//--------------------------------------------------------
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@(r15==16'h0004);
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86 |
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87 |
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if (mem230 !== 16'h0000) tb_error("====== P4IN != 0x0000 =====");
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88 |
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if (mem232 !== 16'h55aa) tb_error("====== P4OUT != 0x55aa =====");
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89 |
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if (mem234 !== 16'ha55a) tb_error("====== P4DIR != 0xa55a =====");
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90 |
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if (mem236 !== 16'h32cd) tb_error("====== P4SEL != 0x32cd =====");
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91 |
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92 |
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// PORT 5: TEST RD/WR REGISTER ACCESS
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//--------------------------------------------------------
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@(r15==16'h0005);
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96 |
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97 |
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if (mem240 !== 16'h0000) tb_error("====== P5IN != 0x0000 =====");
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98 |
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if (mem242 !== 16'h55aa) tb_error("====== P5OUT != 0x55aa =====");
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if (mem244 !== 16'ha55a) tb_error("====== P5DIR != 0xa55a =====");
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100 |
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if (mem246 !== 16'h32cd) tb_error("====== P5SEL != 0x32cd =====");
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101 |
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102 |
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103 |
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// PORT 6: TEST RD/WR REGISTER ACCESS
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//--------------------------------------------------------
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@(r15==16'h0006);
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106 |
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107 |
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if (mem250 !== 16'h0000) tb_error("====== P6IN != 0x0000 =====");
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108 |
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if (mem252 !== 16'h55aa) tb_error("====== P6OUT != 0x55aa =====");
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109 |
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if (mem254 !== 16'ha55a) tb_error("====== P6DIR != 0xa55a =====");
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110 |
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if (mem256 !== 16'h32cd) tb_error("====== P6SEL != 0x32cd =====");
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111 |
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112 |
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113 |
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// PORT 1: TEST I/O FUNCTIONALITY
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114 |
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//--------------------------------------------------------
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115 |
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116 |
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@(r15==16'h0200) p1_din = 8'h01;
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117 |
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@(r15==16'h0201) p1_din = 8'h02;
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118 |
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@(r15==16'h0202) p1_din = 8'h04;
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119 |
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@(r15==16'h0203) p1_din = 8'h08;
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120 |
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@(r15==16'h0204) p1_din = 8'h10;
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121 |
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@(r15==16'h0205) p1_din = 8'h20;
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122 |
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@(r15==16'h0206) p1_din = 8'h40;
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123 |
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@(r15==16'h0207) p1_din = 8'h80;
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124 |
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@(r15==16'h0208);
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125 |
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if (mem200 !== 16'h0201) tb_error("====== P1IN != 0x0201 =====");
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126 |
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if (mem202 !== 16'h0804) tb_error("====== P1IN != 0x0804 =====");
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127 |
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if (mem204 !== 16'h2010) tb_error("====== P1IN != 0x2010 =====");
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128 |
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if (mem206 !== 16'h8040) tb_error("====== P1IN != 0x8040 =====");
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129 |
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130 |
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@(r15==16'h1100);
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131 |
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if (p1_dout !== 8'h01) tb_error("====== P1DOUT != 0x01 =====");
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132 |
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@(r15==16'h1101);
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133 |
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if (p1_dout !== 8'h02) tb_error("====== P1DOUT != 0x02 =====");
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134 |
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@(r15==16'h1102);
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135 |
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if (p1_dout !== 8'h04) tb_error("====== P1DOUT != 0x04 =====");
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136 |
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@(r15==16'h1103);
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137 |
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if (p1_dout !== 8'h08) tb_error("====== P1DOUT != 0x08 =====");
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138 |
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@(r15==16'h1104);
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139 |
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if (p1_dout !== 8'h10) tb_error("====== P1DOUT != 0x10 =====");
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140 |
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@(r15==16'h1105);
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141 |
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if (p1_dout !== 8'h20) tb_error("====== P1DOUT != 0x20 =====");
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142 |
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@(r15==16'h1106);
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143 |
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if (p1_dout !== 8'h40) tb_error("====== P1DOUT != 0x40 =====");
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144 |
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@(r15==16'h1107);
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145 |
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if (p1_dout !== 8'h80) tb_error("====== P1DOUT != 0x80 =====");
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146 |
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147 |
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@(r15==16'h1200);
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148 |
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if (p1_dout_en !== 8'h01) tb_error("====== P1DIR != 0x01 =====");
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149 |
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@(r15==16'h1201);
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150 |
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if (p1_dout_en !== 8'h02) tb_error("====== P1DIR != 0x02 =====");
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151 |
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@(r15==16'h1202);
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152 |
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if (p1_dout_en !== 8'h04) tb_error("====== P1DIR != 0x04 =====");
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153 |
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@(r15==16'h1203);
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154 |
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if (p1_dout_en !== 8'h08) tb_error("====== P1DIR != 0x08 =====");
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155 |
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@(r15==16'h1204);
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156 |
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if (p1_dout_en !== 8'h10) tb_error("====== P1DIR != 0x10 =====");
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157 |
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@(r15==16'h1205);
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158 |
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if (p1_dout_en !== 8'h20) tb_error("====== P1DIR != 0x20 =====");
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159 |
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@(r15==16'h1206);
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160 |
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if (p1_dout_en !== 8'h40) tb_error("====== P1DIR != 0x40 =====");
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161 |
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@(r15==16'h1207);
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162 |
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if (p1_dout_en !== 8'h80) tb_error("====== P1DIR != 0x80 =====");
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163 |
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164 |
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@(r15==16'h1300);
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165 |
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if (p1_sel !== 8'h01) tb_error("====== P1SEL != 0x01 =====");
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166 |
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@(r15==16'h1301);
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167 |
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if (p1_sel !== 8'h02) tb_error("====== P1SEL != 0x02 =====");
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168 |
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@(r15==16'h1302);
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169 |
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if (p1_sel !== 8'h04) tb_error("====== P1SEL != 0x04 =====");
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170 |
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@(r15==16'h1303);
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171 |
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if (p1_sel !== 8'h08) tb_error("====== P1SEL != 0x08 =====");
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172 |
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@(r15==16'h1304);
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173 |
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if (p1_sel !== 8'h10) tb_error("====== P1SEL != 0x10 =====");
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174 |
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@(r15==16'h1305);
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175 |
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if (p1_sel !== 8'h20) tb_error("====== P1SEL != 0x20 =====");
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176 |
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@(r15==16'h1306);
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177 |
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if (p1_sel !== 8'h40) tb_error("====== P1SEL != 0x40 =====");
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178 |
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@(r15==16'h1307);
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179 |
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if (p1_sel !== 8'h80) tb_error("====== P1SEL != 0x80 =====");
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180 |
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181 |
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182 |
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// PORT 2: TEST I/O FUNCTIONALITY
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183 |
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//--------------------------------------------------------
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184 |
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185 |
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@(r15==16'h0210) p2_din = 8'h01;
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186 |
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@(r15==16'h0211) p2_din = 8'h02;
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187 |
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@(r15==16'h0212) p2_din = 8'h04;
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188 |
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@(r15==16'h0213) p2_din = 8'h08;
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189 |
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@(r15==16'h0214) p2_din = 8'h10;
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190 |
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@(r15==16'h0215) p2_din = 8'h20;
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191 |
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@(r15==16'h0216) p2_din = 8'h40;
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192 |
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@(r15==16'h0217) p2_din = 8'h80;
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193 |
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@(r15==16'h0218);
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194 |
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if (mem210 !== 16'h0201) tb_error("====== P2IN != 0x0201 =====");
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195 |
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if (mem212 !== 16'h0804) tb_error("====== P2IN != 0x0804 =====");
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196 |
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if (mem214 !== 16'h2010) tb_error("====== P2IN != 0x2010 =====");
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197 |
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if (mem216 !== 16'h8040) tb_error("====== P2IN != 0x8040 =====");
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198 |
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199 |
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@(r15==16'h2100);
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200 |
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if (p2_dout !== 8'h01) tb_error("====== P2DOUT != 0x01 =====");
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201 |
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@(r15==16'h2101);
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202 |
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if (p2_dout !== 8'h02) tb_error("====== P2DOUT != 0x02 =====");
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203 |
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@(r15==16'h2102);
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204 |
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if (p2_dout !== 8'h04) tb_error("====== P2DOUT != 0x04 =====");
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205 |
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@(r15==16'h2103);
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206 |
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if (p2_dout !== 8'h08) tb_error("====== P2DOUT != 0x08 =====");
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207 |
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@(r15==16'h2104);
|
208 |
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if (p2_dout !== 8'h10) tb_error("====== P2DOUT != 0x10 =====");
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209 |
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@(r15==16'h2105);
|
210 |
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if (p2_dout !== 8'h20) tb_error("====== P2DOUT != 0x20 =====");
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211 |
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@(r15==16'h2106);
|
212 |
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if (p2_dout !== 8'h40) tb_error("====== P2DOUT != 0x40 =====");
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213 |
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@(r15==16'h2107);
|
214 |
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if (p2_dout !== 8'h80) tb_error("====== P2DOUT != 0x80 =====");
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215 |
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216 |
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@(r15==16'h2200);
|
217 |
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if (p2_dout_en !== 8'h01) tb_error("====== P2DIR != 0x01 =====");
|
218 |
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@(r15==16'h2201);
|
219 |
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if (p2_dout_en !== 8'h02) tb_error("====== P2DIR != 0x02 =====");
|
220 |
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@(r15==16'h2202);
|
221 |
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if (p2_dout_en !== 8'h04) tb_error("====== P2DIR != 0x04 =====");
|
222 |
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@(r15==16'h2203);
|
223 |
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if (p2_dout_en !== 8'h08) tb_error("====== P2DIR != 0x08 =====");
|
224 |
|
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@(r15==16'h2204);
|
225 |
|
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if (p2_dout_en !== 8'h10) tb_error("====== P2DIR != 0x10 =====");
|
226 |
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@(r15==16'h2205);
|
227 |
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if (p2_dout_en !== 8'h20) tb_error("====== P2DIR != 0x20 =====");
|
228 |
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@(r15==16'h2206);
|
229 |
|
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if (p2_dout_en !== 8'h40) tb_error("====== P2DIR != 0x40 =====");
|
230 |
|
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@(r15==16'h2207);
|
231 |
|
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if (p2_dout_en !== 8'h80) tb_error("====== P2DIR != 0x80 =====");
|
232 |
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|
233 |
|
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@(r15==16'h2300);
|
234 |
|
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if (p2_sel !== 8'h01) tb_error("====== P2SEL != 0x01 =====");
|
235 |
|
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@(r15==16'h2301);
|
236 |
|
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if (p2_sel !== 8'h02) tb_error("====== P2SEL != 0x02 =====");
|
237 |
|
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@(r15==16'h2302);
|
238 |
|
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if (p2_sel !== 8'h04) tb_error("====== P2SEL != 0x04 =====");
|
239 |
|
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@(r15==16'h2303);
|
240 |
|
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if (p2_sel !== 8'h08) tb_error("====== P2SEL != 0x08 =====");
|
241 |
|
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@(r15==16'h2304);
|
242 |
|
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if (p2_sel !== 8'h10) tb_error("====== P2SEL != 0x10 =====");
|
243 |
|
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@(r15==16'h2305);
|
244 |
|
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if (p2_sel !== 8'h20) tb_error("====== P2SEL != 0x20 =====");
|
245 |
|
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@(r15==16'h2306);
|
246 |
|
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if (p2_sel !== 8'h40) tb_error("====== P2SEL != 0x40 =====");
|
247 |
|
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@(r15==16'h2307);
|
248 |
|
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if (p2_sel !== 8'h80) tb_error("====== P2SEL != 0x80 =====");
|
249 |
|
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|
250 |
|
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|
251 |
|
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// PORT 3: TEST I/O FUNCTIONALITY
|
252 |
|
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//--------------------------------------------------------
|
253 |
|
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|
254 |
|
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@(r15==16'h0220) p3_din = 8'h01;
|
255 |
|
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@(r15==16'h0221) p3_din = 8'h02;
|
256 |
|
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@(r15==16'h0222) p3_din = 8'h04;
|
257 |
|
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@(r15==16'h0223) p3_din = 8'h08;
|
258 |
|
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@(r15==16'h0224) p3_din = 8'h10;
|
259 |
|
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@(r15==16'h0225) p3_din = 8'h20;
|
260 |
|
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@(r15==16'h0226) p3_din = 8'h40;
|
261 |
|
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@(r15==16'h0227) p3_din = 8'h80;
|
262 |
|
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@(r15==16'h0228);
|
263 |
|
|
if (mem220 !== 16'h0201) tb_error("====== P3IN != 0x0201 =====");
|
264 |
|
|
if (mem222 !== 16'h0804) tb_error("====== P3IN != 0x0804 =====");
|
265 |
|
|
if (mem224 !== 16'h2010) tb_error("====== P3IN != 0x2010 =====");
|
266 |
|
|
if (mem226 !== 16'h8040) tb_error("====== P3IN != 0x8040 =====");
|
267 |
|
|
|
268 |
|
|
@(r15==16'h3100);
|
269 |
|
|
if (p3_dout !== 8'h01) tb_error("====== P3DOUT != 0x01 =====");
|
270 |
|
|
@(r15==16'h3101);
|
271 |
|
|
if (p3_dout !== 8'h02) tb_error("====== P3DOUT != 0x02 =====");
|
272 |
|
|
@(r15==16'h3102);
|
273 |
|
|
if (p3_dout !== 8'h04) tb_error("====== P3DOUT != 0x04 =====");
|
274 |
|
|
@(r15==16'h3103);
|
275 |
|
|
if (p3_dout !== 8'h08) tb_error("====== P3DOUT != 0x08 =====");
|
276 |
|
|
@(r15==16'h3104);
|
277 |
|
|
if (p3_dout !== 8'h10) tb_error("====== P3DOUT != 0x10 =====");
|
278 |
|
|
@(r15==16'h3105);
|
279 |
|
|
if (p3_dout !== 8'h20) tb_error("====== P3DOUT != 0x20 =====");
|
280 |
|
|
@(r15==16'h3106);
|
281 |
|
|
if (p3_dout !== 8'h40) tb_error("====== P3DOUT != 0x40 =====");
|
282 |
|
|
@(r15==16'h3107);
|
283 |
|
|
if (p3_dout !== 8'h80) tb_error("====== P3DOUT != 0x80 =====");
|
284 |
|
|
|
285 |
|
|
@(r15==16'h3200);
|
286 |
|
|
if (p3_dout_en !== 8'h01) tb_error("====== P3DIR != 0x01 =====");
|
287 |
|
|
@(r15==16'h3201);
|
288 |
|
|
if (p3_dout_en !== 8'h02) tb_error("====== P3DIR != 0x02 =====");
|
289 |
|
|
@(r15==16'h3202);
|
290 |
|
|
if (p3_dout_en !== 8'h04) tb_error("====== P3DIR != 0x04 =====");
|
291 |
|
|
@(r15==16'h3203);
|
292 |
|
|
if (p3_dout_en !== 8'h08) tb_error("====== P3DIR != 0x08 =====");
|
293 |
|
|
@(r15==16'h3204);
|
294 |
|
|
if (p3_dout_en !== 8'h10) tb_error("====== P3DIR != 0x10 =====");
|
295 |
|
|
@(r15==16'h3205);
|
296 |
|
|
if (p3_dout_en !== 8'h20) tb_error("====== P3DIR != 0x20 =====");
|
297 |
|
|
@(r15==16'h3206);
|
298 |
|
|
if (p3_dout_en !== 8'h40) tb_error("====== P3DIR != 0x40 =====");
|
299 |
|
|
@(r15==16'h3207);
|
300 |
|
|
if (p3_dout_en !== 8'h80) tb_error("====== P3DIR != 0x80 =====");
|
301 |
|
|
|
302 |
|
|
@(r15==16'h3300);
|
303 |
|
|
if (p3_sel !== 8'h01) tb_error("====== P3SEL != 0x01 =====");
|
304 |
|
|
@(r15==16'h3301);
|
305 |
|
|
if (p3_sel !== 8'h02) tb_error("====== P3SEL != 0x02 =====");
|
306 |
|
|
@(r15==16'h3302);
|
307 |
|
|
if (p3_sel !== 8'h04) tb_error("====== P3SEL != 0x04 =====");
|
308 |
|
|
@(r15==16'h3303);
|
309 |
|
|
if (p3_sel !== 8'h08) tb_error("====== P3SEL != 0x08 =====");
|
310 |
|
|
@(r15==16'h3304);
|
311 |
|
|
if (p3_sel !== 8'h10) tb_error("====== P3SEL != 0x10 =====");
|
312 |
|
|
@(r15==16'h3305);
|
313 |
|
|
if (p3_sel !== 8'h20) tb_error("====== P3SEL != 0x20 =====");
|
314 |
|
|
@(r15==16'h3306);
|
315 |
|
|
if (p3_sel !== 8'h40) tb_error("====== P3SEL != 0x40 =====");
|
316 |
|
|
@(r15==16'h3307);
|
317 |
|
|
if (p3_sel !== 8'h80) tb_error("====== P3SEL != 0x80 =====");
|
318 |
|
|
|
319 |
|
|
|
320 |
|
|
// PORT 4: TEST I/O FUNCTIONALITY
|
321 |
|
|
//--------------------------------------------------------
|
322 |
|
|
|
323 |
|
|
@(r15==16'h0230) p4_din = 8'h01;
|
324 |
|
|
@(r15==16'h0231) p4_din = 8'h02;
|
325 |
|
|
@(r15==16'h0232) p4_din = 8'h04;
|
326 |
|
|
@(r15==16'h0233) p4_din = 8'h08;
|
327 |
|
|
@(r15==16'h0234) p4_din = 8'h10;
|
328 |
|
|
@(r15==16'h0235) p4_din = 8'h20;
|
329 |
|
|
@(r15==16'h0236) p4_din = 8'h40;
|
330 |
|
|
@(r15==16'h0237) p4_din = 8'h80;
|
331 |
|
|
@(r15==16'h0238);
|
332 |
|
|
if (mem230 !== 16'h0201) tb_error("====== P4IN != 0x0201 =====");
|
333 |
|
|
if (mem232 !== 16'h0804) tb_error("====== P4IN != 0x0804 =====");
|
334 |
|
|
if (mem234 !== 16'h2010) tb_error("====== P4IN != 0x2010 =====");
|
335 |
|
|
if (mem236 !== 16'h8040) tb_error("====== P4IN != 0x8040 =====");
|
336 |
|
|
|
337 |
|
|
@(r15==16'h4100);
|
338 |
|
|
if (p4_dout !== 8'h01) tb_error("====== P4DOUT != 0x01 =====");
|
339 |
|
|
@(r15==16'h4101);
|
340 |
|
|
if (p4_dout !== 8'h02) tb_error("====== P4DOUT != 0x02 =====");
|
341 |
|
|
@(r15==16'h4102);
|
342 |
|
|
if (p4_dout !== 8'h04) tb_error("====== P4DOUT != 0x04 =====");
|
343 |
|
|
@(r15==16'h4103);
|
344 |
|
|
if (p4_dout !== 8'h08) tb_error("====== P4DOUT != 0x08 =====");
|
345 |
|
|
@(r15==16'h4104);
|
346 |
|
|
if (p4_dout !== 8'h10) tb_error("====== P4DOUT != 0x10 =====");
|
347 |
|
|
@(r15==16'h4105);
|
348 |
|
|
if (p4_dout !== 8'h20) tb_error("====== P4DOUT != 0x20 =====");
|
349 |
|
|
@(r15==16'h4106);
|
350 |
|
|
if (p4_dout !== 8'h40) tb_error("====== P4DOUT != 0x40 =====");
|
351 |
|
|
@(r15==16'h4107);
|
352 |
|
|
if (p4_dout !== 8'h80) tb_error("====== P4DOUT != 0x80 =====");
|
353 |
|
|
|
354 |
|
|
@(r15==16'h4200);
|
355 |
|
|
if (p4_dout_en !== 8'h01) tb_error("====== P4DIR != 0x01 =====");
|
356 |
|
|
@(r15==16'h4201);
|
357 |
|
|
if (p4_dout_en !== 8'h02) tb_error("====== P4DIR != 0x02 =====");
|
358 |
|
|
@(r15==16'h4202);
|
359 |
|
|
if (p4_dout_en !== 8'h04) tb_error("====== P4DIR != 0x04 =====");
|
360 |
|
|
@(r15==16'h4203);
|
361 |
|
|
if (p4_dout_en !== 8'h08) tb_error("====== P4DIR != 0x08 =====");
|
362 |
|
|
@(r15==16'h4204);
|
363 |
|
|
if (p4_dout_en !== 8'h10) tb_error("====== P4DIR != 0x10 =====");
|
364 |
|
|
@(r15==16'h4205);
|
365 |
|
|
if (p4_dout_en !== 8'h20) tb_error("====== P4DIR != 0x20 =====");
|
366 |
|
|
@(r15==16'h4206);
|
367 |
|
|
if (p4_dout_en !== 8'h40) tb_error("====== P4DIR != 0x40 =====");
|
368 |
|
|
@(r15==16'h4207);
|
369 |
|
|
if (p4_dout_en !== 8'h80) tb_error("====== P4DIR != 0x80 =====");
|
370 |
|
|
|
371 |
|
|
@(r15==16'h4300);
|
372 |
|
|
if (p4_sel !== 8'h01) tb_error("====== P4SEL != 0x01 =====");
|
373 |
|
|
@(r15==16'h4301);
|
374 |
|
|
if (p4_sel !== 8'h02) tb_error("====== P4SEL != 0x02 =====");
|
375 |
|
|
@(r15==16'h4302);
|
376 |
|
|
if (p4_sel !== 8'h04) tb_error("====== P4SEL != 0x04 =====");
|
377 |
|
|
@(r15==16'h4303);
|
378 |
|
|
if (p4_sel !== 8'h08) tb_error("====== P4SEL != 0x08 =====");
|
379 |
|
|
@(r15==16'h4304);
|
380 |
|
|
if (p4_sel !== 8'h10) tb_error("====== P4SEL != 0x10 =====");
|
381 |
|
|
@(r15==16'h4305);
|
382 |
|
|
if (p4_sel !== 8'h20) tb_error("====== P4SEL != 0x20 =====");
|
383 |
|
|
@(r15==16'h4306);
|
384 |
|
|
if (p4_sel !== 8'h40) tb_error("====== P4SEL != 0x40 =====");
|
385 |
|
|
@(r15==16'h4307);
|
386 |
|
|
if (p4_sel !== 8'h80) tb_error("====== P4SEL != 0x80 =====");
|
387 |
|
|
|
388 |
|
|
|
389 |
|
|
// PORT 5: TEST I/O FUNCTIONALITY
|
390 |
|
|
//--------------------------------------------------------
|
391 |
|
|
|
392 |
|
|
@(r15==16'h0240) p5_din = 8'h01;
|
393 |
|
|
@(r15==16'h0241) p5_din = 8'h02;
|
394 |
|
|
@(r15==16'h0242) p5_din = 8'h04;
|
395 |
|
|
@(r15==16'h0243) p5_din = 8'h08;
|
396 |
|
|
@(r15==16'h0244) p5_din = 8'h10;
|
397 |
|
|
@(r15==16'h0245) p5_din = 8'h20;
|
398 |
|
|
@(r15==16'h0246) p5_din = 8'h40;
|
399 |
|
|
@(r15==16'h0247) p5_din = 8'h80;
|
400 |
|
|
@(r15==16'h0248);
|
401 |
|
|
if (mem240 !== 16'h0201) tb_error("====== P5IN != 0x0201 =====");
|
402 |
|
|
if (mem242 !== 16'h0804) tb_error("====== P5IN != 0x0804 =====");
|
403 |
|
|
if (mem244 !== 16'h2010) tb_error("====== P5IN != 0x2010 =====");
|
404 |
|
|
if (mem246 !== 16'h8040) tb_error("====== P5IN != 0x8040 =====");
|
405 |
|
|
|
406 |
|
|
@(r15==16'h5100);
|
407 |
|
|
if (p5_dout !== 8'h01) tb_error("====== P5DOUT != 0x01 =====");
|
408 |
|
|
@(r15==16'h5101);
|
409 |
|
|
if (p5_dout !== 8'h02) tb_error("====== P5DOUT != 0x02 =====");
|
410 |
|
|
@(r15==16'h5102);
|
411 |
|
|
if (p5_dout !== 8'h04) tb_error("====== P5DOUT != 0x04 =====");
|
412 |
|
|
@(r15==16'h5103);
|
413 |
|
|
if (p5_dout !== 8'h08) tb_error("====== P5DOUT != 0x08 =====");
|
414 |
|
|
@(r15==16'h5104);
|
415 |
|
|
if (p5_dout !== 8'h10) tb_error("====== P5DOUT != 0x10 =====");
|
416 |
|
|
@(r15==16'h5105);
|
417 |
|
|
if (p5_dout !== 8'h20) tb_error("====== P5DOUT != 0x20 =====");
|
418 |
|
|
@(r15==16'h5106);
|
419 |
|
|
if (p5_dout !== 8'h40) tb_error("====== P5DOUT != 0x40 =====");
|
420 |
|
|
@(r15==16'h5107);
|
421 |
|
|
if (p5_dout !== 8'h80) tb_error("====== P5DOUT != 0x80 =====");
|
422 |
|
|
|
423 |
|
|
@(r15==16'h5200);
|
424 |
|
|
if (p5_dout_en !== 8'h01) tb_error("====== P5DIR != 0x01 =====");
|
425 |
|
|
@(r15==16'h5201);
|
426 |
|
|
if (p5_dout_en !== 8'h02) tb_error("====== P5DIR != 0x02 =====");
|
427 |
|
|
@(r15==16'h5202);
|
428 |
|
|
if (p5_dout_en !== 8'h04) tb_error("====== P5DIR != 0x04 =====");
|
429 |
|
|
@(r15==16'h5203);
|
430 |
|
|
if (p5_dout_en !== 8'h08) tb_error("====== P5DIR != 0x08 =====");
|
431 |
|
|
@(r15==16'h5204);
|
432 |
|
|
if (p5_dout_en !== 8'h10) tb_error("====== P5DIR != 0x10 =====");
|
433 |
|
|
@(r15==16'h5205);
|
434 |
|
|
if (p5_dout_en !== 8'h20) tb_error("====== P5DIR != 0x20 =====");
|
435 |
|
|
@(r15==16'h5206);
|
436 |
|
|
if (p5_dout_en !== 8'h40) tb_error("====== P5DIR != 0x40 =====");
|
437 |
|
|
@(r15==16'h5207);
|
438 |
|
|
if (p5_dout_en !== 8'h80) tb_error("====== P5DIR != 0x80 =====");
|
439 |
|
|
|
440 |
|
|
@(r15==16'h5300);
|
441 |
|
|
if (p5_sel !== 8'h01) tb_error("====== P5SEL != 0x01 =====");
|
442 |
|
|
@(r15==16'h5301);
|
443 |
|
|
if (p5_sel !== 8'h02) tb_error("====== P5SEL != 0x02 =====");
|
444 |
|
|
@(r15==16'h5302);
|
445 |
|
|
if (p5_sel !== 8'h04) tb_error("====== P5SEL != 0x04 =====");
|
446 |
|
|
@(r15==16'h5303);
|
447 |
|
|
if (p5_sel !== 8'h08) tb_error("====== P5SEL != 0x08 =====");
|
448 |
|
|
@(r15==16'h5304);
|
449 |
|
|
if (p5_sel !== 8'h10) tb_error("====== P5SEL != 0x10 =====");
|
450 |
|
|
@(r15==16'h5305);
|
451 |
|
|
if (p5_sel !== 8'h20) tb_error("====== P5SEL != 0x20 =====");
|
452 |
|
|
@(r15==16'h5306);
|
453 |
|
|
if (p5_sel !== 8'h40) tb_error("====== P5SEL != 0x40 =====");
|
454 |
|
|
@(r15==16'h5307);
|
455 |
|
|
if (p5_sel !== 8'h80) tb_error("====== P5SEL != 0x80 =====");
|
456 |
|
|
|
457 |
|
|
|
458 |
|
|
// PORT 6: TEST I/O FUNCTIONALITY
|
459 |
|
|
//--------------------------------------------------------
|
460 |
|
|
|
461 |
|
|
@(r15==16'h0250) p6_din = 8'h01;
|
462 |
|
|
@(r15==16'h0251) p6_din = 8'h02;
|
463 |
|
|
@(r15==16'h0252) p6_din = 8'h04;
|
464 |
|
|
@(r15==16'h0253) p6_din = 8'h08;
|
465 |
|
|
@(r15==16'h0254) p6_din = 8'h10;
|
466 |
|
|
@(r15==16'h0255) p6_din = 8'h20;
|
467 |
|
|
@(r15==16'h0256) p6_din = 8'h40;
|
468 |
|
|
@(r15==16'h0257) p6_din = 8'h80;
|
469 |
|
|
@(r15==16'h0258);
|
470 |
|
|
if (mem250 !== 16'h0201) tb_error("====== P6IN != 0x0201 =====");
|
471 |
|
|
if (mem252 !== 16'h0804) tb_error("====== P6IN != 0x0804 =====");
|
472 |
|
|
if (mem254 !== 16'h2010) tb_error("====== P6IN != 0x2010 =====");
|
473 |
|
|
if (mem256 !== 16'h8040) tb_error("====== P6IN != 0x8040 =====");
|
474 |
|
|
|
475 |
|
|
@(r15==16'h6100);
|
476 |
|
|
if (p6_dout !== 8'h01) tb_error("====== P6DOUT != 0x01 =====");
|
477 |
|
|
@(r15==16'h6101);
|
478 |
|
|
if (p6_dout !== 8'h02) tb_error("====== P6DOUT != 0x02 =====");
|
479 |
|
|
@(r15==16'h6102);
|
480 |
|
|
if (p6_dout !== 8'h04) tb_error("====== P6DOUT != 0x04 =====");
|
481 |
|
|
@(r15==16'h6103);
|
482 |
|
|
if (p6_dout !== 8'h08) tb_error("====== P6DOUT != 0x08 =====");
|
483 |
|
|
@(r15==16'h6104);
|
484 |
|
|
if (p6_dout !== 8'h10) tb_error("====== P6DOUT != 0x10 =====");
|
485 |
|
|
@(r15==16'h6105);
|
486 |
|
|
if (p6_dout !== 8'h20) tb_error("====== P6DOUT != 0x20 =====");
|
487 |
|
|
@(r15==16'h6106);
|
488 |
|
|
if (p6_dout !== 8'h40) tb_error("====== P6DOUT != 0x40 =====");
|
489 |
|
|
@(r15==16'h6107);
|
490 |
|
|
if (p6_dout !== 8'h80) tb_error("====== P6DOUT != 0x80 =====");
|
491 |
|
|
|
492 |
|
|
@(r15==16'h6200);
|
493 |
|
|
if (p6_dout_en !== 8'h01) tb_error("====== P6DIR != 0x01 =====");
|
494 |
|
|
@(r15==16'h6201);
|
495 |
|
|
if (p6_dout_en !== 8'h02) tb_error("====== P6DIR != 0x02 =====");
|
496 |
|
|
@(r15==16'h6202);
|
497 |
|
|
if (p6_dout_en !== 8'h04) tb_error("====== P6DIR != 0x04 =====");
|
498 |
|
|
@(r15==16'h6203);
|
499 |
|
|
if (p6_dout_en !== 8'h08) tb_error("====== P6DIR != 0x08 =====");
|
500 |
|
|
@(r15==16'h6204);
|
501 |
|
|
if (p6_dout_en !== 8'h10) tb_error("====== P6DIR != 0x10 =====");
|
502 |
|
|
@(r15==16'h6205);
|
503 |
|
|
if (p6_dout_en !== 8'h20) tb_error("====== P6DIR != 0x20 =====");
|
504 |
|
|
@(r15==16'h6206);
|
505 |
|
|
if (p6_dout_en !== 8'h40) tb_error("====== P6DIR != 0x40 =====");
|
506 |
|
|
@(r15==16'h6207);
|
507 |
|
|
if (p6_dout_en !== 8'h80) tb_error("====== P6DIR != 0x80 =====");
|
508 |
|
|
|
509 |
|
|
@(r15==16'h6300);
|
510 |
|
|
if (p6_sel !== 8'h01) tb_error("====== P6SEL != 0x01 =====");
|
511 |
|
|
@(r15==16'h6301);
|
512 |
|
|
if (p6_sel !== 8'h02) tb_error("====== P6SEL != 0x02 =====");
|
513 |
|
|
@(r15==16'h6302);
|
514 |
|
|
if (p6_sel !== 8'h04) tb_error("====== P6SEL != 0x04 =====");
|
515 |
|
|
@(r15==16'h6303);
|
516 |
|
|
if (p6_sel !== 8'h08) tb_error("====== P6SEL != 0x08 =====");
|
517 |
|
|
@(r15==16'h6304);
|
518 |
|
|
if (p6_sel !== 8'h10) tb_error("====== P6SEL != 0x10 =====");
|
519 |
|
|
@(r15==16'h6305);
|
520 |
|
|
if (p6_sel !== 8'h20) tb_error("====== P6SEL != 0x20 =====");
|
521 |
|
|
@(r15==16'h6306);
|
522 |
|
|
if (p6_sel !== 8'h40) tb_error("====== P6SEL != 0x40 =====");
|
523 |
|
|
@(r15==16'h6307);
|
524 |
|
|
if (p6_sel !== 8'h80) tb_error("====== P6SEL != 0x80 =====");
|
525 |
|
|
|
526 |
|
|
|
527 |
|
|
stimulus_done = 1;
|
528 |
|
|
end
|
529 |
|
|
|