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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [irq32.s43] - Blame information for rev 219

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1 192 olivier.gi
/*===========================================================================*/
2
/* Copyright (C) 2001 Authors                                                */
3
/*                                                                           */
4
/* This source file may be used and distributed without restriction provided */
5
/* that this copyright statement is not removed from the file and that any   */
6
/* derivative work contains the original copyright notice and the associated */
7
/* disclaimer.                                                               */
8
/*                                                                           */
9
/* This source file is free software; you can redistribute it and/or modify  */
10
/* it under the terms of the GNU Lesser General Public License as published  */
11
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12
/* (at your option) any later version.                                       */
13
/*                                                                           */
14
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17
/* License for more details.                                                 */
18
/*                                                                           */
19
/* You should have received a copy of the GNU Lesser General Public License  */
20
/* along with this source; if not, write to the Free Software Foundation,    */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
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/*                                                                           */
23
/*===========================================================================*/
24
/*                 IRQ 1 to 16 FOR SYSTEM WITH 32 IRQs                       */
25
/*---------------------------------------------------------------------------*/
26
/* Test the some IRQs for RTL configuration with more than 16 IRQs:          */
27
/*                                                                           */
28
/*           - for 16 IRQ configuration:  test is skipped.                   */
29
/*           - for 32 IRQ configuration:  will test IRQ  1 to 16.            */
30
/*           - for 64 IRQ configuration:  will test IRQ 32 to 48.            */
31
/*                                                                           */
32
/*                                                                           */
33
/* Author(s):                                                                */
34
/*             - Olivier Girard,    olgirard@gmail.com                       */
35
/*                                                                           */
36
/*---------------------------------------------------------------------------*/
37
/* $Rev: 19 $                                                                */
38
/* $LastChangedBy: olivier.girard $                                          */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
40
/*===========================================================================*/
41
 
42
.include "pmem_defs.asm"
43
 
44
.global main
45
 
46
        mov     #0x1234, r3
47
        mov     #0x1234, r4
48
        mov     #0x1234, r5
49
        mov     #0x1234, r6
50
        mov     #0x1234, r7
51
        mov     #0x1234, r8
52
        mov     #0x1234, r9
53
        mov     #0x1234, r10
54
        mov     #0x1234, r11
55
        mov     #0x1234, r12
56
        mov     #0x1234, r13
57
        mov     #0x1234, r14
58
main:
59
        # Test RESET vector
60
        #------------------------
61
        mov     #0x1000, r15
62
 
63
 
64
        # Test RETI instruction
65
        #------------------------
66
 
67
        # Pre-initialize stack
68
        mov             #DMEM_252, r1
69
        push #RETI_ROUTINE
70
        push            #0x010f
71
        mov     #0x0000, &0x0200
72
 
73
        # Run RETI test
74
        mov     #0x0000, r2
75
        mov     #0x0000, r5
76
        reti
77
end_of_reti_test:
78
 
79
        mov     #0x2000, r15
80
 
81
 
82
        # Test IRQ  0
83
        #-------------------------
84
 
85
        mov     #0x0008, r2  ; Enable interrupts
86
        mov     #0x0000, r6
87
        mov     #0xaaaa, r7
88
        mov     #0x5555, r8
89
        mov     #0x3000, r15
90
 
91
wait_irq00:
92
        cmp     #0x5678, r6
93
        jne     wait_irq00
94
 
95
        mov     #0x3001, r15
96
 
97
 
98
        # Test IRQ  1
99
        #-------------------------
100
 
101
        mov     #0x0008, r2  ; Enable interrupts
102
        mov     #0x0000, r6
103
        mov     #0xaaaa, r7
104
        mov     #0x5555, r8
105
        mov     #0x4000, r15
106
 
107
wait_irq01:
108
        cmp     #0x9abc, r6
109
        jne     wait_irq01
110
 
111
        mov     #0x4001, r15
112
 
113
 
114
        # Test IRQ  2
115
        #-------------------------
116
 
117
        mov     #0x0008, r2  ; Enable interrupts
118
        mov     #0x0000, r6
119
        mov     #0xaaaa, r7
120
        mov     #0x5555, r8
121
        mov     #0x5000, r15
122
 
123
wait_irq02:
124
        cmp     #0xdef1, r6
125
        jne     wait_irq02
126
 
127
        mov     #0x5001, r15
128
 
129
 
130
        # Test IRQ  3
131
        #-------------------------
132
 
133
        mov     #0x0008, r2  ; Enable interrupts
134
        mov     #0x0000, r6
135
        mov     #0xaaaa, r7
136
        mov     #0x5555, r8
137
        mov     #0x6000, r15
138
 
139
wait_irq03:
140
        cmp     #0x2345, r6
141
        jne     wait_irq03
142
 
143
        mov     #0x6001, r15
144
 
145
 
146
        # Test IRQ  4
147
        #-------------------------
148
 
149
        mov     #0x0008, r2  ; Enable interrupts
150
        mov     #0x0000, r6
151
        mov     #0xaaaa, r7
152
        mov     #0x5555, r8
153
        mov     #0x7000, r15
154
 
155
wait_irq04:
156
        cmp     #0x6789, r6
157
        jne     wait_irq04
158
 
159
        mov     #0x7001, r15
160
 
161
 
162
        # Test IRQ  5
163
        #-------------------------
164
 
165
        mov     #0x0008, r2  ; Enable interrupts
166
        mov     #0x0000, r6
167
        mov     #0xaaaa, r7
168
        mov     #0x5555, r8
169
        mov     #0x8000, r15
170
 
171
wait_irq05:
172
        cmp     #0xabcd, r6
173
        jne     wait_irq05
174
 
175
        mov     #0x8001, r15
176
 
177
 
178
        # Test IRQ  6
179
        #-------------------------
180
 
181
        mov     #0x0008, r2  ; Enable interrupts
182
        mov     #0x0000, r6
183
        mov     #0xaaaa, r7
184
        mov     #0x5555, r8
185
        mov     #0x9000, r15
186
 
187
wait_irq06:
188
        cmp     #0xef12, r6
189
        jne     wait_irq06
190
 
191
        mov     #0x9001, r15
192
 
193
 
194
        # Test IRQ  7
195
        #-------------------------
196
 
197
        mov     #0x0008, r2  ; Enable interrupts
198
        mov     #0x0000, r6
199
        mov     #0xaaaa, r7
200
        mov     #0x5555, r8
201
        mov     #0xa000, r15
202
 
203
wait_irq07:
204
        cmp     #0x3456, r6
205
        jne     wait_irq07
206
 
207
        mov     #0xa001, r15
208
 
209
 
210
        # Test IRQ  8
211
        #-------------------------
212
 
213
        mov     #0x0008, r2  ; Enable interrupts
214
        mov     #0x0000, r6
215
        mov     #0xaaaa, r7
216
        mov     #0x5555, r8
217
        mov     #0xb000, r15
218
 
219
wait_irq08:
220
        cmp     #0x789a, r6
221
        jne     wait_irq08
222
 
223
        mov     #0xb001, r15
224
 
225
 
226
        # Test IRQ  9
227
        #-------------------------
228
 
229
        mov     #0x0008, r2  ; Enable interrupts
230
        mov     #0x0000, r6
231
        mov     #0xaaaa, r7
232
        mov     #0x5555, r8
233
        mov     #0xc000, r15
234
 
235
wait_irq09:
236
        cmp     #0xbcde, r6
237
        jne     wait_irq09
238
 
239
        mov     #0xc001, r15
240
 
241
 
242
        # Test IRQ 10
243
        #-------------------------
244
 
245
        mov     #0x0008, r2  ; Enable interrupts
246
        mov     #0x0000, r6
247
        mov     #0xaaaa, r7
248
        mov     #0x5555, r8
249
        mov     #0xd000, r15
250
 
251
wait_irq10:
252
        cmp     #0xf123, r6
253
        jne     wait_irq10
254
 
255
        mov     #0xd001, r15
256
 
257
 
258
        # Test IRQ 11
259
        #-------------------------
260
 
261
        mov     #0x0008, r2  ; Enable interrupts
262
        mov     #0x0000, r6
263
        mov     #0xaaaa, r7
264
        mov     #0x5555, r8
265
        mov     #0xe000, r15
266
 
267
wait_irq11:
268
        cmp     #0x4567, r6
269
        jne     wait_irq11
270
 
271
        mov     #0xe001, r15
272
 
273
 
274
        # Test IRQ 12
275
        #-------------------------
276
 
277
        mov     #0x0008, r2  ; Enable interrupts
278
        mov     #0x0000, r6
279
        mov     #0xaaaa, r7
280
        mov     #0x5555, r8
281
        mov     #0xf000, r15
282
 
283
wait_irq12:
284
        cmp     #0x89ab, r6
285
        jne     wait_irq12
286
 
287
        mov     #0xf001, r15
288
 
289
 
290
        # Test IRQ 13
291
        #-------------------------
292
 
293
        mov     #0x0008, r2  ; Enable interrupts
294
        mov     #0x0000, r6
295
        mov     #0xaaaa, r7
296
        mov     #0x5555, r8
297
        mov     #0xf100, r15
298
 
299
wait_irq13:
300
        cmp     #0xcdef, r6
301
        jne     wait_irq13
302
 
303
        mov     #0xf101, r15
304
 
305
 
306
        # Test IRQ 14
307
        #-------------------------
308
 
309
        mov     #0x0008, r2  ; Enable interrupts
310
        mov     #0x0000, r6
311
        mov     #0xaaaa, r7
312
        mov     #0x5555, r8
313
        mov     #0xf200, r15
314
 
315
wait_irq14:
316
        cmp     #0xfedc, r6
317
        jne     wait_irq14
318
 
319
        mov     #0xf201, r15
320
 
321
 
322
        # Test IRQ 15
323
        #-------------------------
324
 
325
        mov     #0x0008, r2  ; Enable interrupts
326
        mov     #0x0000, r6
327
        mov     #0xaaaa, r7
328
        mov     #0x5555, r8
329
        mov     #0xf300, r15
330
 
331
wait_irq15:
332
        cmp     #0xba98, r6
333
        jne     wait_irq15
334
 
335
        mov     #0xf301, r15
336
 
337
 
338
        /* ----------------------    END OF TEST   --------------- */
339
end_of_test:
340
        nop
341
        br #0xffff
342
 
343
 
344
 
345
        /* ----------------------    FUNCTIONS    --------------- */
346
 
347
RETI_ROUTINE:
348
        mov #0x1234, r5
349
        jmp end_of_reti_test
350
 
351
 
352
IRQ00_ROUTINE:
353
        mov #0x5678, r6
354
        mov      r2, r7 ; Save Status register
355
        mov      r1, r8 ; Save Stack register
356
        reti
357
 
358
IRQ01_ROUTINE:
359
        mov #0x9abc, r6
360
        mov      r2, r7 ; Save Status register
361
        mov      r1, r8 ; Save Stack register
362
        reti
363
 
364
IRQ02_ROUTINE:
365
        mov #0xdef1, r6
366
        mov      r2, r7 ; Save Status register
367
        mov      r1, r8 ; Save Stack register
368
        reti
369
 
370
IRQ03_ROUTINE:
371
        mov #0x2345, r6
372
        mov      r2, r7 ; Save Status register
373
        mov      r1, r8 ; Save Stack register
374
        reti
375
 
376
IRQ04_ROUTINE:
377
        mov #0x6789, r6
378
        mov      r2, r7 ; Save Status register
379
        mov      r1, r8 ; Save Stack register
380
        reti
381
 
382
IRQ05_ROUTINE:
383
        mov #0xabcd, r6
384
        mov      r2, r7 ; Save Status register
385
        mov      r1, r8 ; Save Stack register
386
        reti
387
 
388
IRQ06_ROUTINE:
389
        mov #0xef12, r6
390
        mov      r2, r7 ; Save Status register
391
        mov      r1, r8 ; Save Stack register
392
        reti
393
 
394
IRQ07_ROUTINE:
395
        mov #0x3456, r6
396
        mov      r2, r7 ; Save Status register
397
        mov      r1, r8 ; Save Stack register
398
        reti
399
 
400
IRQ08_ROUTINE:
401
        mov #0x789a, r6
402
        mov      r2, r7 ; Save Status register
403
        mov      r1, r8 ; Save Stack register
404
        reti
405
 
406
IRQ09_ROUTINE:
407
        mov #0xbcde, r6
408
        mov      r2, r7 ; Save Status register
409
        mov      r1, r8 ; Save Stack register
410
        reti
411
 
412
IRQ10_ROUTINE:
413
        mov #0xf123, r6
414
        mov      r2, r7 ; Save Status register
415
        mov      r1, r8 ; Save Stack register
416
        reti
417
 
418
IRQ11_ROUTINE:
419
        mov #0x4567, r6
420
        mov      r2, r7 ; Save Status register
421
        mov      r1, r8 ; Save Stack register
422
        reti
423
 
424
IRQ12_ROUTINE:
425
        mov #0x89ab, r6
426
        mov      r2, r7 ; Save Status register
427
        mov      r1, r8 ; Save Stack register
428
        reti
429
 
430
IRQ13_ROUTINE:
431
        mov #0xcdef, r6
432
        mov      r2, r7 ; Save Status register
433
        mov      r1, r8 ; Save Stack register
434
        reti
435
 
436
IRQ14_ROUTINE:
437
        mov #0xfedc, r6
438
        mov      r2, r7 ; Save Status register
439
        mov      r1, r8 ; Save Stack register
440
        reti
441
 
442
IRQ15_ROUTINE:
443
        mov #0xba98, r6
444
        mov      r2, r7 ; Save Status register
445
        mov      r1, r8 ; Save Stack register
446
        reti
447
 
448
        nop
449
        nop
450
        nop
451
        nop
452
        nop
453
 
454
 
455
 
456
        /* ----------------------         INTERRUPT VECTORS  --------------- */
457
.section .vectors32, "a"
458
.word IRQ00_ROUTINE     ; Interrupt  0 (lowest priority)    
459
.word IRQ01_ROUTINE     ; Interrupt  1                      
460
.word IRQ02_ROUTINE     ; Interrupt  2                      
461
.word IRQ03_ROUTINE     ; Interrupt  3                      
462
.word IRQ04_ROUTINE     ; Interrupt  4                      
463
.word IRQ05_ROUTINE     ; Interrupt  5                      
464
.word IRQ06_ROUTINE     ; Interrupt  6                      
465
.word IRQ07_ROUTINE     ; Interrupt  7                      
466
.word IRQ08_ROUTINE     ; Interrupt  8                      
467
.word IRQ09_ROUTINE     ; Interrupt  9                      
468
.word IRQ10_ROUTINE     ; Interrupt 10                      
469
.word IRQ11_ROUTINE     ; Interrupt 11                      
470
.word IRQ12_ROUTINE     ; Interrupt 12                      
471
.word IRQ13_ROUTINE     ; Interrupt 13                      
472
.word IRQ14_ROUTINE     ; Interrupt 14                      
473
.word IRQ15_ROUTINE     ; Interrupt 15                      
474
 
475
.section .vectors, "a"
476
.word end_of_test       ; Interrupt 16                      
477
.word end_of_test       ; Interrupt 17                      
478
.word end_of_test       ; Interrupt 18                      
479
.word end_of_test       ; Interrupt 19                      
480
.word end_of_test       ; Interrupt 20                      
481
.word end_of_test       ; Interrupt 21                      
482
.word end_of_test       ; Interrupt 22                      
483
.word end_of_test       ; Interrupt 23                      
484
.word end_of_test       ; Interrupt 24                      
485
.word end_of_test       ; Interrupt 25                      
486
.word end_of_test       ; Interrupt 26                      Watchdog timer
487
.word end_of_test       ; Interrupt 27                      
488
.word end_of_test       ; Interrupt 28                      
489
.word end_of_test       ; Interrupt 29                      
490
.word end_of_test       ; Interrupt 30                      NMI
491
.word main              ; Interrupt 31 (highest priority)   RESET

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