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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [irq32.v] - Blame information for rev 200

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1 192 olivier.gi 
/*===========================================================================*/
2 
/* Copyright (C) 2001 Authors                                                */
3 
/*                                                                           */
4 
/* This source file may be used and distributed without restriction provided */
5 
/* that this copyright statement is not removed from the file and that any   */
6 
/* derivative work contains the original copyright notice and the associated */
7 
/* disclaimer.                                                               */
8 
/*                                                                           */
9 
/* This source file is free software; you can redistribute it and/or modify  */
10 
/* it under the terms of the GNU Lesser General Public License as published  */
11 
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12 
/* (at your option) any later version.                                       */
13 
/*                                                                           */
14 
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15 
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16 
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17 
/* License for more details.                                                 */
18 
/*                                                                           */
19 
/* You should have received a copy of the GNU Lesser General Public License  */
20 
/* along with this source; if not, write to the Free Software Foundation,    */
21 
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22 
/*                                                                           */
23 
/*===========================================================================*/
24 
/*                 IRQ 1 to 16 FOR SYSTEM WITH 32 IRQs                       */
25 
/*---------------------------------------------------------------------------*/
26 
/* Test the some IRQs for RTL configuration with more than 16 IRQs:          */
27 
/*                                                                           */
28 
/*           - for 16 IRQ configuration:  test is skipped.                   */
29 
/*           - for 32 IRQ configuration:  will test IRQ  1 to 16.            */
30 
/*           - for 64 IRQ configuration:  will test IRQ 32 to 48.            */
31 
/*                                                                           */
32 
/* Author(s):                                                                */
33 
/*             - Olivier Girard,    olgirard@gmail.com                       */
34 
/*                                                                           */
35 
/*---------------------------------------------------------------------------*/
36 
/* $Rev: 95 $                                                                */
37 
/* $LastChangedBy: olivier.girard $                                          */
38 
/* $LastChangedDate: 2011-02-24 21:37:57 +0100 (Thu, 24 Feb 2011) $          */
39 
/*===========================================================================*/
40 
 
41 
integer    i;
42 
reg [15:0] temp_val;
43 
 
44 
initial
45 
   begin
46 
      $display(" ===============================================");
47 
      $display("|                 START SIMULATION              |");
48 
      $display(" ===============================================");
49 
`ifdef IRQ_NR_GE_32
50 
 
51 
      repeat(5) @(posedge mclk);
52 
      stimulus_done = 0;
53 
 
54 
      // RETI Instruction test
55 
      //--------------------------
56 
      @(r15==16'h1000);
57 
      if (r3    !==16'h0000) tb_error("====== RESET Vector: R3  value  =====");
58 
      if (r4    !==16'h0000) tb_error("====== RESET Vector: R4  value  =====");
59 
      if (r5    !==16'h0000) tb_error("====== RESET Vector: R5  value  =====");
60 
      if (r6    !==16'h0000) tb_error("====== RESET Vector: R6  value  =====");
61 
      if (r7    !==16'h0000) tb_error("====== RESET Vector: R7  value  =====");
62 
      if (r8    !==16'h0000) tb_error("====== RESET Vector: R8  value  =====");
63 
      if (r9    !==16'h0000) tb_error("====== RESET Vector: R9  value  =====");
64 
      if (r10   !==16'h0000) tb_error("====== RESET Vector: R10 value  =====");
65 
      if (r11   !==16'h0000) tb_error("====== RESET Vector: R11 value  =====");
66 
      if (r12   !==16'h0000) tb_error("====== RESET Vector: R12 value  =====");
67 
      if (r13   !==16'h0000) tb_error("====== RESET Vector: R13 value  =====");
68 
      if (r14   !==16'h0000) tb_error("====== RESET Vector: R14 value  =====");
69 
 
70 
 
71 
      // RETI Instruction test
72 
      //--------------------------
73 
      @(r15==16'h2000);
74 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== RETI: SP value      =====");
75 
      if (r2    !==16'h010f)             tb_error("====== RETI: SR value      =====");
76 
      if (r5    !==16'h1234)             tb_error("====== RETI: R5 value      =====");
77 
 
78 
 
79 
      // Test interruption 0
80 
      //--------------------------
81 
      @(r15==16'h3000);
82 
      repeat(2) @(posedge mclk);
83 
      irq[`IRQ_NR-32:0] = {`IRQ_NR-32+1{1'b1}};
84 
      repeat(15) @(posedge mclk);
85 
      irq[`IRQ_NR-32:0] = {`IRQ_NR-32+1{1'b0}};
86 
 
87 
      @(r15==16'h3001);
88 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ  0: SP value      =====");
89 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ  0: GIE value     =====");
90 
      if (r6    !==16'h5678)             tb_error("====== IRQ  0: R6 value      =====");
91 
      if (r7    !==16'h0000)             tb_error("====== IRQ  0: R7 value      =====");
92 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ  0: R8 value      =====");
93 
 
94 
 
95 
      // Test interruption 1
96 
      //--------------------------
97 
      @(r15==16'h4000);
98 
      repeat(2) @(posedge mclk);
99 
      irq[`IRQ_NR-31:0] = {`IRQ_NR-31+1{1'b1}};
100 
      repeat(15) @(posedge mclk);
101 
      irq[`IRQ_NR-31:0] = {`IRQ_NR-31+1{1'b0}};
102 
 
103 
      @(r15==16'h4001);
104 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ  1: SP value      =====");
105 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ  1: GIE value     =====");
106 
      if (r6    !==16'h9abc)             tb_error("====== IRQ  1: R6 value      =====");
107 
      if (r7    !==16'h0000)             tb_error("====== IRQ  1: R7 value      =====");
108 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ  1: R8 value      =====");
109 
 
110 
 
111 
      // Test interruption 2
112 
      //--------------------------
113 
      @(r15==16'h5000);
114 
      repeat(2) @(posedge mclk);
115 
      irq[`IRQ_NR-30:0] = {`IRQ_NR-30+1{1'b1}};
116 
      repeat(15) @(posedge mclk);
117 
      irq[`IRQ_NR-30:0] = {`IRQ_NR-30+1{1'b0}};
118 
 
119 
      @(r15==16'h5001);
120 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ  2: SP value      =====");
121 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ  2: GIE value     =====");
122 
      if (r6    !==16'hdef1)             tb_error("====== IRQ  2: R6 value      =====");
123 
      if (r7    !==16'h0000)             tb_error("====== IRQ  2: R7 value      =====");
124 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ  2: R8 value      =====");
125 
 
126 
 
127 
      // Test interruption 3
128 
      //--------------------------
129 
      @(r15==16'h6000);
130 
      repeat(2) @(posedge mclk);
131 
      irq[`IRQ_NR-29:0] = {`IRQ_NR-29+1{1'b1}};
132 
      repeat(15) @(posedge mclk);
133 
      irq[`IRQ_NR-29:0] = {`IRQ_NR-29+1{1'b0}};
134 
 
135 
      @(r15==16'h6001);
136 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ  3: SP value      =====");
137 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ  3: GIE value     =====");
138 
      if (r6    !==16'h2345)             tb_error("====== IRQ  3: R6 value      =====");
139 
      if (r7    !==16'h0000)             tb_error("====== IRQ  3: R7 value      =====");
140 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ  3: R8 value      =====");
141 
 
142 
 
143 
      // Test interruption 4
144 
      //--------------------------
145 
      @(r15==16'h7000);
146 
      repeat(2) @(posedge mclk);
147 
      irq[`IRQ_NR-28:0] = {`IRQ_NR-28+1{1'b1}};
148 
      repeat(15) @(posedge mclk);
149 
      irq[`IRQ_NR-28:0] = {`IRQ_NR-28+1{1'b0}};
150 
 
151 
      @(r15==16'h7001);
152 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ  4: SP value      =====");
153 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ  4: GIE value     =====");
154 
      if (r6    !==16'h6789)             tb_error("====== IRQ  4: R6 value      =====");
155 
      if (r7    !==16'h0000)             tb_error("====== IRQ  4: R7 value      =====");
156 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ  4: R8 value      =====");
157 
 
158 
 
159 
      // Test interruption 5
160 
      //--------------------------
161 
      @(r15==16'h8000);
162 
      repeat(2) @(posedge mclk);
163 
      irq[`IRQ_NR-27:0] = {`IRQ_NR-27+1{1'b1}};
164 
      repeat(15) @(posedge mclk);
165 
      irq[`IRQ_NR-27:0] = {`IRQ_NR-27+1{1'b0}};
166 
 
167 
      @(r15==16'h8001);
168 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ  5: SP value      =====");
169 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ  5: GIE value     =====");
170 
      if (r6    !==16'habcd)             tb_error("====== IRQ  5: R6 value      =====");
171 
      if (r7    !==16'h0000)             tb_error("====== IRQ  5: R7 value      =====");
172 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ  5: R8 value      =====");
173 
 
174 
 
175 
      // Test interruption 6
176 
      //--------------------------
177 
      @(r15==16'h9000);
178 
      repeat(2) @(posedge mclk);
179 
      irq[`IRQ_NR-26:0] = {`IRQ_NR-26+1{1'b1}};
180 
      repeat(15) @(posedge mclk);
181 
      irq[`IRQ_NR-26:0] = {`IRQ_NR-26+1{1'b0}};
182 
 
183 
      @(r15==16'h9001);
184 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ  6: SP value      =====");
185 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ  6: GIE value     =====");
186 
      if (r6    !==16'hef12)             tb_error("====== IRQ  6: R6 value      =====");
187 
      if (r7    !==16'h0000)             tb_error("====== IRQ  6: R7 value      =====");
188 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ  6: R8 value      =====");
189 
 
190 
 
191 
      // Test interruption 7
192 
      //--------------------------
193 
      @(r15==16'ha000);
194 
      repeat(2) @(posedge mclk);
195 
      irq[`IRQ_NR-25:0] = {`IRQ_NR-25+1{1'b1}};
196 
      repeat(15) @(posedge mclk);
197 
      irq[`IRQ_NR-25:0] = {`IRQ_NR-25+1{1'b0}};
198 
 
199 
      @(r15==16'ha001);
200 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ  7: SP value      =====");
201 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ  7: GIE value     =====");
202 
      if (r6    !==16'h3456)             tb_error("====== IRQ  7: R6 value      =====");
203 
      if (r7    !==16'h0000)             tb_error("====== IRQ  7: R7 value      =====");
204 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ  7: R8 value      =====");
205 
 
206 
 
207 
      // Test interruption 8
208 
      //--------------------------
209 
      @(r15==16'hb000);
210 
      repeat(2) @(posedge mclk);
211 
      irq[`IRQ_NR-24:0] = {`IRQ_NR-24+1{1'b1}};
212 
      repeat(15) @(posedge mclk);
213 
      irq[`IRQ_NR-24:0] = {`IRQ_NR-24+1{1'b0}};
214 
 
215 
      @(r15==16'hb001);
216 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ  8: SP value      =====");
217 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ  8: GIE value     =====");
218 
      if (r6    !==16'h789a)             tb_error("====== IRQ  8: R6 value      =====");
219 
      if (r7    !==16'h0000)             tb_error("====== IRQ  8: R7 value      =====");
220 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ  8: R8 value      =====");
221 
 
222 
 
223 
      // Test interruption 9
224 
      //--------------------------
225 
      @(r15==16'hc000);
226 
      repeat(2) @(posedge mclk);
227 
      irq[`IRQ_NR-23:0] = {`IRQ_NR-23+1{1'b1}};
228 
      repeat(15) @(posedge mclk);
229 
      irq[`IRQ_NR-23:0] = {`IRQ_NR-23+1{1'b0}};
230 
 
231 
      @(r15==16'hc001);
232 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ  9: SP value      =====");
233 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ  9: GIE value     =====");
234 
      if (r6    !==16'hbcde)             tb_error("====== IRQ  9: R6 value      =====");
235 
      if (r7    !==16'h0000)             tb_error("====== IRQ  9: R7 value      =====");
236 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ  9: R8 value      =====");
237 
 
238 
 
239 
      // Test interruption 10
240 
      //--------------------------
241 
      @(r15==16'hd000);
242 
      repeat(2) @(posedge mclk);
243 
      irq[`IRQ_NR-22:0] = {`IRQ_NR-22+1{1'b1}};
244 
      repeat(15) @(posedge mclk);
245 
      irq[`IRQ_NR-22:0] = {`IRQ_NR-22+1{1'b0}};
246 
 
247 
      @(r15==16'hd001);
248 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ 10: SP value      =====");
249 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ 10: GIE value     =====");
250 
      if (r6    !==16'hf123)             tb_error("====== IRQ 10: R6 value      =====");
251 
      if (r7    !==16'h0000)             tb_error("====== IRQ 10: R7 value      =====");
252 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ 10: R8 value      =====");
253 
 
254 
 
255 
      // Test interruption 11
256 
      //--------------------------
257 
      @(r15==16'he000);
258 
      repeat(2) @(posedge mclk);
259 
      irq[`IRQ_NR-21:0] = {`IRQ_NR-21+1{1'b1}};
260 
      repeat(15) @(posedge mclk);
261 
      irq[`IRQ_NR-21:0] = {`IRQ_NR-21+1{1'b0}};
262 
 
263 
      @(r15==16'he001);
264 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ 11: SP value      =====");
265 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ 11: GIE value     =====");
266 
      if (r6    !==16'h4567)             tb_error("====== IRQ 11: R6 value      =====");
267 
      if (r7    !==16'h0000)             tb_error("====== IRQ 11: R7 value      =====");
268 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ 11: R8 value      =====");
269 
 
270 
 
271 
      // Test interruption 12
272 
      //--------------------------
273 
      @(r15==16'hf000);
274 
      repeat(2) @(posedge mclk);
275 
      irq[`IRQ_NR-20:0] = {`IRQ_NR-20+1{1'b1}};
276 
      repeat(15) @(posedge mclk);
277 
      irq[`IRQ_NR-20:0] = {`IRQ_NR-20+1{1'b0}};
278 
 
279 
      @(r15==16'hf001);
280 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ 12: SP value      =====");
281 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ 12: GIE value     =====");
282 
      if (r6    !==16'h89ab)             tb_error("====== IRQ 12: R6 value      =====");
283 
      if (r7    !==16'h0000)             tb_error("====== IRQ 12: R7 value      =====");
284 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ 12: R8 value      =====");
285 
 
286 
 
287 
      // Test interruption 13
288 
      //--------------------------
289 
      @(r15==16'hf100);
290 
      repeat(2) @(posedge mclk);
291 
      irq[`IRQ_NR-19:0] = {`IRQ_NR-19+1{1'b1}};
292 
      repeat(15) @(posedge mclk);
293 
      irq[`IRQ_NR-19:0] = {`IRQ_NR-19+1{1'b0}};
294 
 
295 
      @(r15==16'hf101);
296 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ 13: SP value      =====");
297 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ 13: GIE value     =====");
298 
      if (r6    !==16'hcdef)             tb_error("====== IRQ 13: R6 value      =====");
299 
      if (r7    !==16'h0000)             tb_error("====== IRQ 13: R7 value      =====");
300 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ 13: R8 value      =====");
301 
 
302 
 
303 
      // Test interruption 14
304 
      //--------------------------
305 
      @(r15==16'hf200);
306 
      repeat(2) @(posedge mclk);
307 
      irq[`IRQ_NR-18:0] = {`IRQ_NR-18+1{1'b1}};
308 
      repeat(15) @(posedge mclk);
309 
      irq[`IRQ_NR-18:0] = {`IRQ_NR-18+1{1'b0}};
310 
 
311 
      @(r15==16'hf201);
312 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ 14: SP value      =====");
313 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ 14: GIE value     =====");
314 
      if (r6    !==16'hfedc)             tb_error("====== IRQ 14: R6 value      =====");
315 
      if (r7    !==16'h0000)             tb_error("====== IRQ 14: R7 value      =====");
316 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ 14: R8 value      =====");
317 
 
318 
 
319 
      // Test interruption 15
320 
      //--------------------------
321 
      @(r15==16'hf300);
322 
      repeat(2) @(posedge mclk);
323 
      irq[`IRQ_NR-17:0] = {`IRQ_NR-17+1{1'b1}};
324 
      repeat(15) @(posedge mclk);
325 
      irq[`IRQ_NR-17:0] = {`IRQ_NR-17+1{1'b0}};
326 
 
327 
      @(r15==16'hf301);
328 
      if (r1    !==(`PER_SIZE+16'h0052)) tb_error("====== IRQ 15: SP value      =====");
329 
      if (r2[3] !==1'b1)                 tb_error("====== IRQ 15: GIE value     =====");
330 
      if (r6    !==16'hba98)             tb_error("====== IRQ 15: R6 value      =====");
331 
      if (r7    !==16'h0000)             tb_error("====== IRQ 15: R7 value      =====");
332 
      if (r8    !==(`PER_SIZE+16'h004e)) tb_error("====== IRQ 15: R8 value      =====");
333 
 
334 
 
335 
      stimulus_done = 1;
336 
`else
337 
 
338 
       $display(" ===============================================");
339 
       $display("|               SIMULATION SKIPPED              |");
340 
       $display("|    (RTL configured to support 16 IRQs only)   |");
341 
       $display(" ===============================================");
342 
       $finish;
343 
`endif
344 
   end
345 
 

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