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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [lp_modes_asic.v] - Blame information for rev 172

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1 134 olivier.gi 
/*===========================================================================*/
2 
/* Copyright (C) 2001 Authors                                                */
3 
/*                                                                           */
4 
/* This source file may be used and distributed without restriction provided */
5 
/* that this copyright statement is not removed from the file and that any   */
6 
/* derivative work contains the original copyright notice and the associated */
7 
/* disclaimer.                                                               */
8 
/*                                                                           */
9 
/* This source file is free software; you can redistribute it and/or modify  */
10 
/* it under the terms of the GNU Lesser General Public License as published  */
11 
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12 
/* (at your option) any later version.                                       */
13 
/*                                                                           */
14 
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15 
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16 
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17 
/* License for more details.                                                 */
18 
/*                                                                           */
19 
/* You should have received a copy of the GNU Lesser General Public License  */
20 
/* along with this source; if not, write to the Free Software Foundation,    */
21 
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22 
/*                                                                           */
23 
/*===========================================================================*/
24 
/*                            CPU LOW POWER MODES                            */
25 
/*---------------------------------------------------------------------------*/
26 
/* Test the CPU Low Power modes:                                             */
27 
/*                              - LPM0    <=>  CPUOFF                        */
28 
/*                              - LPM1    <=>  CPUOFF + SCG0                 */
29 
/*                              - LPM2    <=>  CPUOFF +        SCG1          */
30 
/*                              - LPM3    <=>  CPUOFF + SCG0 + SCG1          */
31 
/*                              - LPM4    <=>  CPUOFF + SCG0 + SCG1 + OSCOFF */
32 
/*                                                                           */
33 
/* Reminder:                                                                 */
34 
/*                              - CPUOFF  <=>  turns off CPU.                */
35 
/*                              - SCG0    <=>  turns off DCO.                */
36 
/*                              - SCG1    <=>  turns off SMCLK.              */
37 
/*                              - OSCOFF  <=>  turns off LFXT_CLK.           */
38 
/*                                                                           */
39 
/* Author(s):                                                                */
40 
/*             - Olivier Girard,    olgirard@gmail.com                       */
41 
/*                                                                           */
42 
/*---------------------------------------------------------------------------*/
43 
/* $Rev: 95 $                                                                */
44 
/* $LastChangedBy: olivier.girard $                                          */
45 
/* $LastChangedDate: 2011-02-24 21:37:57 +0100 (Thu, 24 Feb 2011) $          */
46 
/*===========================================================================*/
47 
 
48 
integer dco_clk_cnt;
49 
always @(negedge dco_clk)
50 
  dco_clk_cnt <= dco_clk_cnt+1;
51 
 
52 
integer mclk_cnt;
53 
always @(negedge mclk)
54 
  mclk_cnt <= mclk_cnt+1;
55 
 
56 
integer smclk_cnt;
57 
always @(negedge smclk)
58 
  smclk_cnt <= smclk_cnt+1;
59 
 
60 
integer aclk_cnt;
61 
always @(negedge aclk)
62 
  aclk_cnt <= aclk_cnt+1;
63 
 
64 
integer inst_cnt;
65 
always @(inst_number)
66 
  inst_cnt <= inst_cnt+1;
67 
 
68 
// Wakeup synchronizer to generate IRQ
69 
reg [1:0] wkup2_sync;
70 
always @(posedge mclk or posedge puc_rst)
71 
  if (puc_rst) wkup2_sync <= 2'b00;
72 
  else         wkup2_sync <= {wkup2_sync[0], wkup[2]};
73 
 
74 
always @(wkup2_sync)
75 
  irq[2] = wkup2_sync[1];
76 
 
77 
// Wakeup synchronizer to generate IRQ
78 
reg [1:0] wkup3_sync;
79 
always @(posedge mclk or posedge puc_rst)
80 
  if (puc_rst) wkup3_sync <= 2'b00;
81 
  else         wkup3_sync <= {wkup3_sync[0], wkup[3]};
82 
 
83 
always @(wkup3_sync)
84 
  irq[3] = wkup3_sync[1];
85 
 
86 
 
87 
initial
88 
   begin
89 
      $display(" ===============================================");
90 
      $display("|                 START SIMULATION              |");
91 
      $display(" ===============================================");
92 
      repeat(5) @(posedge mclk);
93 
      stimulus_done = 0;
94 
 
95 
      irq[2]  = 0;
96 
      wkup[2] = 0;
97 
 
98 
      irq[3]  = 0;
99 
      wkup[3] = 0;
100 
 
101 
 
102 
`ifdef ASIC
103 
 
104 
      // ACTIVE
105 
      //--------------------------------------------------------
106 
 
107 
      @(r15==16'h1001);
108 
      #(10*50);
109 
      dco_clk_cnt  = 0;
110 
      mclk_cnt     = 0;
111 
      smclk_cnt    = 0;
112 
      aclk_cnt     = 0;
113 
      inst_cnt     = 0;
114 
      #(100*50);
115 
      if (dco_clk_cnt !== 100) tb_error("====== ACTIVE TEST 1: DCO_CLK IS NOT RUNNING =====");
116 
      if (mclk_cnt    !== 100) tb_error("====== ACTIVE TEST 2: MCLK    IS NOT RUNNING =====");
117 
      if (smclk_cnt   !== 100) tb_error("====== ACTIVE TEST 3: SMCLK   IS NOT RUNNING =====");
118 
  `ifdef LFXT_DOMAIN
119 
      if (aclk_cnt    !== 3)   tb_error("====== ACTIVE TEST 4: ACLK    IS NOT RUNNING =====");
120 
  `else
121 
      if (aclk_cnt    !== 100) tb_error("====== ACTIVE TEST 4: ACLK    IS NOT RUNNING =====");
122 
  `endif
123 
      if (inst_cnt    <  60)   tb_error("====== ACTIVE TEST 5: CPU IS NOT EXECUTING   =====");
124 
      dco_clk_cnt  = 0;
125 
      mclk_cnt     = 0;
126 
      smclk_cnt    = 0;
127 
      aclk_cnt     = 0;
128 
      inst_cnt     = 0;
129 
 
130 
 
131 
 
132 
      // LPM0 ( CPUOFF )
133 
      //--------------------------------------------------------
134 
 
135 
      @(r15==16'h2001);
136 
      #(10*50);
137 
      dco_clk_cnt  = 0;
138 
      mclk_cnt     = 0;
139 
      smclk_cnt    = 0;
140 
      aclk_cnt     = 0;
141 
      inst_cnt     = 0;
142 
      #(100*50);
143 
      if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 1: DCO_CLK IS NOT RUNNING =====");
144 
      if (mclk_cnt    !== 0)   tb_error("====== LPM0 TEST 2: MCLK    IS RUNNING     =====");
145 
      if (smclk_cnt   !== 100) tb_error("====== LPM0 TEST 3: SMCLK   IS NOT RUNNING =====");
146 
  `ifdef LFXT_DOMAIN
147 
      if (aclk_cnt    !== 3)   tb_error("====== LPM0 TEST 4: ACLK    IS NOT RUNNING =====");
148 
  `else
149 
      if (aclk_cnt    !== 100) tb_error("====== LPM0 TEST 4: ACLK    IS NOT RUNNING =====");
150 
  `endif
151 
      if (inst_cnt    !== 0)   tb_error("====== LPM0 TEST 5: CPU IS EXECUTING       =====");
152 
      dco_clk_cnt  = 0;
153 
      mclk_cnt     = 0;
154 
      smclk_cnt    = 0;
155 
      aclk_cnt     = 0;
156 
      inst_cnt     = 0;
157 
 
158 
      @(posedge dco_clk);                //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
159 
      wkup[2] = 1'b1;
160 
      @(posedge irq_acc[2]);
161 
      #(10*50);
162 
      dco_clk_cnt  = 0;
163 
      mclk_cnt     = 0;
164 
      smclk_cnt    = 0;
165 
      aclk_cnt     = 0;
166 
      inst_cnt     = 0;
167 
      #(100*50);
168 
      if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST  6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
169 
      if (mclk_cnt    !== 100) tb_error("====== LPM0 TEST  7: MCLK    IS NOT RUNNING DURING IRQ =====");
170 
      if (smclk_cnt   !== 100) tb_error("====== LPM0 TEST  8: SMCLK   IS NOT RUNNING DURING IRQ =====");
171 
  `ifdef LFXT_DOMAIN
172 
      if (aclk_cnt    !== 3)   tb_error("====== LPM0 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
173 
  `else
174 
      if (aclk_cnt    !== 100) tb_error("====== LPM0 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
175 
  `endif
176 
      if (inst_cnt    <  60)   tb_error("====== LPM0 TEST 10: CPU IS NOT EXECUTING DURING IRQ   =====");
177 
      @(r13==16'haaaa);
178 
      wkup[2] = 1'b0;
179 
 
180 
       #(10*50);
181 
      dco_clk_cnt  = 0;
182 
      mclk_cnt     = 0;
183 
      smclk_cnt    = 0;
184 
      aclk_cnt     = 0;
185 
      inst_cnt     = 0;
186 
      #(100*50);
187 
      if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
188 
      if (mclk_cnt    !== 0)   tb_error("====== LPM0 TEST 12: MCLK    IS RUNNING     AFTER IRQ =====");
189 
      if (smclk_cnt   !== 100) tb_error("====== LPM0 TEST 13: SMCLK   IS NOT RUNNING AFTER IRQ =====");
190 
  `ifdef LFXT_DOMAIN
191 
      if (aclk_cnt    !== 3)   tb_error("====== LPM0 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
192 
  `else
193 
      if (aclk_cnt    !== 100) tb_error("====== LPM0 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
194 
  `endif
195 
      if (inst_cnt    !== 0)   tb_error("====== LPM0 TEST 15: CPU IS EXECUTING AFTER IRQ       =====");
196 
      dco_clk_cnt  = 0;
197 
      mclk_cnt     = 0;
198 
      smclk_cnt    = 0;
199 
      aclk_cnt     = 0;
200 
      inst_cnt     = 0;
201 
 
202 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
203 
      wkup[3] = 1'b1;
204 
      @(posedge irq_acc[3]);
205 
      #(10*50);
206 
      dco_clk_cnt  = 0;
207 
      mclk_cnt     = 0;
208 
      smclk_cnt    = 0;
209 
      aclk_cnt     = 0;
210 
      inst_cnt     = 0;
211 
      #(100*50);
212 
      if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
213 
      if (mclk_cnt    !== 100) tb_error("====== LPM0 TEST 17: MCLK    IS NOT RUNNING DURING IRQ =====");
214 
      if (smclk_cnt   !== 100) tb_error("====== LPM0 TEST 18: SMCLK   IS NOT RUNNING DURING IRQ =====");
215 
  `ifdef LFXT_DOMAIN
216 
      if (aclk_cnt    !== 3)   tb_error("====== LPM0 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
217 
  `else
218 
      if (aclk_cnt    !== 100) tb_error("====== LPM0 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
219 
  `endif
220 
      if (inst_cnt    <  60)   tb_error("====== LPM0 TEST 20: CPU IS NOT EXECUTING DURING IRQ   =====");
221 
      @(r13==16'hbbbb);
222 
      wkup[3] = 1'b0;
223 
 
224 
       #(10*50);
225 
      dco_clk_cnt  = 0;
226 
      mclk_cnt     = 0;
227 
      smclk_cnt    = 0;
228 
      aclk_cnt     = 0;
229 
      inst_cnt     = 0;
230 
      #(100*50);
231 
      if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
232 
      if (mclk_cnt    !== 100) tb_error("====== LPM0 TEST 22: MCLK    IS NOT RUNNING AFTER IRQ =====");
233 
      if (smclk_cnt   !== 100) tb_error("====== LPM0 TEST 23: SMCLK   IS NOT RUNNING AFTER IRQ =====");
234 
  `ifdef LFXT_DOMAIN
235 
      if (aclk_cnt    !== 3)   tb_error("====== LPM0 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
236 
  `else
237 
      if (aclk_cnt    !== 100) tb_error("====== LPM0 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
238 
  `endif
239 
      if (inst_cnt    <  60)   tb_error("====== LPM0 TEST 25: CPU IS NOT EXECUTING AFTER IRQ   =====");
240 
      dco_clk_cnt  = 0;
241 
      mclk_cnt     = 0;
242 
      smclk_cnt    = 0;
243 
      aclk_cnt     = 0;
244 
      inst_cnt     = 0;
245 
 
246 
 
247 
      // LPM1 ( CPUOFF + SCG0 )
248 
      //--------------------------------------------------------
249 
 
250 
      @(r15==16'h3001);
251 
      // Until the SMCLK clock mux is implemented, force SMCLK to LFXT_CLK;
252 
      force dut.clock_module_0.nodiv_smclk = lfxt_clk;
253 
      //force dut.clock_module_0.smclk       = lfxt_clk;
254 
 
255 
      #(100*50);
256 
      dco_clk_cnt  = 0;
257 
      mclk_cnt     = 0;
258 
      smclk_cnt    = 0;
259 
      aclk_cnt     = 0;
260 
      inst_cnt     = 0;
261 
      #(100*50);
262 
      if (dco_clk_cnt !== 0)   tb_error("====== LPM1 TEST 1: DCO_CLK IS RUNNING     =====");
263 
      if (mclk_cnt    !== 0)   tb_error("====== LPM1 TEST 2: MCLK    IS RUNNING     =====");
264 
      if (smclk_cnt   !== 3)   tb_error("====== LPM1 TEST 3: SMCLK   IS NOT RUNNING =====");
265 
  `ifdef LFXT_DOMAIN
266 
      if (aclk_cnt    !== 3)   tb_error("====== LPM1 TEST 4: ACLK    IS NOT RUNNING =====");
267 
  `else
268 
      if (aclk_cnt    !== 0)   tb_error("====== LPM1 TEST 4: ACLK    IS RUNNING     =====");
269 
  `endif
270 
      if (inst_cnt    !== 0)   tb_error("====== LPM1 TEST 5: CPU IS EXECUTING       =====");
271 
      dco_clk_cnt  = 0;
272 
      mclk_cnt     = 0;
273 
      smclk_cnt    = 0;
274 
      aclk_cnt     = 0;
275 
      inst_cnt     = 0;
276 
 
277 
      #(1*50);                           //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
278 
      wkup[2] = 1'b1;
279 
      @(posedge irq_acc[2]);
280 
      #(10*50);
281 
      dco_clk_cnt  = 0;
282 
      mclk_cnt     = 0;
283 
      smclk_cnt    = 0;
284 
      aclk_cnt     = 0;
285 
      inst_cnt     = 0;
286 
      #(100*50);
287 
      if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST  6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
288 
      if (mclk_cnt    !== 100) tb_error("====== LPM1 TEST  7: MCLK    IS NOT RUNNING DURING IRQ =====");
289 
      if (smclk_cnt   !== 3)   tb_error("====== LPM1 TEST  8: SMCLK   IS NOT RUNNING DURING IRQ =====");
290 
  `ifdef LFXT_DOMAIN
291 
      if (aclk_cnt    !== 3)   tb_error("====== LPM1 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
292 
  `else
293 
      if (aclk_cnt    !== 100) tb_error("====== LPM1 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
294 
  `endif
295 
      if (inst_cnt    <  60)   tb_error("====== LPM1 TEST 10: CPU IS NOT EXECUTING DURING IRQ   =====");
296 
      @(r13==16'haaaa);
297 
      wkup[2] = 1'b0;
298 
 
299 
       #(15*50);
300 
      dco_clk_cnt  = 0;
301 
      mclk_cnt     = 0;
302 
      smclk_cnt    = 0;
303 
      aclk_cnt     = 0;
304 
      inst_cnt     = 0;
305 
      #(100*50);
306 
      if (dco_clk_cnt !== 0)   tb_error("====== LPM1 TEST 11: DCO_CLK IS RUNNING     AFTER IRQ =====");
307 
      if (mclk_cnt    !== 0)   tb_error("====== LPM1 TEST 12: MCLK    IS RUNNING     AFTER IRQ =====");
308 
      if (smclk_cnt   !== 3)   tb_error("====== LPM1 TEST 13: SMCLK   IS NOT RUNNING AFTER IRQ =====");
309 
  `ifdef LFXT_DOMAIN
310 
      if (aclk_cnt    !== 3)   tb_error("====== LPM1 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
311 
  `else
312 
      if (aclk_cnt    !== 0)   tb_error("====== LPM1 TEST 14: ACLK    IS RUNNING AFTER IRQ     =====");
313 
  `endif
314 
      if (inst_cnt    !== 0)   tb_error("====== LPM1 TEST 15: CPU IS EXECUTING AFTER IRQ       =====");
315 
      dco_clk_cnt  = 0;
316 
      mclk_cnt     = 0;
317 
      smclk_cnt    = 0;
318 
      aclk_cnt     = 0;
319 
      inst_cnt     = 0;
320 
 
321 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
322 
      wkup[3] = 1'b1;
323 
      @(posedge irq_acc[3]);
324 
      #(10*50);
325 
      dco_clk_cnt  = 0;
326 
      mclk_cnt     = 0;
327 
      smclk_cnt    = 0;
328 
      aclk_cnt     = 0;
329 
      inst_cnt     = 0;
330 
      #(100*50);
331 
      if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
332 
      if (mclk_cnt    !== 100) tb_error("====== LPM1 TEST 17: MCLK    IS NOT RUNNING DURING IRQ =====");
333 
      if (smclk_cnt   !== 3)   tb_error("====== LPM1 TEST 18: SMCLK   IS NOT RUNNING DURING IRQ =====");
334 
  `ifdef LFXT_DOMAIN
335 
      if (aclk_cnt    !== 3)   tb_error("====== LPM1 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
336 
  `else
337 
      if (aclk_cnt    !== 100) tb_error("====== LPM1 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
338 
  `endif
339 
      if (inst_cnt    <  60)   tb_error("====== LPM1 TEST 20: CPU IS NOT EXECUTING DURING IRQ   =====");
340 
      @(r13==16'hbbbb);
341 
      wkup[3] = 1'b0;
342 
 
343 
       #(10*50);
344 
      dco_clk_cnt  = 0;
345 
      mclk_cnt     = 0;
346 
      smclk_cnt    = 0;
347 
      aclk_cnt     = 0;
348 
      inst_cnt     = 0;
349 
      #(100*50);
350 
      if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
351 
      if (mclk_cnt    !== 100) tb_error("====== LPM1 TEST 22: MCLK    IS NOT RUNNING AFTER IRQ =====");
352 
      if (smclk_cnt   !== 3)   tb_error("====== LPM1 TEST 23: SMCLK   IS NOT RUNNING AFTER IRQ =====");
353 
  `ifdef LFXT_DOMAIN
354 
      if (aclk_cnt    !== 3)   tb_error("====== LPM1 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
355 
  `else
356 
      if (aclk_cnt    !== 100) tb_error("====== LPM1 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
357 
  `endif
358 
      if (inst_cnt    <  60)   tb_error("====== LPM1 TEST 25: CPU IS NOT EXECUTING AFTER IRQ   =====");
359 
      dco_clk_cnt  = 0;
360 
      mclk_cnt     = 0;
361 
      smclk_cnt    = 0;
362 
      aclk_cnt     = 0;
363 
      inst_cnt     = 0;
364 
 
365 
 
366 
      // LPM2 ( CPUOFF + SCG1 )
367 
      //--------------------------------------------------------
368 
 
369 
      @(r15==16'h4001);
370 
 
371 
      #(100*50);
372 
      dco_clk_cnt  = 0;
373 
      mclk_cnt     = 0;
374 
      smclk_cnt    = 0;
375 
      aclk_cnt     = 0;
376 
      inst_cnt     = 0;
377 
      #(100*50);
378 
      if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 1: DCO_CLK IS NOT RUNNING =====");
379 
      if (mclk_cnt    !== 0)   tb_error("====== LPM2 TEST 2: MCLK    IS RUNNING     =====");
380 
`ifdef SCG1_EN
381 
      if (smclk_cnt   !== 0)   tb_error("====== LPM2 TEST 3: SMCLK   IS RUNNING     =====");
382 
`else
383 
      if (smclk_cnt   !== 3)   tb_error("====== LPM2 TEST 3: SMCLK   IS NOT RUNNING =====");
384 
`endif
385 
  `ifdef LFXT_DOMAIN
386 
      if (aclk_cnt    !== 3)   tb_error("====== LPM2 TEST 4: ACLK    IS NOT RUNNING =====");
387 
  `else
388 
      if (aclk_cnt    !== 100) tb_error("====== LPM2 TEST 4: ACLK    IS NOT RUNNING =====");
389 
  `endif
390 
      if (inst_cnt    !== 0)   tb_error("====== LPM2 TEST 5: CPU IS EXECUTING       =====");
391 
      dco_clk_cnt  = 0;
392 
      mclk_cnt     = 0;
393 
      smclk_cnt    = 0;
394 
      aclk_cnt     = 0;
395 
      inst_cnt     = 0;
396 
 
397 
      #(1*50);                           //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
398 
      wkup[2] = 1'b1;
399 
      @(posedge irq_acc[2]);
400 
      #(100*50);
401 
      dco_clk_cnt  = 0;
402 
      mclk_cnt     = 0;
403 
      smclk_cnt    = 0;
404 
      aclk_cnt     = 0;
405 
      inst_cnt     = 0;
406 
      #(100*50);
407 
      if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST  6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
408 
      if (mclk_cnt    !== 100) tb_error("====== LPM2 TEST  7: MCLK    IS NOT RUNNING DURING IRQ =====");
409 
      if (smclk_cnt   !== 3)   tb_error("====== LPM2 TEST  8: SMCLK   IS NOT RUNNING DURING IRQ =====");
410 
  `ifdef LFXT_DOMAIN
411 
      if (aclk_cnt    !== 3)   tb_error("====== LPM2 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
412 
  `else
413 
      if (aclk_cnt    !== 100) tb_error("====== LPM2 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
414 
  `endif
415 
      if (inst_cnt    <  60)   tb_error("====== LPM2 TEST 10: CPU IS NOT EXECUTING DURING IRQ   =====");
416 
      @(r13==16'haaaa);
417 
      wkup[2] = 1'b0;
418 
 
419 
       #(100*50);
420 
      dco_clk_cnt  = 0;
421 
      mclk_cnt     = 0;
422 
      smclk_cnt    = 0;
423 
      aclk_cnt     = 0;
424 
      inst_cnt     = 0;
425 
      #(100*50);
426 
      if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
427 
      if (mclk_cnt    !== 0)   tb_error("====== LPM2 TEST 12: MCLK    IS RUNNING     AFTER IRQ =====");
428 
`ifdef SCG1_EN
429 
      if (smclk_cnt   !== 0)   tb_error("====== LPM2 TEST 13: SMCLK   IS RUNNING     AFTER IRQ =====");
430 
`else
431 
      if (smclk_cnt   !== 3)   tb_error("====== LPM2 TEST 13: SMCLK   IS NOT RUNNING     AFTER IRQ =====");
432 
`endif
433 
  `ifdef LFXT_DOMAIN
434 
      if (aclk_cnt    !== 3)   tb_error("====== LPM2 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
435 
  `else
436 
      if (aclk_cnt    !== 100) tb_error("====== LPM2 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
437 
  `endif
438 
      if (inst_cnt    !== 0)   tb_error("====== LPM2 TEST 15: CPU IS EXECUTING AFTER IRQ       =====");
439 
      dco_clk_cnt  = 0;
440 
      mclk_cnt     = 0;
441 
      smclk_cnt    = 0;
442 
      aclk_cnt     = 0;
443 
      inst_cnt     = 0;
444 
 
445 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
446 
      wkup[3] = 1'b1;
447 
      @(posedge irq_acc[3]);
448 
      #(100*50);
449 
      dco_clk_cnt  = 0;
450 
      mclk_cnt     = 0;
451 
      smclk_cnt    = 0;
452 
      aclk_cnt     = 0;
453 
      inst_cnt     = 0;
454 
      #(100*50);
455 
      if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
456 
      if (mclk_cnt    !== 100) tb_error("====== LPM2 TEST 17: MCLK    IS NOT RUNNING DURING IRQ =====");
457 
      if (smclk_cnt   !== 3)   tb_error("====== LPM2 TEST 18: SMCLK   IS NOT RUNNING DURING IRQ =====");
458 
  `ifdef LFXT_DOMAIN
459 
      if (aclk_cnt    !== 3)   tb_error("====== LPM2 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
460 
  `else
461 
      if (aclk_cnt    !== 100) tb_error("====== LPM2 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
462 
  `endif
463 
      if (inst_cnt    <  60)   tb_error("====== LPM2 TEST 20: CPU IS NOT EXECUTING DURING IRQ   =====");
464 
      @(r13==16'hbbbb);
465 
      wkup[3] = 1'b0;
466 
 
467 
       #(100*50);
468 
      dco_clk_cnt  = 0;
469 
      mclk_cnt     = 0;
470 
      smclk_cnt    = 0;
471 
      aclk_cnt     = 0;
472 
      inst_cnt     = 0;
473 
      #(100*50);
474 
      if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
475 
      if (mclk_cnt    !== 100) tb_error("====== LPM2 TEST 22: MCLK    IS NOT RUNNING AFTER IRQ =====");
476 
      if (smclk_cnt   !== 3)   tb_error("====== LPM2 TEST 23: SMCLK   IS NOT RUNNING AFTER IRQ =====");
477 
  `ifdef LFXT_DOMAIN
478 
      if (aclk_cnt    !== 3)   tb_error("====== LPM2 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
479 
  `else
480 
      if (aclk_cnt    !== 100) tb_error("====== LPM2 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
481 
  `endif
482 
      if (inst_cnt    <  60)   tb_error("====== LPM2 TEST 25: CPU IS NOT EXECUTING AFTER IRQ   =====");
483 
      dco_clk_cnt  = 0;
484 
      mclk_cnt     = 0;
485 
      smclk_cnt    = 0;
486 
      aclk_cnt     = 0;
487 
      inst_cnt     = 0;
488 
 
489 
 
490 
      // LPM3 ( CPUOFF + SCG0 + SCG1 )
491 
      //--------------------------------------------------------
492 
 
493 
      @(r15==16'h5001);
494 
 
495 
      #(100*50);
496 
      dco_clk_cnt  = 0;
497 
      mclk_cnt     = 0;
498 
      smclk_cnt    = 0;
499 
      aclk_cnt     = 0;
500 
      inst_cnt     = 0;
501 
      #(100*50);
502 
      if (dco_clk_cnt !== 0)   tb_error("====== LPM3 TEST 1: DCO_CLK IS RUNNING     =====");
503 
      if (mclk_cnt    !== 0)   tb_error("====== LPM3 TEST 2: MCLK    IS RUNNING     =====");
504 
`ifdef SCG1_EN
505 
      if (smclk_cnt   !== 0)   tb_error("====== LPM3 TEST 3: SMCLK   IS RUNNING     =====");
506 
`else
507 
      if (smclk_cnt   !== 3)   tb_error("====== LPM3 TEST 3: SMCLK   IS NOT RUNNING =====");
508 
`endif
509 
  `ifdef LFXT_DOMAIN
510 
      if (aclk_cnt    !== 3)   tb_error("====== LPM3 TEST 4: ACLK    IS NOT RUNNING =====");
511 
  `else
512 
      if (aclk_cnt    !== 0)   tb_error("====== LPM3 TEST 4: ACLK    IS RUNNING     =====");
513 
  `endif
514 
      if (inst_cnt    !== 0)   tb_error("====== LPM3 TEST 5: CPU IS EXECUTING       =====");
515 
      dco_clk_cnt  = 0;
516 
      mclk_cnt     = 0;
517 
      smclk_cnt    = 0;
518 
      aclk_cnt     = 0;
519 
      inst_cnt     = 0;
520 
 
521 
      #(1*50);                           //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
522 
      wkup[2] = 1'b1;
523 
      @(posedge irq_acc[2]);
524 
      #(100*50);
525 
      dco_clk_cnt  = 0;
526 
      mclk_cnt     = 0;
527 
      smclk_cnt    = 0;
528 
      aclk_cnt     = 0;
529 
      inst_cnt     = 0;
530 
      #(100*50);
531 
      if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST  6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
532 
      if (mclk_cnt    !== 100) tb_error("====== LPM3 TEST  7: MCLK    IS NOT RUNNING DURING IRQ =====");
533 
      if (smclk_cnt   !== 3)   tb_error("====== LPM3 TEST  8: SMCLK   IS NOT RUNNING DURING IRQ =====");
534 
  `ifdef LFXT_DOMAIN
535 
      if (aclk_cnt    !== 3)   tb_error("====== LPM3 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
536 
  `else
537 
      if (aclk_cnt    !== 100) tb_error("====== LPM3 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
538 
  `endif
539 
      if (inst_cnt    <  60)   tb_error("====== LPM3 TEST 10: CPU IS NOT EXECUTING DURING IRQ   =====");
540 
      @(r13==16'haaaa);
541 
      wkup[2] = 1'b0;
542 
 
543 
       #(100*50);
544 
      dco_clk_cnt  = 0;
545 
      mclk_cnt     = 0;
546 
      smclk_cnt    = 0;
547 
      aclk_cnt     = 0;
548 
      inst_cnt     = 0;
549 
      #(100*50);
550 
      if (dco_clk_cnt !== 0)   tb_error("====== LPM3 TEST 11: DCO_CLK IS RUNNING     AFTER IRQ =====");
551 
      if (mclk_cnt    !== 0)   tb_error("====== LPM3 TEST 12: MCLK    IS RUNNING     AFTER IRQ =====");
552 
`ifdef SCG1_EN
553 
      if (smclk_cnt   !== 0)   tb_error("====== LPM3 TEST 13: SMCLK   IS RUNNING     AFTER IRQ =====");
554 
`else
555 
      if (smclk_cnt   !== 3)   tb_error("====== LPM3 TEST 13: SMCLK   IS NOT RUNNING     AFTER IRQ =====");
556 
`endif
557 
  `ifdef LFXT_DOMAIN
558 
      if (aclk_cnt    !== 3)   tb_error("====== LPM3 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
559 
  `else
560 
      if (aclk_cnt    !== 0)   tb_error("====== LPM3 TEST 14: ACLK    IS RUNNING AFTER IRQ =====");
561 
  `endif
562 
      if (inst_cnt    !== 0)   tb_error("====== LPM3 TEST 15: CPU IS EXECUTING AFTER IRQ       =====");
563 
      dco_clk_cnt  = 0;
564 
      mclk_cnt     = 0;
565 
      smclk_cnt    = 0;
566 
      aclk_cnt     = 0;
567 
      inst_cnt     = 0;
568 
 
569 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
570 
      wkup[3] = 1'b1;
571 
      @(posedge irq_acc[3]);
572 
      #(100*50);
573 
      dco_clk_cnt  = 0;
574 
      mclk_cnt     = 0;
575 
      smclk_cnt    = 0;
576 
      aclk_cnt     = 0;
577 
      inst_cnt     = 0;
578 
      #(100*50);
579 
      if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
580 
      if (mclk_cnt    !== 100) tb_error("====== LPM3 TEST 17: MCLK    IS NOT RUNNING DURING IRQ =====");
581 
      if (smclk_cnt   !== 3)   tb_error("====== LPM3 TEST 18: SMCLK   IS NOT RUNNING DURING IRQ =====");
582 
  `ifdef LFXT_DOMAIN
583 
      if (aclk_cnt    !== 3)   tb_error("====== LPM3 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
584 
  `else
585 
      if (aclk_cnt    !== 100) tb_error("====== LPM3 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
586 
  `endif
587 
      if (inst_cnt    <  60)   tb_error("====== LPM3 TEST 20: CPU IS NOT EXECUTING DURING IRQ   =====");
588 
      @(r13==16'hbbbb);
589 
      wkup[3] = 1'b0;
590 
 
591 
      #(100*50);
592 
      dco_clk_cnt  = 0;
593 
      mclk_cnt     = 0;
594 
      smclk_cnt    = 0;
595 
      aclk_cnt     = 0;
596 
      inst_cnt     = 0;
597 
      #(100*50);
598 
      if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
599 
      if (mclk_cnt    !== 100) tb_error("====== LPM3 TEST 22: MCLK    IS NOT RUNNING AFTER IRQ =====");
600 
      if (smclk_cnt   !== 3)   tb_error("====== LPM3 TEST 23: SMCLK   IS NOT RUNNING AFTER IRQ =====");
601 
  `ifdef LFXT_DOMAIN
602 
      if (aclk_cnt    !== 3)   tb_error("====== LPM3 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
603 
  `else
604 
      if (aclk_cnt    !== 100) tb_error("====== LPM3 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
605 
  `endif
606 
      if (inst_cnt    <  60)   tb_error("====== LPM3 TEST 25: CPU IS NOT EXECUTING AFTER IRQ   =====");
607 
      dco_clk_cnt  = 0;
608 
      mclk_cnt     = 0;
609 
      smclk_cnt    = 0;
610 
      aclk_cnt     = 0;
611 
      inst_cnt     = 0;
612 
 
613 
 
614 
      // LPM4 ( CPUOFF + SCG0 + SCG1 + OSCOFF)
615 
      //--------------------------------------------------------
616 
 
617 
      @(r15==16'h6001);
618 
 
619 
      #(100*70);
620 
      dco_clk_cnt  = 0;
621 
      mclk_cnt     = 0;
622 
      smclk_cnt    = 0;
623 
      aclk_cnt     = 0;
624 
      inst_cnt     = 0;
625 
      #(100*50);
626 
      if (dco_clk_cnt !== 0)   tb_error("====== LPM4 TEST 1: DCO_CLK IS RUNNING     =====");
627 
      if (mclk_cnt    !== 0)   tb_error("====== LPM4 TEST 2: MCLK    IS RUNNING     =====");
628 
`ifdef SCG1_EN
629 
      if (smclk_cnt   !== 0)   tb_error("====== LPM4 TEST 3: SMCLK   IS RUNNING     =====");
630 
`else
631 
   `ifdef OSCOFF_EN
632 
      if (smclk_cnt   !== 0)   tb_error("====== LPM4 TEST 3: SMCLK   IS RUNNING     =====");
633 
   `else
634 
      if (smclk_cnt   <   3)   tb_error("====== LPM4 TEST 3: SMCLK   IS NOT RUNNING =====");
635 
   `endif
636 
`endif
637 
`ifdef OSCOFF_EN
638 
      if (aclk_cnt    !== 0)   tb_error("====== LPM4 TEST 4: ACLK    IS RUNNING     =====");
639 
`else
640 
  `ifdef LFXT_DOMAIN
641 
      if (aclk_cnt    <   3)   tb_error("====== LPM4 TEST 4: ACLK    IS NOT RUNNING =====");
642 
  `else
643 
      if (aclk_cnt    !== 0)   tb_error("====== LPM4 TEST 4: ACLK    IS RUNNING     =====");
644 
  `endif
645 
`endif
646 
      if (inst_cnt    !== 0)   tb_error("====== LPM4 TEST 5: CPU IS EXECUTING       =====");
647 
      dco_clk_cnt  = 0;
648 
      mclk_cnt     = 0;
649 
      smclk_cnt    = 0;
650 
      aclk_cnt     = 0;
651 
      inst_cnt     = 0;
652 
 
653 
      #(1*50);                           //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
654 
      wkup[2] = 1'b1;
655 
      @(posedge irq_acc[2]);
656 
      #(100*50);
657 
      dco_clk_cnt  = 0;
658 
      mclk_cnt     = 0;
659 
      smclk_cnt    = 0;
660 
      aclk_cnt     = 0;
661 
      inst_cnt     = 0;
662 
      #(100*50);
663 
      if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST  6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
664 
      if (mclk_cnt    !== 100) tb_error("====== LPM4 TEST  7: MCLK    IS NOT RUNNING DURING IRQ =====");
665 
      if (smclk_cnt   !== 3)   tb_error("====== LPM4 TEST  8: SMCLK   IS NOT RUNNING DURING IRQ =====");
666 
  `ifdef LFXT_DOMAIN
667 
      if (aclk_cnt    !== 3)   tb_error("====== LPM4 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
668 
  `else
669 
      if (aclk_cnt    !== 100) tb_error("====== LPM4 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
670 
  `endif
671 
      if (inst_cnt    <  60)   tb_error("====== LPM4 TEST 10: CPU IS NOT EXECUTING DURING IRQ   =====");
672 
      @(r13==16'haaaa);
673 
      wkup[2] = 1'b0;
674 
 
675 
      #(100*50);
676 
      dco_clk_cnt  = 0;
677 
      mclk_cnt     = 0;
678 
      smclk_cnt    = 0;
679 
      aclk_cnt     = 0;
680 
      inst_cnt     = 0;
681 
      #(100*50);
682 
      if (dco_clk_cnt !== 0)   tb_error("====== LPM4 TEST 11: DCO_CLK IS RUNNING     AFTER IRQ =====");
683 
      if (mclk_cnt    !== 0)   tb_error("====== LPM4 TEST 12: MCLK    IS RUNNING     AFTER IRQ =====");
684 
`ifdef SCG1_EN
685 
      if (smclk_cnt   !== 0)   tb_error("====== LPM4 TEST 13: SMCLK   IS RUNNING     AFTER IRQ =====");
686 
`else
687 
  `ifdef OSCOFF_EN
688 
      if (smclk_cnt   !== 0)   tb_error("====== LPM4 TEST 13: SMCLK   IS RUNNING     AFTER IRQ =====");
689 
  `else
690 
      if (smclk_cnt   <   3)   tb_error("====== LPM4 TEST 13: SMCLK   IS NOT RUNNING     AFTER IRQ =====");
691 
  `endif
692 
`endif
693 
`ifdef OSCOFF_EN
694 
      if (aclk_cnt    !== 0)   tb_error("====== LPM4 TEST 14: ACLK    IS RUNNING     AFTER IRQ =====");
695 
`else
696 
  `ifdef LFXT_DOMAIN
697 
      if (aclk_cnt    <   3)   tb_error("====== LPM4 TEST 14: ACLK    IS NOT RUNNING     AFTER IRQ =====");
698 
  `else
699 
      if (aclk_cnt    !== 0)   tb_error("====== LPM4 TEST 14: ACLK    IS RUNNING AFTER IRQ    =====");
700 
  `endif
701 
`endif
702 
      if (inst_cnt    !== 0)   tb_error("====== LPM4 TEST 15: CPU IS EXECUTING AFTER IRQ       =====");
703 
      dco_clk_cnt  = 0;
704 
      mclk_cnt     = 0;
705 
      smclk_cnt    = 0;
706 
      aclk_cnt     = 0;
707 
      inst_cnt     = 0;
708 
 
709 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
710 
      wkup[3] = 1'b1;
711 
      @(posedge irq_acc[3]);
712 
      #(100*50);
713 
      dco_clk_cnt  = 0;
714 
      mclk_cnt     = 0;
715 
      smclk_cnt    = 0;
716 
      aclk_cnt     = 0;
717 
      inst_cnt     = 0;
718 
      #(100*50);
719 
      if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
720 
      if (mclk_cnt    !== 100) tb_error("====== LPM4 TEST 17: MCLK    IS NOT RUNNING DURING IRQ =====");
721 
      if (smclk_cnt   <   3)   tb_error("====== LPM4 TEST 18: SMCLK   IS NOT RUNNING DURING IRQ =====");
722 
  `ifdef LFXT_DOMAIN
723 
      if (aclk_cnt    <   3)   tb_error("====== LPM4 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
724 
  `else
725 
      if (aclk_cnt    !== 100) tb_error("====== LPM4 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
726 
  `endif
727 
      if (inst_cnt    <  60)   tb_error("====== LPM4 TEST 20: CPU IS NOT EXECUTING DURING IRQ   =====");
728 
      @(r13==16'hbbbb);
729 
      wkup[3] = 1'b0;
730 
 
731 
      #(100*50);
732 
      dco_clk_cnt  = 0;
733 
      mclk_cnt     = 0;
734 
      smclk_cnt    = 0;
735 
      aclk_cnt     = 0;
736 
      inst_cnt     = 0;
737 
      #(100*50);
738 
      if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
739 
      if (mclk_cnt    !== 100) tb_error("====== LPM4 TEST 22: MCLK    IS NOT RUNNING AFTER IRQ =====");
740 
      if (smclk_cnt   <   3)   tb_error("====== LPM4 TEST 23: SMCLK   IS NOT RUNNING AFTER IRQ =====");
741 
  `ifdef LFXT_DOMAIN
742 
      if (aclk_cnt    <   3)   tb_error("====== LPM4 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
743 
  `else
744 
      if (aclk_cnt    !== 100) tb_error("====== LPM4 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
745 
  `endif
746 
      if (inst_cnt    <  60)   tb_error("====== LPM4 TEST 25: CPU IS NOT EXECUTING AFTER IRQ   =====");
747 
      dco_clk_cnt  = 0;
748 
      mclk_cnt     = 0;
749 
      smclk_cnt    = 0;
750 
      aclk_cnt     = 0;
751 
      inst_cnt     = 0;
752 
 
753 
 
754 
 
755 
`else
756 
      $display(" ===============================================");
757 
      $display("|               SIMULATION SKIPPED              |");
758 
      $display("|   (this test is not supported in FPGA mode)   |");
759 
      $display(" ===============================================");
760 
      $finish;
761 
`endif
762 
 
763 
      stimulus_done = 1;
764 
   end
765 
 

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