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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [lp_modes_dbg_asic.s43] - Blame information for rev 155

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Line No. Rev Author Line
1 134 olivier.gi
/*===========================================================================*/
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/* Copyright (C) 2001 Authors                                                */
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/*                                                                           */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any   */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer.                                                               */
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/*                                                                           */
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/* This source file is free software; you can redistribute it and/or modify  */
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/* it under the terms of the GNU Lesser General Public License as published  */
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/* by the Free Software Foundation; either version 2.1 of the License, or    */
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/* (at your option) any later version.                                       */
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/*                                                                           */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
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/* License for more details.                                                 */
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/*                                                                           */
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/* You should have received a copy of the GNU Lesser General Public License  */
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/* along with this source; if not, write to the Free Software Foundation,    */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
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/*                                                                           */
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/*===========================================================================*/
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/*                            CPU OPERATING MODES                            */
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/*---------------------------------------------------------------------------*/
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/* Test the CPU Low Power modes:                                             */
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/*                              - LPM0    <=>  CPUOFF                        */
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/*                              - LPM1    <=>  CPUOFF + SCG0                 */
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/*                              - LPM2    <=>  CPUOFF +        SCG1          */
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/*                              - LPM3    <=>  CPUOFF + SCG0 + SCG1          */
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/*                              - LPM4    <=>  CPUOFF + SCG0 + SCG1 + OSCOFF */
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/*                                                                           */
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/* Reminder:                                                                 */
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/*                              - CPUOFF  <=>  turns off CPU.                */
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/*                              - SCG0    <=>  turns off DCO.                */
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/*                              - SCG1    <=>  turns off SMCLK.              */
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/*                              - OSCOFF  <=>  turns off LFXT_CLK.           */
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/*                                                                           */
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/* Author(s):                                                                */
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/*             - Olivier Girard,    olgirard@gmail.com                       */
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/*                                                                           */
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/*---------------------------------------------------------------------------*/
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/* $Rev: 19 $                                                                */
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/* $LastChangedBy: olivier.girard $                                          */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
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/*===========================================================================*/
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48 141 olivier.gi
.include "pmem_defs.asm"
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50 134 olivier.gi
.global main
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.macro LPM0
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 bis    #0x0010, r2
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.endm
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.macro LPM1
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 bis    #0x0050, r2
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.endm
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.macro LPM2
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 bis    #0x0090, r2
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.endm
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.macro LPM3
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 bis    #0x00D0, r2
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.endm
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.macro LPM4
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 bis    #0x00F0, r2
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.endm
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.macro LPM0_exit
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 bic    #0x0010, @r1
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.endm
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.macro LPM1_exit
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 bic    #0x0050, @r1
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.endm
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.macro LPM2_exit
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 bic    #0x0090, @r1
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.endm
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.macro LPM3_exit
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 bic    #0x00D0, @r1
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.endm
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.macro LPM4_exit
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 bic    #0x00F0, @r1
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.endm
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WAIT_FUNC:
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        dec r14
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        jnz WAIT_FUNC
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        ret
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main:
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        ; Initialize stack and enable global interrupts
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        mov    #DMEM_250, r1
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        eint
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        ; Wait for a while to give enough time to ACLK
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        mov    #0x0050, r14
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        call   #WAIT_FUNC
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        mov    #0x1000, r15
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        /* --------------- ACTIVE ------------------------------------------ */
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        mov    #0x1001, r15
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        mov.b  #0x00, &BCSCTL2  ; # MCLK  = DCO_CLK
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                                ; # SMCLK = DCO_CLK
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        mov    #0x0080, r14
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        call   #WAIT_FUNC
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        mov    #0x2000, r15
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        /* --------------- LPM0  ( CPUOFF ) -------------------------------- */
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        mov    #0x2001, r15
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        mov.b  #0x00, &BCSCTL2  ; # MCLK  = DCO_CLK
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                                ; # SMCLK = DCO_CLK
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        LPM0                    ; #                     MCLK off
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        mov    #0x0090, r14
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        call   #WAIT_FUNC
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        mov    #0x3000, r15
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        /* --------------- LPM1  ( CPUOFF + SCG0 ) ------------------------- */
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        mov    #0x3001, r15
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        mov.b  #0x08, &BCSCTL2  ; # MCLK  = DCO_CLK
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                                ; # SMCLK = LFXT_CLK
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        LPM1                    ; #                     MCLK off + DCO off
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        mov    #0x0090, r14
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        call   #WAIT_FUNC
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        mov    #0x4000, r15
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        /*---------------- LPM2  ( CPUOFF + SCG1 ) ------------------------- */
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        mov    #0x4001, r15
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        mov.b  #0x08, &BCSCTL2  ; # MCLK  = DCO_CLK
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                                ; # SMCLK = LFXT_CLK
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        LPM2                    ; #                     MCLK off + SMCLK off
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        mov    #0x0190, r14
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        call   #WAIT_FUNC
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        mov    #0x5000, r15
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        /*---------------- LPM3  ( CPUOFF + SCG0 + SCG1 ) ------------------ */
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        mov    #0x5001, r15
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        mov.b  #0x08, &BCSCTL2  ; # MCLK  = DCO_CLK
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                                ; # SMCLK = LFXT_CLK
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        LPM3                    ; #                     MCLK off + DCO off + SMCLK off
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        mov    #0x0190, r14
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        call   #WAIT_FUNC
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        mov    #0x6000, r15
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        /*---------------- LPM4  ( CPUOFF + SCG0 + SCG1 + OSCOFF ) --------- */
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        mov    #0x6001, r15
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        mov.b  #0x08, &BCSCTL2  ; # MCLK  = DCO_CLK
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                                ; # SMCLK = LFXT_CLK
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        LPM4                    ; #                     MCLK off + DCO off + SMCLK off + LFXT off
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        mov    #0x0100, r14
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        call   #WAIT_FUNC
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        mov    #0x6000, r15
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        /* ----------------------         END OF TEST        --------------- */
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end_of_test:
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        nop
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        br #0xffff
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        /* ----------------------      INTERRUPT ROUTINES    --------------- */
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PORT1_VECTOR:
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        push       r13
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        push       r14
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        mov    #0x0060, r14
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        call   #WAIT_FUNC
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        mov    #0xaaaa, r13
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        pop        r14
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        pop        r13
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        reti
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PORT2_VECTOR:
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        push       r13
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        push       r14
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        mov    #0x0060, r14
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        call   #WAIT_FUNC
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        mov    #0xbbbb, r13
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        pop        r14
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        pop        r13
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        bic    #0xf0, 0(r1) ;exit all lowpower mode
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        reti
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        /* ----------------------         INTERRUPT VECTORS  --------------- */
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.section .vectors, "a"
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.word end_of_test  ; Interrupt  0 (lowest priority)    
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.word end_of_test  ; Interrupt  1                      
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.word PORT1_VECTOR ; Interrupt  2                      
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.word PORT2_VECTOR ; Interrupt  3                      
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.word end_of_test  ; Interrupt  4                      
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.word end_of_test  ; Interrupt  5                      
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.word end_of_test  ; Interrupt  6                      
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.word end_of_test  ; Interrupt  7                      
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.word end_of_test  ; Interrupt  8                      
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.word end_of_test  ; Interrupt  9                      
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.word end_of_test  ; Interrupt 10                      Watchdog timer
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.word end_of_test  ; Interrupt 11                      
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.word end_of_test  ; Interrupt 12                      
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.word end_of_test  ; Interrupt 13                      
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.word end_of_test  ; Interrupt 14                      NMI
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.word main         ; Interrupt 15 (highest priority)   RESET

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