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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [lp_modes_dbg_asic.v] - Blame information for rev 200

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1 134 olivier.gi 
/*===========================================================================*/
2 
/* Copyright (C) 2001 Authors                                                */
3 
/*                                                                           */
4 
/* This source file may be used and distributed without restriction provided */
5 
/* that this copyright statement is not removed from the file and that any   */
6 
/* derivative work contains the original copyright notice and the associated */
7 
/* disclaimer.                                                               */
8 
/*                                                                           */
9 
/* This source file is free software; you can redistribute it and/or modify  */
10 
/* it under the terms of the GNU Lesser General Public License as published  */
11 
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12 
/* (at your option) any later version.                                       */
13 
/*                                                                           */
14 
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15 
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16 
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17 
/* License for more details.                                                 */
18 
/*                                                                           */
19 
/* You should have received a copy of the GNU Lesser General Public License  */
20 
/* along with this source; if not, write to the Free Software Foundation,    */
21 
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22 
/*                                                                           */
23 
/*===========================================================================*/
24 
/*                            CPU LOW POWER MODES                            */
25 
/*---------------------------------------------------------------------------*/
26 
/* Test the CPU Low Power modes:                                             */
27 
/*                              - LPM0    <=>  CPUOFF                        */
28 
/*                              - LPM1    <=>  CPUOFF + SCG0                 */
29 
/*                              - LPM2    <=>  CPUOFF +        SCG1          */
30 
/*                              - LPM3    <=>  CPUOFF + SCG0 + SCG1          */
31 
/*                              - LPM4    <=>  CPUOFF + SCG0 + SCG1 + OSCOFF */
32 
/*                                                                           */
33 
/* Reminder:                                                                 */
34 
/*                              - CPUOFF  <=>  turns off CPU.                */
35 
/*                              - SCG0    <=>  turns off DCO.                */
36 
/*                              - SCG1    <=>  turns off SMCLK.              */
37 
/*                              - OSCOFF  <=>  turns off LFXT_CLK.           */
38 
/*                                                                           */
39 
/* Author(s):                                                                */
40 
/*             - Olivier Girard,    olgirard@gmail.com                       */
41 
/*                                                                           */
42 
/*---------------------------------------------------------------------------*/
43 
/* $Rev: 95 $                                                                */
44 
/* $LastChangedBy: olivier.girard $                                          */
45 
/* $LastChangedDate: 2011-02-24 21:37:57 +0100 (Thu, 24 Feb 2011) $          */
46 
/*===========================================================================*/
47 
 
48 
integer dco_clk_cnt;
49 
always @(negedge dco_clk)
50 
  dco_clk_cnt <= dco_clk_cnt+1;
51 
 
52 
integer mclk_cnt;
53 
always @(negedge mclk)
54 
  mclk_cnt <= mclk_cnt+1;
55 
 
56 
integer smclk_cnt;
57 
always @(negedge smclk)
58 
  smclk_cnt <= smclk_cnt+1;
59 
 
60 
integer aclk_cnt;
61 
always @(negedge aclk)
62 
  aclk_cnt <= aclk_cnt+1;
63 
 
64 
integer inst_cnt;
65 
always @(inst_number)
66 
  inst_cnt = inst_cnt+1;
67 
 
68 
// Wakeup synchronizer to generate IRQ
69 
reg [1:0] wkup2_sync;
70 
always @(posedge mclk or posedge puc_rst)
71 
  if (puc_rst) wkup2_sync <= 2'b00;
72 
  else         wkup2_sync <= {wkup2_sync[0], wkup[2]};
73 
 
74 
always @(wkup2_sync)
75 200 olivier.gi 
  irq[`IRQ_NR-14] = wkup2_sync[1]; // IRQ-2
76 134 olivier.gi 
 
77 
// Wakeup synchronizer to generate IRQ
78 
reg [1:0] wkup3_sync;
79 
always @(posedge mclk or posedge puc_rst)
80 
  if (puc_rst) wkup3_sync <= 2'b00;
81 
  else         wkup3_sync <= {wkup3_sync[0], wkup[3]};
82 
 
83 
always @(wkup3_sync)
84 200 olivier.gi 
  irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3
85 134 olivier.gi 
 
86 
 
87 
initial
88 
   begin
89 
      $display(" ===============================================");
90 
      $display("|                 START SIMULATION              |");
91 
      $display(" ===============================================");
92 
      @(negedge puc_rst);
93 
      repeat(5) @(posedge mclk);
94 
      stimulus_done = 0;
95 
 
96 
      // Enable debug interface
97 
      dbg_en  = 1;
98 
 
99 200 olivier.gi 
      irq[`IRQ_NR-14]  = 0;
100 134 olivier.gi 
      wkup[2] = 0;
101 
 
102 200 olivier.gi 
      irq[`IRQ_NR-13]  = 0;
103 134 olivier.gi 
      wkup[3] = 0;
104 
 
105 
      //$display("dco_clk_cnt: %d / mclk_cnt: %d / smclk_cnt: %d / aclk_cnt: %d / inst_cnt: %d ", dco_clk_cnt, mclk_cnt, smclk_cnt, aclk_cnt, inst_cnt);
106 
 
107 180 olivier.gi 
`ifdef ASIC_CLOCKING
108 134 olivier.gi 
 
109 
      // ACTIVE
110 
      //--------------------------------------------------------
111 
 
112 
      @(r15==16'h1001);
113 
      #(10*50);
114 
      dco_clk_cnt  = 0;
115 
      mclk_cnt     = 0;
116 
      smclk_cnt    = 0;
117 
      aclk_cnt     = 0;
118 
      inst_cnt     = 0;
119 
      #(100*50);
120 
      if (dco_clk_cnt !== 100) tb_error("====== ACTIVE TEST 1: DCO_CLK IS NOT RUNNING =====");
121 
      if (mclk_cnt    !== 100) tb_error("====== ACTIVE TEST 2: MCLK    IS NOT RUNNING =====");
122 
      if (smclk_cnt   !== 100) tb_error("====== ACTIVE TEST 3: SMCLK   IS NOT RUNNING =====");
123 
      if (aclk_cnt    <  3)    tb_error("====== ACTIVE TEST 4: ACLK    IS NOT RUNNING =====");
124 
      if (inst_cnt    <  60)   tb_error("====== ACTIVE TEST 5: CPU IS NOT EXECUTING   =====");
125 
      dco_clk_cnt  = 0;
126 
      mclk_cnt     = 0;
127 
      smclk_cnt    = 0;
128 
      aclk_cnt     = 0;
129 
      inst_cnt     = 0;
130 
 
131 
 
132 
 
133 
      // LPM0 ( CPUOFF )
134 
      //--------------------------------------------------------
135 
 
136 
      @(r15==16'h2001);
137 
      #(10*50);
138 
      dco_clk_cnt  = 0;
139 
      mclk_cnt     = 0;
140 
      smclk_cnt    = 0;
141 
      aclk_cnt     = 0;
142 
      inst_cnt     = 0;
143 
      #(100*50);
144 
      if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 1: DCO_CLK IS NOT RUNNING =====");
145 
      if (mclk_cnt    !== 100) tb_error("====== LPM0 TEST 2: MCLK    IS NOT RUNNING =====");
146 
      if (smclk_cnt   !== 100) tb_error("====== LPM0 TEST 3: SMCLK   IS NOT RUNNING =====");
147 
      if (aclk_cnt    <   3)   tb_error("====== LPM0 TEST 4: ACLK    IS NOT RUNNING =====");
148 
      if (inst_cnt    !== 0)   tb_error("====== LPM0 TEST 5: CPU IS EXECUTING       =====");
149 
      dco_clk_cnt  = 0;
150 
      mclk_cnt     = 0;
151 
      smclk_cnt    = 0;
152 
      aclk_cnt     = 0;
153 
      inst_cnt     = 0;
154 
 
155 
      @(posedge dco_clk);                //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
156 
      wkup[2] = 1'b1;
157 200 olivier.gi 
      @(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
158 134 olivier.gi 
      #(10*50);
159 
      dco_clk_cnt  = 0;
160 
      mclk_cnt     = 0;
161 
      smclk_cnt    = 0;
162 
      aclk_cnt     = 0;
163 
      inst_cnt     = 0;
164 
      #(100*50);
165 
      if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST  6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
166 
      if (mclk_cnt    !== 100) tb_error("====== LPM0 TEST  7: MCLK    IS NOT RUNNING DURING IRQ =====");
167 
      if (smclk_cnt   !== 100) tb_error("====== LPM0 TEST  8: SMCLK   IS NOT RUNNING DURING IRQ =====");
168 
      if (aclk_cnt    <   3)   tb_error("====== LPM0 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
169 
      if (inst_cnt    <  60)   tb_error("====== LPM0 TEST 10: CPU IS NOT EXECUTING DURING IRQ   =====");
170 
      @(r13==16'haaaa);
171 
      wkup[2] = 1'b0;
172 
 
173 
       #(10*50);
174 
      dco_clk_cnt  = 0;
175 
      mclk_cnt     = 0;
176 
      smclk_cnt    = 0;
177 
      aclk_cnt     = 0;
178 
      inst_cnt     = 0;
179 
      #(100*50);
180 
      if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
181 
      if (mclk_cnt    !== 100) tb_error("====== LPM0 TEST 12: MCLK    IS NOT RUNNING AFTER IRQ =====");
182 
      if (smclk_cnt   !== 100) tb_error("====== LPM0 TEST 13: SMCLK   IS NOT RUNNING AFTER IRQ =====");
183 
      if (aclk_cnt    <   3)   tb_error("====== LPM0 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
184 
      if (inst_cnt    !== 0)   tb_error("====== LPM0 TEST 15: CPU IS EXECUTING AFTER IRQ       =====");
185 
      dco_clk_cnt  = 0;
186 
      mclk_cnt     = 0;
187 
      smclk_cnt    = 0;
188 
      aclk_cnt     = 0;
189 
      inst_cnt     = 0;
190 
 
191 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
192 
      wkup[3] = 1'b1;
193 200 olivier.gi 
      @(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
194 134 olivier.gi 
      #(10*50);
195 
      dco_clk_cnt  = 0;
196 
      mclk_cnt     = 0;
197 
      smclk_cnt    = 0;
198 
      aclk_cnt     = 0;
199 
      inst_cnt     = 0;
200 
      #(100*50);
201 
      if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
202 
      if (mclk_cnt    !== 100) tb_error("====== LPM0 TEST 17: MCLK    IS NOT RUNNING DURING IRQ =====");
203 
      if (smclk_cnt   !== 100) tb_error("====== LPM0 TEST 18: SMCLK   IS NOT RUNNING DURING IRQ =====");
204 
      if (aclk_cnt    <   3)   tb_error("====== LPM0 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
205 
      if (inst_cnt    <  60)   tb_error("====== LPM0 TEST 20: CPU IS NOT EXECUTING DURING IRQ   =====");
206 
      @(r13==16'hbbbb);
207 
      wkup[3] = 1'b0;
208 
 
209 
       #(10*50);
210 
      dco_clk_cnt  = 0;
211 
      mclk_cnt     = 0;
212 
      smclk_cnt    = 0;
213 
      aclk_cnt     = 0;
214 
      inst_cnt     = 0;
215 
      #(100*50);
216 
      if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
217 
      if (mclk_cnt    !== 100) tb_error("====== LPM0 TEST 22: MCLK    IS NOT RUNNING AFTER IRQ =====");
218 
      if (smclk_cnt   !== 100) tb_error("====== LPM0 TEST 23: SMCLK   IS NOT RUNNING AFTER IRQ =====");
219 
      if (aclk_cnt    <   3)   tb_error("====== LPM0 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
220 
      if (inst_cnt    <  60)   tb_error("====== LPM0 TEST 25: CPU IS NOT EXECUTING AFTER IRQ   =====");
221 
      dco_clk_cnt  = 0;
222 
      mclk_cnt     = 0;
223 
      smclk_cnt    = 0;
224 
      aclk_cnt     = 0;
225 
      inst_cnt     = 0;
226 
 
227 
 
228 
      // LPM1 ( CPUOFF + SCG0 )
229 
      //--------------------------------------------------------
230 
 
231 
      @(r15==16'h3001);
232 
      // Until the SMCLK clock mux is implemented, force SMCLK to LFXT_CLK;
233 
      force dut.clock_module_0.nodiv_smclk = lfxt_clk;
234 
      //force dut.clock_module_0.smclk       = lfxt_clk;
235 
 
236 
      #(100*50);
237 
      dco_clk_cnt  = 0;
238 
      mclk_cnt     = 0;
239 
      smclk_cnt    = 0;
240 
      aclk_cnt     = 0;
241 
      inst_cnt     = 0;
242 
      #(100*50);
243 
      if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST 1: DCO_CLK IS NOT RUNNING =====");
244 
      if (mclk_cnt    !== 100) tb_error("====== LPM1 TEST 2: MCLK    IS NOT RUNNING =====");
245 
      if (smclk_cnt   <   3)   tb_error("====== LPM1 TEST 3: SMCLK   IS NOT RUNNING =====");
246 
      if (aclk_cnt    <   3)   tb_error("====== LPM1 TEST 4: ACLK    IS NOT RUNNING =====");
247 
      if (inst_cnt    !== 0)   tb_error("====== LPM1 TEST 5: CPU IS EXECUTING       =====");
248 
      dco_clk_cnt  = 0;
249 
      mclk_cnt     = 0;
250 
      smclk_cnt    = 0;
251 
      aclk_cnt     = 0;
252 
      inst_cnt     = 0;
253 
 
254 
      #(1*50);                           //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
255 
      wkup[2] = 1'b1;
256 200 olivier.gi 
      @(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
257 134 olivier.gi 
      #(10*50);
258 
      dco_clk_cnt  = 0;
259 
      mclk_cnt     = 0;
260 
      smclk_cnt    = 0;
261 
      aclk_cnt     = 0;
262 
      inst_cnt     = 0;
263 
      #(100*50);
264 
      if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST  6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
265 
      if (mclk_cnt    !== 100) tb_error("====== LPM1 TEST  7: MCLK    IS NOT RUNNING DURING IRQ =====");
266 
      if (smclk_cnt   <   3)   tb_error("====== LPM1 TEST  8: SMCLK   IS NOT RUNNING DURING IRQ =====");
267 
      if (aclk_cnt    <   3)   tb_error("====== LPM1 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
268 
      if (inst_cnt    <  60)   tb_error("====== LPM1 TEST 10: CPU IS NOT EXECUTING DURING IRQ   =====");
269 
      @(r13==16'haaaa);
270 
      wkup[2] = 1'b0;
271 
 
272 
       #(10*50);
273 
      dco_clk_cnt  = 0;
274 
      mclk_cnt     = 0;
275 
      smclk_cnt    = 0;
276 
      aclk_cnt     = 0;
277 
      inst_cnt     = 0;
278 
      #(100*50);
279 
      if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
280 
      if (mclk_cnt    !== 100) tb_error("====== LPM1 TEST 12: MCLK    IS NOT RUNNING AFTER IRQ =====");
281 
      if (smclk_cnt   <   3)   tb_error("====== LPM1 TEST 13: SMCLK   IS NOT RUNNING AFTER IRQ =====");
282 
      if (aclk_cnt    <   3)   tb_error("====== LPM1 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
283 
      if (inst_cnt    !== 0)   tb_error("====== LPM1 TEST 15: CPU IS EXECUTING AFTER IRQ       =====");
284 
      dco_clk_cnt  = 0;
285 
      mclk_cnt     = 0;
286 
      smclk_cnt    = 0;
287 
      aclk_cnt     = 0;
288 
      inst_cnt     = 0;
289 
 
290 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
291 
      wkup[3] = 1'b1;
292 200 olivier.gi 
      @(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
293 134 olivier.gi 
      #(10*50);
294 
      dco_clk_cnt  = 0;
295 
      mclk_cnt     = 0;
296 
      smclk_cnt    = 0;
297 
      aclk_cnt     = 0;
298 
      inst_cnt     = 0;
299 
      #(100*50);
300 
      if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
301 
      if (mclk_cnt    !== 100) tb_error("====== LPM1 TEST 17: MCLK    IS NOT RUNNING DURING IRQ =====");
302 
      if (smclk_cnt   !== 4)   tb_error("====== LPM1 TEST 18: SMCLK   IS NOT RUNNING DURING IRQ =====");
303 
      if (aclk_cnt    <   3)   tb_error("====== LPM1 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
304 
      if (inst_cnt    <  60)   tb_error("====== LPM1 TEST 20: CPU IS NOT EXECUTING DURING IRQ   =====");
305 
      @(r13==16'hbbbb);
306 
      wkup[3] = 1'b0;
307 
 
308 
       #(10*50);
309 
      dco_clk_cnt  = 0;
310 
      mclk_cnt     = 0;
311 
      smclk_cnt    = 0;
312 
      aclk_cnt     = 0;
313 
      inst_cnt     = 0;
314 
      #(100*50);
315 
      if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
316 
      if (mclk_cnt    !== 100) tb_error("====== LPM1 TEST 22: MCLK    IS NOT RUNNING AFTER IRQ =====");
317 
      if (smclk_cnt   <   3)   tb_error("====== LPM1 TEST 23: SMCLK   IS NOT RUNNING AFTER IRQ =====");
318 
      if (aclk_cnt    <   3)   tb_error("====== LPM1 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
319 
      if (inst_cnt    <  60)   tb_error("====== LPM1 TEST 25: CPU IS NOT EXECUTING AFTER IRQ   =====");
320 
      dco_clk_cnt  = 0;
321 
      mclk_cnt     = 0;
322 
      smclk_cnt    = 0;
323 
      aclk_cnt     = 0;
324 
      inst_cnt     = 0;
325 
 
326 
 
327 
      // LPM2 ( CPUOFF + SCG1 )
328 
      //--------------------------------------------------------
329 
 
330 
      @(r15==16'h4001);
331 
 
332 
      #(100*50);
333 
      dco_clk_cnt  = 0;
334 
      mclk_cnt     = 0;
335 
      smclk_cnt    = 0;
336 
      aclk_cnt     = 0;
337 
      inst_cnt     = 0;
338 
      #(100*50);
339 
      if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 1: DCO_CLK IS NOT RUNNING =====");
340 
      if (mclk_cnt    !== 100) tb_error("====== LPM2 TEST 2: MCLK    IS NOT RUNNING =====");
341 
`ifdef SCG1_EN
342 
      if (smclk_cnt   !== 0)   tb_error("====== LPM2 TEST 3: SMCLK   IS RUNNING     =====");
343 
`else
344 
      if (smclk_cnt   <   3)   tb_error("====== LPM2 TEST 3: SMCLK   IS NOT RUNNING     =====");
345 
`endif
346 
      if (aclk_cnt    <   3)   tb_error("====== LPM2 TEST 4: ACLK    IS NOT RUNNING =====");
347 
      if (inst_cnt    !== 0)   tb_error("====== LPM2 TEST 5: CPU IS EXECUTING       =====");
348 
      dco_clk_cnt  = 0;
349 
      mclk_cnt     = 0;
350 
      smclk_cnt    = 0;
351 
      aclk_cnt     = 0;
352 
      inst_cnt     = 0;
353 
 
354 
      #(1*50);                           //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
355 
      wkup[2] = 1'b1;
356 200 olivier.gi 
      @(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
357 134 olivier.gi 
      #(100*50);
358 
      dco_clk_cnt  = 0;
359 
      mclk_cnt     = 0;
360 
      smclk_cnt    = 0;
361 
      aclk_cnt     = 0;
362 
      inst_cnt     = 0;
363 
      #(100*50);
364 
      if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST  6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
365 
      if (mclk_cnt    !== 100) tb_error("====== LPM2 TEST  7: MCLK    IS NOT RUNNING DURING IRQ =====");
366 
      if (smclk_cnt   <   3)   tb_error("====== LPM2 TEST  8: SMCLK   IS NOT RUNNING DURING IRQ =====");
367 
      if (aclk_cnt    <   3)   tb_error("====== LPM2 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
368 
      if (inst_cnt    <  60)   tb_error("====== LPM2 TEST 10: CPU IS NOT EXECUTING DURING IRQ   =====");
369 
      @(r13==16'haaaa);
370 
      wkup[2] = 1'b0;
371 
 
372 
       #(100*50);
373 
      dco_clk_cnt  = 0;
374 
      mclk_cnt     = 0;
375 
      smclk_cnt    = 0;
376 
      aclk_cnt     = 0;
377 
      inst_cnt     = 0;
378 
      #(100*50);
379 
      if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
380 
      if (mclk_cnt    !== 100) tb_error("====== LPM2 TEST 12: MCLK    IS NOT RUNNING AFTER IRQ =====");
381 
`ifdef SCG1_EN
382 
      if (smclk_cnt   !== 0)   tb_error("====== LPM2 TEST 13: SMCLK   IS RUNNING     =====");
383 
`else
384 
      if (smclk_cnt   <   3)   tb_error("====== LPM2 TEST 13: SMCLK   IS NOT RUNNING     =====");
385 
`endif
386 
      if (aclk_cnt    <   3)   tb_error("====== LPM2 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
387 
      if (inst_cnt    !== 0)   tb_error("====== LPM2 TEST 15: CPU IS EXECUTING AFTER IRQ       =====");
388 
      dco_clk_cnt  = 0;
389 
      mclk_cnt     = 0;
390 
      smclk_cnt    = 0;
391 
      aclk_cnt     = 0;
392 
      inst_cnt     = 0;
393 
 
394 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
395 
      wkup[3] = 1'b1;
396 200 olivier.gi 
      @(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
397 134 olivier.gi 
      #(100*50);
398 
      dco_clk_cnt  = 0;
399 
      mclk_cnt     = 0;
400 
      smclk_cnt    = 0;
401 
      aclk_cnt     = 0;
402 
      inst_cnt     = 0;
403 
      #(100*50);
404 
      if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
405 
      if (mclk_cnt    !== 100) tb_error("====== LPM2 TEST 17: MCLK    IS NOT RUNNING DURING IRQ =====");
406 
      if (smclk_cnt   <   3)   tb_error("====== LPM2 TEST 18: SMCLK   IS NOT RUNNING DURING IRQ =====");
407 
      if (aclk_cnt    <   3)   tb_error("====== LPM2 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
408 
      if (inst_cnt    <  60)   tb_error("====== LPM2 TEST 20: CPU IS NOT EXECUTING DURING IRQ   =====");
409 
      @(r13==16'hbbbb);
410 
      wkup[3] = 1'b0;
411 
 
412 
       #(100*50);
413 
      dco_clk_cnt  = 0;
414 
      mclk_cnt     = 0;
415 
      smclk_cnt    = 0;
416 
      aclk_cnt     = 0;
417 
      inst_cnt     = 0;
418 
      #(100*50);
419 
      if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
420 
      if (mclk_cnt    !== 100) tb_error("====== LPM2 TEST 22: MCLK    IS NOT RUNNING AFTER IRQ =====");
421 
      if (smclk_cnt   <   3)   tb_error("====== LPM2 TEST 23: SMCLK   IS NOT RUNNING AFTER IRQ =====");
422 
      if (aclk_cnt    <   3)   tb_error("====== LPM2 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
423 
      if (inst_cnt    <  60)   tb_error("====== LPM2 TEST 25: CPU IS NOT EXECUTING AFTER IRQ   =====");
424 
      dco_clk_cnt  = 0;
425 
      mclk_cnt     = 0;
426 
      smclk_cnt    = 0;
427 
      aclk_cnt     = 0;
428 
      inst_cnt     = 0;
429 
 
430 
 
431 
      // LPM3 ( CPUOFF + SCG0 + SCG1 )
432 
      //--------------------------------------------------------
433 
 
434 
      @(r15==16'h5001);
435 
 
436 
      #(100*50);
437 
      dco_clk_cnt  = 0;
438 
      mclk_cnt     = 0;
439 
      smclk_cnt    = 0;
440 
      aclk_cnt     = 0;
441 
      inst_cnt     = 0;
442 
      #(100*50);
443 
      if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST 1: DCO_CLK IS NOT RUNNING =====");
444 
      if (mclk_cnt    !== 100) tb_error("====== LPM3 TEST 2: MCLK    IS NOT RUNNING =====");
445 
`ifdef SCG1_EN
446 
      if (smclk_cnt   !== 0)   tb_error("====== LPM3 TEST 3: SMCLK   IS RUNNING     =====");
447 
`else
448 
      if (smclk_cnt   <   3)   tb_error("====== LPM3 TEST 3: SMCLK   IS NOT RUNNING     =====");
449 
`endif
450 
      if (aclk_cnt    <   3)   tb_error("====== LPM3 TEST 4: ACLK    IS NOT RUNNING =====");
451 
      if (inst_cnt    !== 0)   tb_error("====== LPM3 TEST 5: CPU IS EXECUTING       =====");
452 
      dco_clk_cnt  = 0;
453 
      mclk_cnt     = 0;
454 
      smclk_cnt    = 0;
455 
      aclk_cnt     = 0;
456 
      inst_cnt     = 0;
457 
 
458 
      #(1*50);                           //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
459 
      wkup[2] = 1'b1;
460 200 olivier.gi 
      @(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
461 134 olivier.gi 
      #(100*50);
462 
      dco_clk_cnt  = 0;
463 
      mclk_cnt     = 0;
464 
      smclk_cnt    = 0;
465 
      aclk_cnt     = 0;
466 
      inst_cnt     = 0;
467 
      #(100*50);
468 
      if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST  6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
469 
      if (mclk_cnt    !== 100) tb_error("====== LPM3 TEST  7: MCLK    IS NOT RUNNING DURING IRQ =====");
470 
      if (smclk_cnt   <   3)   tb_error("====== LPM3 TEST  8: SMCLK   IS NOT RUNNING DURING IRQ =====");
471 
      if (aclk_cnt    <   3)   tb_error("====== LPM3 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
472 
      if (inst_cnt    <  60)   tb_error("====== LPM3 TEST 10: CPU IS NOT EXECUTING DURING IRQ   =====");
473 
      @(r13==16'haaaa);
474 
      wkup[2] = 1'b0;
475 
 
476 
      #(100*50);
477 
      dco_clk_cnt  = 0;
478 
      mclk_cnt     = 0;
479 
      smclk_cnt    = 0;
480 
      aclk_cnt     = 0;
481 
      inst_cnt     = 0;
482 
      #(100*50);
483 
      if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
484 
      if (mclk_cnt    !== 100) tb_error("====== LPM3 TEST 12: MCLK    IS NOT RUNNING AFTER IRQ =====");
485 
`ifdef SCG1_EN
486 
      if (smclk_cnt   !== 0)   tb_error("====== LPM3 TEST 13: SMCLK   IS RUNNING     AFTER IRQ =====");
487 
`else
488 
      if (smclk_cnt   <   3)   tb_error("====== LPM3 TEST 13: SMCLK   IS NOT RUNNING     AFTER IRQ =====");
489 
`endif
490 
      if (aclk_cnt    <   3)   tb_error("====== LPM3 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
491 
      if (inst_cnt    !== 0)   tb_error("====== LPM3 TEST 15: CPU IS EXECUTING AFTER IRQ       =====");
492 
      dco_clk_cnt  = 0;
493 
      mclk_cnt     = 0;
494 
      smclk_cnt    = 0;
495 
      aclk_cnt     = 0;
496 
      inst_cnt     = 0;
497 
 
498 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
499 
      wkup[3] = 1'b1;
500 200 olivier.gi 
      @(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
501 134 olivier.gi 
      #(100*50);
502 
      dco_clk_cnt  = 0;
503 
      mclk_cnt     = 0;
504 
      smclk_cnt    = 0;
505 
      aclk_cnt     = 0;
506 
      inst_cnt     = 0;
507 
      #(100*50);
508 
      if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
509 
      if (mclk_cnt    !== 100) tb_error("====== LPM3 TEST 17: MCLK    IS NOT RUNNING DURING IRQ =====");
510 
      if (smclk_cnt   <   3)   tb_error("====== LPM3 TEST 18: SMCLK   IS NOT RUNNING DURING IRQ =====");
511 
      if (aclk_cnt    <   3)   tb_error("====== LPM3 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
512 
      if (inst_cnt    <  60)   tb_error("====== LPM3 TEST 20: CPU IS NOT EXECUTING DURING IRQ   =====");
513 
      @(r13==16'hbbbb);
514 
      wkup[3] = 1'b0;
515 
 
516 
      #(100*50);
517 
      dco_clk_cnt  = 0;
518 
      mclk_cnt     = 0;
519 
      smclk_cnt    = 0;
520 
      aclk_cnt     = 0;
521 
      inst_cnt     = 0;
522 
      #(100*50);
523 
      if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
524 
      if (mclk_cnt    !== 100) tb_error("====== LPM3 TEST 22: MCLK    IS NOT RUNNING AFTER IRQ =====");
525 
      if (smclk_cnt   <   3)   tb_error("====== LPM3 TEST 23: SMCLK   IS NOT RUNNING AFTER IRQ =====");
526 
      if (aclk_cnt    <   3)   tb_error("====== LPM3 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
527 
      if (inst_cnt    <  60)   tb_error("====== LPM3 TEST 25: CPU IS NOT EXECUTING AFTER IRQ   =====");
528 
      dco_clk_cnt  = 0;
529 
      mclk_cnt     = 0;
530 
      smclk_cnt    = 0;
531 
      aclk_cnt     = 0;
532 
      inst_cnt     = 0;
533 
 
534 
 
535 
      // LPM4 ( CPUOFF + SCG0 + SCG1 + OSCOFF)
536 
      //--------------------------------------------------------
537 
 
538 
      @(r15==16'h6001);
539 
 
540 
      #(100*50);
541 
      dco_clk_cnt  = 0;
542 
      mclk_cnt     = 0;
543 
      smclk_cnt    = 0;
544 
      aclk_cnt     = 0;
545 
      inst_cnt     = 0;
546 
      #(100*50);
547 
      if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST 1: DCO_CLK IS NOT RUNNING =====");
548 
      if (mclk_cnt    !== 100) tb_error("====== LPM4 TEST 2: MCLK    IS NOT RUNNING =====");
549 
`ifdef SCG1_EN
550 
      if (smclk_cnt   !== 0)   tb_error("====== LPM4 TEST 3: SMCLK   IS RUNNING     =====");
551 
`else
552 
      if (smclk_cnt   <   3)   tb_error("====== LPM4 TEST 3: SMCLK   IS NOT RUNNING     =====");
553 
`endif
554 
`ifdef ACLK_DIVIDER
555 
  `ifdef OSCOFF_EN
556 
      if (aclk_cnt    !== 0)   tb_error("====== LPM4 TEST 4: ACLK    IS RUNNING =====");
557 
  `else
558 
      if (aclk_cnt    <   3)   tb_error("====== LPM4 TEST 4: ACLK    IS NOT RUNNING =====");
559 
  `endif
560 
`else
561 
      if (aclk_cnt    <   3)   tb_error("====== LPM4 TEST 4: ACLK    IS NOT RUNNING =====");
562 
`endif
563 
      if (inst_cnt    !== 0)   tb_error("====== LPM4 TEST 5: CPU IS EXECUTING       =====");
564 
      dco_clk_cnt  = 0;
565 
      mclk_cnt     = 0;
566 
      smclk_cnt    = 0;
567 
      aclk_cnt     = 0;
568 
      inst_cnt     = 0;
569 
 
570 
      #(1*50);                           //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
571 
      wkup[2] = 1'b1;
572 200 olivier.gi 
      @(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
573 134 olivier.gi 
      #(100*50);
574 
      dco_clk_cnt  = 0;
575 
      mclk_cnt     = 0;
576 
      smclk_cnt    = 0;
577 
      aclk_cnt     = 0;
578 
      inst_cnt     = 0;
579 
      #(100*50);
580 
      if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST  6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
581 
      if (mclk_cnt    !== 100) tb_error("====== LPM4 TEST  7: MCLK    IS NOT RUNNING DURING IRQ =====");
582 
      if (smclk_cnt   <   3)   tb_error("====== LPM4 TEST  8: SMCLK   IS NOT RUNNING DURING IRQ =====");
583 
      if (aclk_cnt    <   3)   tb_error("====== LPM4 TEST  9: ACLK    IS NOT RUNNING DURING IRQ =====");
584 
      if (inst_cnt    <  60)   tb_error("====== LPM4 TEST 10: CPU IS NOT EXECUTING DURING IRQ   =====");
585 
      @(r13==16'haaaa);
586 
      wkup[2] = 1'b0;
587 
 
588 
      #(100*50);
589 
      dco_clk_cnt  = 0;
590 
      mclk_cnt     = 0;
591 
      smclk_cnt    = 0;
592 
      aclk_cnt     = 0;
593 
      inst_cnt     = 0;
594 
      #(100*50);
595 
      if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
596 
      if (mclk_cnt    !== 100) tb_error("====== LPM4 TEST 12: MCLK    IS NOT RUNNING AFTER IRQ =====");
597 
`ifdef SCG1_EN
598 
      if (smclk_cnt   !== 0)   tb_error("====== LPM4 TEST 13: SMCLK   IS RUNNING     AFTER IRQ =====");
599 
`else
600 
      if (smclk_cnt   <   3)   tb_error("====== LPM4 TEST 13: SMCLK   IS NOT RUNNING     AFTER IRQ =====");
601 
`endif
602 
`ifdef ACLK_DIVIDER
603 
  `ifdef OSCOFF_EN
604 
      if (aclk_cnt    !== 0)   tb_error("====== LPM4 TEST 14: ACLK    IS RUNNING AFTER IRQ =====");
605 
  `else
606 
      if (aclk_cnt    <   3)   tb_error("====== LPM4 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
607 
  `endif
608 
`else
609 
      if (aclk_cnt    <   3)   tb_error("====== LPM4 TEST 14: ACLK    IS NOT RUNNING AFTER IRQ =====");
610 
`endif
611 
      if (inst_cnt    !== 0)   tb_error("====== LPM4 TEST 15: CPU IS EXECUTING AFTER IRQ       =====");
612 
      dco_clk_cnt  = 0;
613 
      mclk_cnt     = 0;
614 
      smclk_cnt    = 0;
615 
      aclk_cnt     = 0;
616 
      inst_cnt     = 0;
617 
 
618 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
619 
      wkup[3] = 1'b1;
620 200 olivier.gi 
      @(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
621 134 olivier.gi 
      #(100*50);
622 
      dco_clk_cnt  = 0;
623 
      mclk_cnt     = 0;
624 
      smclk_cnt    = 0;
625 
      aclk_cnt     = 0;
626 
      inst_cnt     = 0;
627 
      #(100*50);
628 
      if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
629 
      if (mclk_cnt    !== 100) tb_error("====== LPM4 TEST 17: MCLK    IS NOT RUNNING DURING IRQ =====");
630 
      if (smclk_cnt   <   3)   tb_error("====== LPM4 TEST 18: SMCLK   IS NOT RUNNING DURING IRQ =====");
631 
      if (aclk_cnt    <   3)   tb_error("====== LPM4 TEST 19: ACLK    IS NOT RUNNING DURING IRQ =====");
632 
      if (inst_cnt    <  60)   tb_error("====== LPM4 TEST 20: CPU IS NOT EXECUTING DURING IRQ   =====");
633 
      @(r13==16'hbbbb);
634 
      wkup[3] = 1'b0;
635 
 
636 
      #(100*50);
637 
      dco_clk_cnt  = 0;
638 
      mclk_cnt     = 0;
639 
      smclk_cnt    = 0;
640 
      aclk_cnt     = 0;
641 
      inst_cnt     = 0;
642 
      #(100*50);
643 
      if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
644 
      if (mclk_cnt    !== 100) tb_error("====== LPM4 TEST 22: MCLK    IS NOT RUNNING AFTER IRQ =====");
645 
      if (smclk_cnt   <   3)   tb_error("====== LPM4 TEST 23: SMCLK   IS NOT RUNNING AFTER IRQ =====");
646 
      if (aclk_cnt    <   3)   tb_error("====== LPM4 TEST 24: ACLK    IS NOT RUNNING AFTER IRQ =====");
647 
      if (inst_cnt    <  60)   tb_error("====== LPM4 TEST 25: CPU IS NOT EXECUTING AFTER IRQ   =====");
648 
      dco_clk_cnt  = 0;
649 
      mclk_cnt     = 0;
650 
      smclk_cnt    = 0;
651 
      aclk_cnt     = 0;
652 
      inst_cnt     = 0;
653 
 
654 
 
655 
 
656 
`else
657 
      $display(" ===============================================");
658 
      $display("|               SIMULATION SKIPPED              |");
659 
      $display("|   (this test is not supported in FPGA mode)   |");
660 
      $display(" ===============================================");
661 
      $finish;
662 
`endif
663 
 
664 
      stimulus_done = 1;
665 
   end
666 
 

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