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olivier.gi |
/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/*===========================================================================*/
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/* CPU LOW POWER MODES */
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/*---------------------------------------------------------------------------*/
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/* Test the CPU Low Power modes: */
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/* - LPM0 <=> CPUOFF */
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/* - LPM1 <=> CPUOFF + SCG0 */
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/* - LPM2 <=> CPUOFF + SCG1 */
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/* - LPM3 <=> CPUOFF + SCG0 + SCG1 */
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/* - LPM4 <=> CPUOFF + SCG0 + SCG1 + OSCOFF */
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/* */
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/* Reminder: */
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/* - CPUOFF <=> turns off CPU. */
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/* - SCG0 <=> turns off DCO. */
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/* - SCG1 <=> turns off SMCLK. */
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/* - OSCOFF <=> turns off LFXT_CLK. */
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/* */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/*---------------------------------------------------------------------------*/
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/* $Rev: 95 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2011-02-24 21:37:57 +0100 (Thu, 24 Feb 2011) $ */
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/*===========================================================================*/
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integer dco_clk_cnt;
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always @(negedge dco_clk)
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dco_clk_cnt <= dco_clk_cnt+1;
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integer mclk_cnt;
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always @(negedge mclk)
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mclk_cnt <= mclk_cnt+1;
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integer smclk_cnt;
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always @(negedge smclk)
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smclk_cnt <= smclk_cnt+1;
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integer aclk_cnt;
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always @(negedge aclk)
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aclk_cnt <= aclk_cnt+1;
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integer inst_cnt;
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always @(inst_number)
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inst_cnt = inst_cnt+1;
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// Wakeup synchronizer to generate IRQ
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reg [1:0] wkup2_sync;
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always @(posedge mclk or posedge puc_rst)
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if (puc_rst) wkup2_sync <= 2'b00;
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else wkup2_sync <= {wkup2_sync[0], wkup[2]};
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always @(wkup2_sync)
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olivier.gi |
irq[`IRQ_NR-14] = wkup2_sync[1]; // IRQ-2
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olivier.gi |
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olivier.gi |
// Wakeup synchronizer to generate IRQ
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reg [1:0] wkup3_sync;
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always @(posedge mclk or posedge puc_rst)
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if (puc_rst) wkup3_sync <= 2'b00;
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else wkup3_sync <= {wkup3_sync[0], wkup[3]};
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always @(wkup3_sync)
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olivier.gi |
irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3
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olivier.gi |
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olivier.gi |
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olivier.gi |
initial
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begin
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$display(" ===============================================");
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$display("| START SIMULATION |");
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$display(" ===============================================");
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@(negedge puc_rst);
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repeat(5) @(posedge mclk);
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stimulus_done = 0;
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// Enable debug interface
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dbg_en = 1;
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irq[`IRQ_NR-14] = 0;
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wkup[2] = 0;
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irq[`IRQ_NR-13] = 0;
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wkup[3] = 0;
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//$display("dco_clk_cnt: %d / mclk_cnt: %d / smclk_cnt: %d / aclk_cnt: %d / inst_cnt: %d ", dco_clk_cnt, mclk_cnt, smclk_cnt, aclk_cnt, inst_cnt);
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olivier.gi |
`ifdef ASIC_CLOCKING
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// ACTIVE
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//--------------------------------------------------------
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@(r15==16'h1001);
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#(10*50);
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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#(100*50);
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if (dco_clk_cnt !== 100) tb_error("====== ACTIVE TEST 1: DCO_CLK IS NOT RUNNING =====");
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if (mclk_cnt !== 100) tb_error("====== ACTIVE TEST 2: MCLK IS NOT RUNNING =====");
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if (smclk_cnt !== 100) tb_error("====== ACTIVE TEST 3: SMCLK IS NOT RUNNING =====");
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if (aclk_cnt < 3) tb_error("====== ACTIVE TEST 4: ACLK IS NOT RUNNING =====");
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if (inst_cnt < 60) tb_error("====== ACTIVE TEST 5: CPU IS NOT EXECUTING =====");
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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// LPM0 ( CPUOFF )
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//--------------------------------------------------------
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@(r15==16'h2001);
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#(10*50);
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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#(100*50);
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if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 1: DCO_CLK IS NOT RUNNING =====");
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if (mclk_cnt !== 100) tb_error("====== LPM0 TEST 2: MCLK IS NOT RUNNING =====");
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if (smclk_cnt !== 100) tb_error("====== LPM0 TEST 3: SMCLK IS NOT RUNNING =====");
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if (aclk_cnt < 3) tb_error("====== LPM0 TEST 4: ACLK IS NOT RUNNING =====");
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if (inst_cnt !== 0) tb_error("====== LPM0 TEST 5: CPU IS EXECUTING =====");
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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@(posedge dco_clk); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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wkup[2] = 1'b1;
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@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
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#(10*50);
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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#(100*50);
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if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
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if (mclk_cnt !== 100) tb_error("====== LPM0 TEST 7: MCLK IS NOT RUNNING DURING IRQ =====");
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if (smclk_cnt !== 100) tb_error("====== LPM0 TEST 8: SMCLK IS NOT RUNNING DURING IRQ =====");
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if (aclk_cnt < 3) tb_error("====== LPM0 TEST 9: ACLK IS NOT RUNNING DURING IRQ =====");
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if (inst_cnt < 60) tb_error("====== LPM0 TEST 10: CPU IS NOT EXECUTING DURING IRQ =====");
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@(r13==16'haaaa);
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wkup[2] = 1'b0;
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olivier.gi |
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#(10*50);
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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#(100*50);
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if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
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if (mclk_cnt !== 100) tb_error("====== LPM0 TEST 12: MCLK IS NOT RUNNING AFTER IRQ =====");
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if (smclk_cnt !== 100) tb_error("====== LPM0 TEST 13: SMCLK IS NOT RUNNING AFTER IRQ =====");
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if (aclk_cnt < 3) tb_error("====== LPM0 TEST 14: ACLK IS NOT RUNNING AFTER IRQ =====");
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if (inst_cnt !== 0) tb_error("====== LPM0 TEST 15: CPU IS EXECUTING AFTER IRQ =====");
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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wkup[3] = 1'b1;
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@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
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#(10*50);
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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#(100*50);
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if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
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if (mclk_cnt !== 100) tb_error("====== LPM0 TEST 17: MCLK IS NOT RUNNING DURING IRQ =====");
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if (smclk_cnt !== 100) tb_error("====== LPM0 TEST 18: SMCLK IS NOT RUNNING DURING IRQ =====");
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if (aclk_cnt < 3) tb_error("====== LPM0 TEST 19: ACLK IS NOT RUNNING DURING IRQ =====");
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if (inst_cnt < 60) tb_error("====== LPM0 TEST 20: CPU IS NOT EXECUTING DURING IRQ =====");
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@(r13==16'hbbbb);
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wkup[3] = 1'b0;
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olivier.gi |
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#(10*50);
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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#(100*50);
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if (dco_clk_cnt !== 100) tb_error("====== LPM0 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
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if (mclk_cnt !== 100) tb_error("====== LPM0 TEST 22: MCLK IS NOT RUNNING AFTER IRQ =====");
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if (smclk_cnt !== 100) tb_error("====== LPM0 TEST 23: SMCLK IS NOT RUNNING AFTER IRQ =====");
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if (aclk_cnt < 3) tb_error("====== LPM0 TEST 24: ACLK IS NOT RUNNING AFTER IRQ =====");
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if (inst_cnt < 60) tb_error("====== LPM0 TEST 25: CPU IS NOT EXECUTING AFTER IRQ =====");
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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olivier.gi |
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olivier.gi |
// LPM1 ( CPUOFF + SCG0 )
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//--------------------------------------------------------
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@(r15==16'h3001);
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// Until the SMCLK clock mux is implemented, force SMCLK to LFXT_CLK;
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force dut.clock_module_0.nodiv_smclk = lfxt_clk;
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//force dut.clock_module_0.smclk = lfxt_clk;
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#(100*50);
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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#(100*50);
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if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST 1: DCO_CLK IS NOT RUNNING =====");
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if (mclk_cnt !== 100) tb_error("====== LPM1 TEST 2: MCLK IS NOT RUNNING =====");
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if (smclk_cnt < 3) tb_error("====== LPM1 TEST 3: SMCLK IS NOT RUNNING =====");
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if (aclk_cnt < 3) tb_error("====== LPM1 TEST 4: ACLK IS NOT RUNNING =====");
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if (inst_cnt !== 0) tb_error("====== LPM1 TEST 5: CPU IS EXECUTING =====");
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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wkup[2] = 1'b1;
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256 |
200 |
olivier.gi |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
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134 |
olivier.gi |
#(10*50);
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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#(100*50);
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if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST 6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
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if (mclk_cnt !== 100) tb_error("====== LPM1 TEST 7: MCLK IS NOT RUNNING DURING IRQ =====");
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if (smclk_cnt < 3) tb_error("====== LPM1 TEST 8: SMCLK IS NOT RUNNING DURING IRQ =====");
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if (aclk_cnt < 3) tb_error("====== LPM1 TEST 9: ACLK IS NOT RUNNING DURING IRQ =====");
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if (inst_cnt < 60) tb_error("====== LPM1 TEST 10: CPU IS NOT EXECUTING DURING IRQ =====");
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@(r13==16'haaaa);
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wkup[2] = 1'b0;
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271 |
202 |
olivier.gi |
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272 |
134 |
olivier.gi |
#(10*50);
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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#(100*50);
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if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
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if (mclk_cnt !== 100) tb_error("====== LPM1 TEST 12: MCLK IS NOT RUNNING AFTER IRQ =====");
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if (smclk_cnt < 3) tb_error("====== LPM1 TEST 13: SMCLK IS NOT RUNNING AFTER IRQ =====");
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if (aclk_cnt < 3) tb_error("====== LPM1 TEST 14: ACLK IS NOT RUNNING AFTER IRQ =====");
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if (inst_cnt !== 0) tb_error("====== LPM1 TEST 15: CPU IS EXECUTING AFTER IRQ =====");
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dco_clk_cnt = 0;
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mclk_cnt = 0;
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smclk_cnt = 0;
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aclk_cnt = 0;
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inst_cnt = 0;
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289 |
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//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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291 |
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wkup[3] = 1'b1;
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292 |
200 |
olivier.gi |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
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293 |
134 |
olivier.gi |
#(10*50);
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294 |
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dco_clk_cnt = 0;
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295 |
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mclk_cnt = 0;
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296 |
|
|
smclk_cnt = 0;
|
297 |
|
|
aclk_cnt = 0;
|
298 |
|
|
inst_cnt = 0;
|
299 |
|
|
#(100*50);
|
300 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
|
301 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM1 TEST 17: MCLK IS NOT RUNNING DURING IRQ =====");
|
302 |
|
|
if (smclk_cnt !== 4) tb_error("====== LPM1 TEST 18: SMCLK IS NOT RUNNING DURING IRQ =====");
|
303 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM1 TEST 19: ACLK IS NOT RUNNING DURING IRQ =====");
|
304 |
|
|
if (inst_cnt < 60) tb_error("====== LPM1 TEST 20: CPU IS NOT EXECUTING DURING IRQ =====");
|
305 |
|
|
@(r13==16'hbbbb);
|
306 |
|
|
wkup[3] = 1'b0;
|
307 |
202 |
olivier.gi |
|
308 |
134 |
olivier.gi |
#(10*50);
|
309 |
|
|
dco_clk_cnt = 0;
|
310 |
|
|
mclk_cnt = 0;
|
311 |
|
|
smclk_cnt = 0;
|
312 |
|
|
aclk_cnt = 0;
|
313 |
|
|
inst_cnt = 0;
|
314 |
|
|
#(100*50);
|
315 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM1 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
|
316 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM1 TEST 22: MCLK IS NOT RUNNING AFTER IRQ =====");
|
317 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM1 TEST 23: SMCLK IS NOT RUNNING AFTER IRQ =====");
|
318 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM1 TEST 24: ACLK IS NOT RUNNING AFTER IRQ =====");
|
319 |
|
|
if (inst_cnt < 60) tb_error("====== LPM1 TEST 25: CPU IS NOT EXECUTING AFTER IRQ =====");
|
320 |
|
|
dco_clk_cnt = 0;
|
321 |
|
|
mclk_cnt = 0;
|
322 |
|
|
smclk_cnt = 0;
|
323 |
|
|
aclk_cnt = 0;
|
324 |
|
|
inst_cnt = 0;
|
325 |
|
|
|
326 |
|
|
|
327 |
|
|
// LPM2 ( CPUOFF + SCG1 )
|
328 |
|
|
//--------------------------------------------------------
|
329 |
|
|
|
330 |
|
|
@(r15==16'h4001);
|
331 |
202 |
olivier.gi |
|
332 |
134 |
olivier.gi |
#(100*50);
|
333 |
|
|
dco_clk_cnt = 0;
|
334 |
|
|
mclk_cnt = 0;
|
335 |
|
|
smclk_cnt = 0;
|
336 |
|
|
aclk_cnt = 0;
|
337 |
|
|
inst_cnt = 0;
|
338 |
|
|
#(100*50);
|
339 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 1: DCO_CLK IS NOT RUNNING =====");
|
340 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM2 TEST 2: MCLK IS NOT RUNNING =====");
|
341 |
|
|
`ifdef SCG1_EN
|
342 |
|
|
if (smclk_cnt !== 0) tb_error("====== LPM2 TEST 3: SMCLK IS RUNNING =====");
|
343 |
|
|
`else
|
344 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM2 TEST 3: SMCLK IS NOT RUNNING =====");
|
345 |
|
|
`endif
|
346 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM2 TEST 4: ACLK IS NOT RUNNING =====");
|
347 |
|
|
if (inst_cnt !== 0) tb_error("====== LPM2 TEST 5: CPU IS EXECUTING =====");
|
348 |
|
|
dco_clk_cnt = 0;
|
349 |
|
|
mclk_cnt = 0;
|
350 |
|
|
smclk_cnt = 0;
|
351 |
|
|
aclk_cnt = 0;
|
352 |
|
|
inst_cnt = 0;
|
353 |
|
|
|
354 |
|
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
|
355 |
|
|
wkup[2] = 1'b1;
|
356 |
200 |
olivier.gi |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
|
357 |
134 |
olivier.gi |
#(100*50);
|
358 |
|
|
dco_clk_cnt = 0;
|
359 |
|
|
mclk_cnt = 0;
|
360 |
|
|
smclk_cnt = 0;
|
361 |
|
|
aclk_cnt = 0;
|
362 |
|
|
inst_cnt = 0;
|
363 |
|
|
#(100*50);
|
364 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
|
365 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM2 TEST 7: MCLK IS NOT RUNNING DURING IRQ =====");
|
366 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM2 TEST 8: SMCLK IS NOT RUNNING DURING IRQ =====");
|
367 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM2 TEST 9: ACLK IS NOT RUNNING DURING IRQ =====");
|
368 |
|
|
if (inst_cnt < 60) tb_error("====== LPM2 TEST 10: CPU IS NOT EXECUTING DURING IRQ =====");
|
369 |
|
|
@(r13==16'haaaa);
|
370 |
|
|
wkup[2] = 1'b0;
|
371 |
202 |
olivier.gi |
|
372 |
134 |
olivier.gi |
#(100*50);
|
373 |
|
|
dco_clk_cnt = 0;
|
374 |
|
|
mclk_cnt = 0;
|
375 |
|
|
smclk_cnt = 0;
|
376 |
|
|
aclk_cnt = 0;
|
377 |
|
|
inst_cnt = 0;
|
378 |
|
|
#(100*50);
|
379 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
|
380 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM2 TEST 12: MCLK IS NOT RUNNING AFTER IRQ =====");
|
381 |
|
|
`ifdef SCG1_EN
|
382 |
|
|
if (smclk_cnt !== 0) tb_error("====== LPM2 TEST 13: SMCLK IS RUNNING =====");
|
383 |
|
|
`else
|
384 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM2 TEST 13: SMCLK IS NOT RUNNING =====");
|
385 |
|
|
`endif
|
386 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM2 TEST 14: ACLK IS NOT RUNNING AFTER IRQ =====");
|
387 |
|
|
if (inst_cnt !== 0) tb_error("====== LPM2 TEST 15: CPU IS EXECUTING AFTER IRQ =====");
|
388 |
|
|
dco_clk_cnt = 0;
|
389 |
|
|
mclk_cnt = 0;
|
390 |
|
|
smclk_cnt = 0;
|
391 |
|
|
aclk_cnt = 0;
|
392 |
|
|
inst_cnt = 0;
|
393 |
|
|
|
394 |
|
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
|
395 |
|
|
wkup[3] = 1'b1;
|
396 |
200 |
olivier.gi |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
|
397 |
134 |
olivier.gi |
#(100*50);
|
398 |
|
|
dco_clk_cnt = 0;
|
399 |
|
|
mclk_cnt = 0;
|
400 |
|
|
smclk_cnt = 0;
|
401 |
|
|
aclk_cnt = 0;
|
402 |
|
|
inst_cnt = 0;
|
403 |
|
|
#(100*50);
|
404 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
|
405 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM2 TEST 17: MCLK IS NOT RUNNING DURING IRQ =====");
|
406 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM2 TEST 18: SMCLK IS NOT RUNNING DURING IRQ =====");
|
407 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM2 TEST 19: ACLK IS NOT RUNNING DURING IRQ =====");
|
408 |
|
|
if (inst_cnt < 60) tb_error("====== LPM2 TEST 20: CPU IS NOT EXECUTING DURING IRQ =====");
|
409 |
|
|
@(r13==16'hbbbb);
|
410 |
|
|
wkup[3] = 1'b0;
|
411 |
202 |
olivier.gi |
|
412 |
134 |
olivier.gi |
#(100*50);
|
413 |
|
|
dco_clk_cnt = 0;
|
414 |
|
|
mclk_cnt = 0;
|
415 |
|
|
smclk_cnt = 0;
|
416 |
|
|
aclk_cnt = 0;
|
417 |
|
|
inst_cnt = 0;
|
418 |
|
|
#(100*50);
|
419 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM2 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
|
420 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM2 TEST 22: MCLK IS NOT RUNNING AFTER IRQ =====");
|
421 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM2 TEST 23: SMCLK IS NOT RUNNING AFTER IRQ =====");
|
422 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM2 TEST 24: ACLK IS NOT RUNNING AFTER IRQ =====");
|
423 |
|
|
if (inst_cnt < 60) tb_error("====== LPM2 TEST 25: CPU IS NOT EXECUTING AFTER IRQ =====");
|
424 |
|
|
dco_clk_cnt = 0;
|
425 |
|
|
mclk_cnt = 0;
|
426 |
|
|
smclk_cnt = 0;
|
427 |
|
|
aclk_cnt = 0;
|
428 |
|
|
inst_cnt = 0;
|
429 |
|
|
|
430 |
|
|
|
431 |
|
|
// LPM3 ( CPUOFF + SCG0 + SCG1 )
|
432 |
|
|
//--------------------------------------------------------
|
433 |
|
|
|
434 |
|
|
@(r15==16'h5001);
|
435 |
202 |
olivier.gi |
|
436 |
134 |
olivier.gi |
#(100*50);
|
437 |
|
|
dco_clk_cnt = 0;
|
438 |
|
|
mclk_cnt = 0;
|
439 |
|
|
smclk_cnt = 0;
|
440 |
|
|
aclk_cnt = 0;
|
441 |
|
|
inst_cnt = 0;
|
442 |
|
|
#(100*50);
|
443 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST 1: DCO_CLK IS NOT RUNNING =====");
|
444 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM3 TEST 2: MCLK IS NOT RUNNING =====");
|
445 |
|
|
`ifdef SCG1_EN
|
446 |
|
|
if (smclk_cnt !== 0) tb_error("====== LPM3 TEST 3: SMCLK IS RUNNING =====");
|
447 |
|
|
`else
|
448 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM3 TEST 3: SMCLK IS NOT RUNNING =====");
|
449 |
|
|
`endif
|
450 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM3 TEST 4: ACLK IS NOT RUNNING =====");
|
451 |
|
|
if (inst_cnt !== 0) tb_error("====== LPM3 TEST 5: CPU IS EXECUTING =====");
|
452 |
|
|
dco_clk_cnt = 0;
|
453 |
|
|
mclk_cnt = 0;
|
454 |
|
|
smclk_cnt = 0;
|
455 |
|
|
aclk_cnt = 0;
|
456 |
|
|
inst_cnt = 0;
|
457 |
|
|
|
458 |
|
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
|
459 |
|
|
wkup[2] = 1'b1;
|
460 |
200 |
olivier.gi |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
|
461 |
134 |
olivier.gi |
#(100*50);
|
462 |
|
|
dco_clk_cnt = 0;
|
463 |
|
|
mclk_cnt = 0;
|
464 |
|
|
smclk_cnt = 0;
|
465 |
|
|
aclk_cnt = 0;
|
466 |
|
|
inst_cnt = 0;
|
467 |
|
|
#(100*50);
|
468 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST 6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
|
469 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM3 TEST 7: MCLK IS NOT RUNNING DURING IRQ =====");
|
470 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM3 TEST 8: SMCLK IS NOT RUNNING DURING IRQ =====");
|
471 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM3 TEST 9: ACLK IS NOT RUNNING DURING IRQ =====");
|
472 |
|
|
if (inst_cnt < 60) tb_error("====== LPM3 TEST 10: CPU IS NOT EXECUTING DURING IRQ =====");
|
473 |
|
|
@(r13==16'haaaa);
|
474 |
|
|
wkup[2] = 1'b0;
|
475 |
202 |
olivier.gi |
|
476 |
134 |
olivier.gi |
#(100*50);
|
477 |
|
|
dco_clk_cnt = 0;
|
478 |
|
|
mclk_cnt = 0;
|
479 |
|
|
smclk_cnt = 0;
|
480 |
|
|
aclk_cnt = 0;
|
481 |
|
|
inst_cnt = 0;
|
482 |
|
|
#(100*50);
|
483 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
|
484 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM3 TEST 12: MCLK IS NOT RUNNING AFTER IRQ =====");
|
485 |
|
|
`ifdef SCG1_EN
|
486 |
|
|
if (smclk_cnt !== 0) tb_error("====== LPM3 TEST 13: SMCLK IS RUNNING AFTER IRQ =====");
|
487 |
|
|
`else
|
488 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM3 TEST 13: SMCLK IS NOT RUNNING AFTER IRQ =====");
|
489 |
|
|
`endif
|
490 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM3 TEST 14: ACLK IS NOT RUNNING AFTER IRQ =====");
|
491 |
|
|
if (inst_cnt !== 0) tb_error("====== LPM3 TEST 15: CPU IS EXECUTING AFTER IRQ =====");
|
492 |
|
|
dco_clk_cnt = 0;
|
493 |
|
|
mclk_cnt = 0;
|
494 |
|
|
smclk_cnt = 0;
|
495 |
|
|
aclk_cnt = 0;
|
496 |
|
|
inst_cnt = 0;
|
497 |
|
|
|
498 |
|
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
|
499 |
|
|
wkup[3] = 1'b1;
|
500 |
200 |
olivier.gi |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
|
501 |
134 |
olivier.gi |
#(100*50);
|
502 |
|
|
dco_clk_cnt = 0;
|
503 |
|
|
mclk_cnt = 0;
|
504 |
|
|
smclk_cnt = 0;
|
505 |
|
|
aclk_cnt = 0;
|
506 |
|
|
inst_cnt = 0;
|
507 |
|
|
#(100*50);
|
508 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
|
509 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM3 TEST 17: MCLK IS NOT RUNNING DURING IRQ =====");
|
510 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM3 TEST 18: SMCLK IS NOT RUNNING DURING IRQ =====");
|
511 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM3 TEST 19: ACLK IS NOT RUNNING DURING IRQ =====");
|
512 |
|
|
if (inst_cnt < 60) tb_error("====== LPM3 TEST 20: CPU IS NOT EXECUTING DURING IRQ =====");
|
513 |
|
|
@(r13==16'hbbbb);
|
514 |
|
|
wkup[3] = 1'b0;
|
515 |
202 |
olivier.gi |
|
516 |
134 |
olivier.gi |
#(100*50);
|
517 |
|
|
dco_clk_cnt = 0;
|
518 |
|
|
mclk_cnt = 0;
|
519 |
|
|
smclk_cnt = 0;
|
520 |
|
|
aclk_cnt = 0;
|
521 |
|
|
inst_cnt = 0;
|
522 |
|
|
#(100*50);
|
523 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM3 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
|
524 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM3 TEST 22: MCLK IS NOT RUNNING AFTER IRQ =====");
|
525 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM3 TEST 23: SMCLK IS NOT RUNNING AFTER IRQ =====");
|
526 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM3 TEST 24: ACLK IS NOT RUNNING AFTER IRQ =====");
|
527 |
|
|
if (inst_cnt < 60) tb_error("====== LPM3 TEST 25: CPU IS NOT EXECUTING AFTER IRQ =====");
|
528 |
|
|
dco_clk_cnt = 0;
|
529 |
|
|
mclk_cnt = 0;
|
530 |
|
|
smclk_cnt = 0;
|
531 |
|
|
aclk_cnt = 0;
|
532 |
|
|
inst_cnt = 0;
|
533 |
|
|
|
534 |
|
|
|
535 |
|
|
// LPM4 ( CPUOFF + SCG0 + SCG1 + OSCOFF)
|
536 |
|
|
//--------------------------------------------------------
|
537 |
|
|
|
538 |
202 |
olivier.gi |
@(r15==16'h6001);
|
539 |
134 |
olivier.gi |
|
540 |
|
|
#(100*50);
|
541 |
|
|
dco_clk_cnt = 0;
|
542 |
|
|
mclk_cnt = 0;
|
543 |
|
|
smclk_cnt = 0;
|
544 |
|
|
aclk_cnt = 0;
|
545 |
|
|
inst_cnt = 0;
|
546 |
|
|
#(100*50);
|
547 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST 1: DCO_CLK IS NOT RUNNING =====");
|
548 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM4 TEST 2: MCLK IS NOT RUNNING =====");
|
549 |
|
|
`ifdef SCG1_EN
|
550 |
|
|
if (smclk_cnt !== 0) tb_error("====== LPM4 TEST 3: SMCLK IS RUNNING =====");
|
551 |
|
|
`else
|
552 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM4 TEST 3: SMCLK IS NOT RUNNING =====");
|
553 |
|
|
`endif
|
554 |
|
|
`ifdef ACLK_DIVIDER
|
555 |
|
|
`ifdef OSCOFF_EN
|
556 |
|
|
if (aclk_cnt !== 0) tb_error("====== LPM4 TEST 4: ACLK IS RUNNING =====");
|
557 |
|
|
`else
|
558 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM4 TEST 4: ACLK IS NOT RUNNING =====");
|
559 |
|
|
`endif
|
560 |
|
|
`else
|
561 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM4 TEST 4: ACLK IS NOT RUNNING =====");
|
562 |
|
|
`endif
|
563 |
|
|
if (inst_cnt !== 0) tb_error("====== LPM4 TEST 5: CPU IS EXECUTING =====");
|
564 |
|
|
dco_clk_cnt = 0;
|
565 |
|
|
mclk_cnt = 0;
|
566 |
|
|
smclk_cnt = 0;
|
567 |
|
|
aclk_cnt = 0;
|
568 |
|
|
inst_cnt = 0;
|
569 |
|
|
|
570 |
|
|
#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
|
571 |
|
|
wkup[2] = 1'b1;
|
572 |
200 |
olivier.gi |
@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
|
573 |
134 |
olivier.gi |
#(100*50);
|
574 |
|
|
dco_clk_cnt = 0;
|
575 |
|
|
mclk_cnt = 0;
|
576 |
|
|
smclk_cnt = 0;
|
577 |
|
|
aclk_cnt = 0;
|
578 |
|
|
inst_cnt = 0;
|
579 |
|
|
#(100*50);
|
580 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST 6: DCO_CLK IS NOT RUNNING DURING IRQ =====");
|
581 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM4 TEST 7: MCLK IS NOT RUNNING DURING IRQ =====");
|
582 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM4 TEST 8: SMCLK IS NOT RUNNING DURING IRQ =====");
|
583 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM4 TEST 9: ACLK IS NOT RUNNING DURING IRQ =====");
|
584 |
|
|
if (inst_cnt < 60) tb_error("====== LPM4 TEST 10: CPU IS NOT EXECUTING DURING IRQ =====");
|
585 |
|
|
@(r13==16'haaaa);
|
586 |
|
|
wkup[2] = 1'b0;
|
587 |
202 |
olivier.gi |
|
588 |
134 |
olivier.gi |
#(100*50);
|
589 |
|
|
dco_clk_cnt = 0;
|
590 |
|
|
mclk_cnt = 0;
|
591 |
|
|
smclk_cnt = 0;
|
592 |
|
|
aclk_cnt = 0;
|
593 |
|
|
inst_cnt = 0;
|
594 |
|
|
#(100*50);
|
595 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST 11: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
|
596 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM4 TEST 12: MCLK IS NOT RUNNING AFTER IRQ =====");
|
597 |
|
|
`ifdef SCG1_EN
|
598 |
|
|
if (smclk_cnt !== 0) tb_error("====== LPM4 TEST 13: SMCLK IS RUNNING AFTER IRQ =====");
|
599 |
|
|
`else
|
600 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM4 TEST 13: SMCLK IS NOT RUNNING AFTER IRQ =====");
|
601 |
|
|
`endif
|
602 |
|
|
`ifdef ACLK_DIVIDER
|
603 |
|
|
`ifdef OSCOFF_EN
|
604 |
|
|
if (aclk_cnt !== 0) tb_error("====== LPM4 TEST 14: ACLK IS RUNNING AFTER IRQ =====");
|
605 |
|
|
`else
|
606 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM4 TEST 14: ACLK IS NOT RUNNING AFTER IRQ =====");
|
607 |
|
|
`endif
|
608 |
|
|
`else
|
609 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM4 TEST 14: ACLK IS NOT RUNNING AFTER IRQ =====");
|
610 |
|
|
`endif
|
611 |
|
|
if (inst_cnt !== 0) tb_error("====== LPM4 TEST 15: CPU IS EXECUTING AFTER IRQ =====");
|
612 |
|
|
dco_clk_cnt = 0;
|
613 |
|
|
mclk_cnt = 0;
|
614 |
|
|
smclk_cnt = 0;
|
615 |
|
|
aclk_cnt = 0;
|
616 |
|
|
inst_cnt = 0;
|
617 |
|
|
|
618 |
|
|
//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
|
619 |
|
|
wkup[3] = 1'b1;
|
620 |
200 |
olivier.gi |
@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
|
621 |
134 |
olivier.gi |
#(100*50);
|
622 |
|
|
dco_clk_cnt = 0;
|
623 |
|
|
mclk_cnt = 0;
|
624 |
|
|
smclk_cnt = 0;
|
625 |
|
|
aclk_cnt = 0;
|
626 |
|
|
inst_cnt = 0;
|
627 |
|
|
#(100*50);
|
628 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST 16: DCO_CLK IS NOT RUNNING DURING IRQ =====");
|
629 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM4 TEST 17: MCLK IS NOT RUNNING DURING IRQ =====");
|
630 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM4 TEST 18: SMCLK IS NOT RUNNING DURING IRQ =====");
|
631 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM4 TEST 19: ACLK IS NOT RUNNING DURING IRQ =====");
|
632 |
|
|
if (inst_cnt < 60) tb_error("====== LPM4 TEST 20: CPU IS NOT EXECUTING DURING IRQ =====");
|
633 |
|
|
@(r13==16'hbbbb);
|
634 |
|
|
wkup[3] = 1'b0;
|
635 |
202 |
olivier.gi |
|
636 |
134 |
olivier.gi |
#(100*50);
|
637 |
|
|
dco_clk_cnt = 0;
|
638 |
|
|
mclk_cnt = 0;
|
639 |
|
|
smclk_cnt = 0;
|
640 |
|
|
aclk_cnt = 0;
|
641 |
|
|
inst_cnt = 0;
|
642 |
|
|
#(100*50);
|
643 |
|
|
if (dco_clk_cnt !== 100) tb_error("====== LPM4 TEST 21: DCO_CLK IS NOT RUNNING AFTER IRQ =====");
|
644 |
|
|
if (mclk_cnt !== 100) tb_error("====== LPM4 TEST 22: MCLK IS NOT RUNNING AFTER IRQ =====");
|
645 |
|
|
if (smclk_cnt < 3) tb_error("====== LPM4 TEST 23: SMCLK IS NOT RUNNING AFTER IRQ =====");
|
646 |
|
|
if (aclk_cnt < 3) tb_error("====== LPM4 TEST 24: ACLK IS NOT RUNNING AFTER IRQ =====");
|
647 |
|
|
if (inst_cnt < 60) tb_error("====== LPM4 TEST 25: CPU IS NOT EXECUTING AFTER IRQ =====");
|
648 |
|
|
dco_clk_cnt = 0;
|
649 |
|
|
mclk_cnt = 0;
|
650 |
|
|
smclk_cnt = 0;
|
651 |
|
|
aclk_cnt = 0;
|
652 |
|
|
inst_cnt = 0;
|
653 |
|
|
|
654 |
|
|
|
655 |
|
|
|
656 |
|
|
`else
|
657 |
202 |
olivier.gi |
tb_skip_finish("| (this test is not supported in FPGA mode) |");
|
658 |
|
|
`endif
|
659 |
134 |
olivier.gi |
|
660 |
|
|
stimulus_done = 1;
|
661 |
|
|
end
|