URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [mpy_basic.s43] - Blame information for rev 224

Go to most recent revision | Details | Compare with Previous | View Log


/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                          HARDWARE MULTIPLIER                              */
/*---------------------------------------------------------------------------*/
/* Test the hardware multiplier:                                             */
/*                                - MPY  mode.                               */
/*                                - MPYS mode.                               */
/*                                - MAC  mode.                               */
/*                                - MACS mode.                               */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 18 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $          */
/*===========================================================================*/
 
.include "pmem_defs.asm"
 
.global main
 
main:
 
        /* --------------   UNSIGNED MULTIPLICATION   --------------- */
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x3104, &MPY 	; 0x3104 * 0x0285 = 0x007B_7F14, ext=0x0000
        mov #0x0285, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0000, &MPY 	; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000
        mov #0x0000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0001, &MPY 	; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000
        mov #0x0001, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MPY 	; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0xFFFF, &MPY 	; 0xFFFF * 0xFFFF = 0xFFFE_0001, ext=0x0000
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MPY 	; 0x7FFF * 0xFFFF = 0x7FFE_8001, ext=0x0000
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPY 	; 0x8000 * 0x7FFF = 0x3FFF_8000, ext=0x0000
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPY 	; 0x8000 * 0xFFFF = 0x7FFF_8000, ext=0x0000
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPY 	; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000
        mov #0x8000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop
 
        /* --------------    SIGNED MULTIPLICATION    --------------- */
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x3104, &MPYS 	; 0x3104 * 0x8285 = 0xE7F9_7F14, ext=0xFFFF
        mov #0x8285, &OP2       ;  12548 * -32123
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0000, &MPYS 	; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000
        mov #0x0000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0001, &MPYS 	; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000
        mov #0x0001, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MPYS 	; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0xFFFF, &MPYS 	; 0xFFFF * 0xFFFF = 0x0000_0001, ext=0x0000
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MPYS 	; 0x7FFF * 0xFFFF = 0xFFFF_8001, ext=0xFFFF
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPYS 	; 0x8000 * 0x7FFF = 0xC000_8000, ext=0xFFFF
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPYS 	; 0x8000 * 0xFFFF = 0x0000_8000, ext=0x0000
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPYS 	; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000
        mov #0x8000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop
 
        /* --------------   UNSIGNED MULTIPLY-ACCUMULATE   --------------- */
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x3104, &MAC 	; 0xC000_0000 + (0x3104 * 0x0285) = 0x007B_7F14, ext=0x0000
        mov #0x0285, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0000, &MAC 	; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0x0000
        mov #0x0000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0001, &MAC 	; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0x0000
        mov #0x0001, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MAC 	; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0x0000
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0xFFFF, &MAC 	; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xBFFE_0001, ext=0x0001
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MAC 	; 0xC000_0000 + (0x7FFF * 0xFFFF) = 0x3FFE_8001, ext=0x0001
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MAC 	; 0xC000_0000 + (0x8000 * 0x7FFF) = 0xFFFF_8000, ext=0x0000
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MAC 	; 0xC000_0000 + (0x8000 * 0xFFFF) = 0x3FFF_8000, ext=0x0001
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MAC 	; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0001
        mov #0x8000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop
 
 
        /* --------------   SIGNED MULTIPLY-ACCUMULATE   --------------- */
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x3104, &MACS 	; 0xC000_0000 + (0x3104 * 0x8285) = 0xA7F9_7F14, ext=0xFFFF
        mov #0x8285, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0000, &MACS 	; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0xFFFF
        mov #0x0000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0001, &MACS 	; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0xFFFF
        mov #0x0001, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MACS 	; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0xFFFF
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0xFFFF, &MACS 	; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xC000_0001, ext=0xFFFF
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MACS 	; 0xC000_0000 + (0x7FFF * 0xFFFF = 0xBFFF_8001, ext=0xFFFF
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MACS 	; 0xC000_0000 + (0x8000 * 0x7FFF) = 0x8000_8000, ext=0xFFFF
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MACS 	; 0xC000_0000 + (0x8000 * 0xFFFF) = 0xC000_8000, ext=0xFFFF
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MACS 	; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0000
        mov #0x8000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop
 
        /* --------------    16-BIT RD/WR ACCESS OPERANDS   --------------- */
 
        mov #0x1234,   &MPY
        mov #0x5678,   &OP2
        nop
        mov    &MPY,   r10
        mov   &MPYS,   r11
        mov    &MAC,   r12
        mov   &MACS,   r13
        mov    &OP2,   r14
        nop
        mov #0x0001,   r15
        nop
        nop
        nop
        nop
 
        mov #0x4321,   &MPYS
        mov #0x8765,   &OP2
        nop
        mov    &MPY,   r10
        mov   &MPYS,   r11
        mov    &MAC,   r12
        mov   &MACS,   r13
        mov    &OP2,   r14
        nop
        mov #0x0002,   r15
        nop
        nop
        nop
        nop
 
        mov #0x9ABC,   &MAC
        mov #0xDEF0,   &OP2
        nop
        mov    &MPY,   r10
        mov   &MPYS,   r11
        mov    &MAC,   r12
        mov   &MACS,   r13
        mov    &OP2,   r14
        nop
        mov #0x0003,   r15
        nop
        nop
        nop
        nop
 
        mov #0xCBA9,   &MACS
        mov #0x0FED,   &OP2
        nop
        mov    &MPY,   r10
        mov   &MPYS,   r11
        mov    &MAC,   r12
        mov   &MACS,   r13
        mov    &OP2,   r14
        nop
        mov #0x0004,   r15
        nop
        nop
        nop
        nop
 
        /* --------------    8-BIT RD/WR ACCESS OPERANDS   --------------- */
 
        mov   #0x1234,  &MPY
        mov   &MPY,     r10
        mov.b #0xab,    &MPY
        mov   &MPY,     r11
        nop
        mov   #0x0001,  r15
        nop
 
        mov   #0x5678,  &MPYS
        mov   &MPYS,    r10
        mov.b #0xbc,    &MPYS
        mov   &MPYS,    r11
        nop
        mov   #0x0002,  r15
        nop
 
        mov   #0x9abc,  &MAC
        mov   &MAC,     r10
        mov.b #0xde,    &MAC
        mov   &MAC,     r11
        nop
        mov   #0x0003,  r15
        nop
 
        mov   #0xdef0,  &MACS
        mov   &MACS,    r10
        mov.b #0xed,    &MACS
        mov   &MACS,    r11
        nop
        mov   #0x0004,  r15
        nop
 
        mov   #0x4321,  &OP2
        mov   &OP2,     r10
        mov.b #0xdc,    &OP2
        mov   &OP2,     r11
        nop
        mov   #0x0005,  r15
        nop
 
        mov   #0x8765,  &RESLO
        mov   &RESLO,   r10
        mov.b #0xcb,    &RESLO
        mov   &RESLO,   r11
        nop
        mov   #0x0006,  r15
        nop
 
        mov   #0xcba9,  &RESHI
        mov   &RESHI,   r10
        mov.b #0xba,    &RESHI
        mov   &RESHI,   r11
        nop
        mov   #0x0007,  r15
        nop
 
 
        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff
 
 
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    
.word end_of_test  ; Interrupt  1                      
.word end_of_test  ; Interrupt  2                      
.word end_of_test  ; Interrupt  3                      
.word end_of_test  ; Interrupt  4                      
.word end_of_test  ; Interrupt  5                      
.word end_of_test  ; Interrupt  6                      
.word end_of_test  ; Interrupt  7                      
.word end_of_test  ; Interrupt  8                      
.word end_of_test  ; Interrupt  9                      
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      
.word end_of_test  ; Interrupt 12                      
.word end_of_test  ; Interrupt 13                      
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET

Browse

Tools

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [mpy_basic.s43] - Blame information for rev 224

Line No.	Rev	Author	Line
1	67	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24			`/* HARDWARE MULTIPLIER */`
25			`/---------------------------------------------------------------------------/`
26			`/* Test the hardware multiplier: */`
27			`/* - MPY mode. */`
28			`/* - MPYS mode. */`
29			`/* - MAC mode. */`
30			`/* - MACS mode. */`
31			`/* */`
32			`/* Author(s): */`
33			`/* - Olivier Girard, olgirard@gmail.com */`
34			`/* */`
35			`/---------------------------------------------------------------------------/`
36			`/* $Rev: 18 $ */`
37			`/* $LastChangedBy: olivier.girard $ */`
38			`/* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $ */`
39			`/===========================================================================/`
40
41	141	olivier.gi	`.include "pmem_defs.asm"`
42
43	67	olivier.gi	`.global main`
44
45			`main:`
46
47			`/* -------------- UNSIGNED MULTIPLICATION --------------- */`
48
49			`mov #0x0000, &RESLO`
50			`mov #0xC000, &RESHI`
51
52			`mov #0x3104, &MPY ; 0x3104 * 0x0285 = 0x007B_7F14, ext=0x0000`
53			`mov #0x0285, &OP2`
54
55			`mov &RESLO, R10`
56			`mov &RESHI, R11`
57			`mov &SUMEXT, R12`
58			`nop`
59			`mov #0x0001, R15`
60			`nop`
61			`nop`
62			`nop`
63			`nop`
64
65			`mov #0x0000, &RESLO`
66			`mov #0xC000, &RESHI`
67
68			`mov #0x0000, &MPY ; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000`
69			`mov #0x0000, &OP2`
70
71			`mov &RESLO, R10`
72			`mov &RESHI, R11`
73			`mov &SUMEXT, R12`
74			`nop`
75			`mov #0x0002, R15`
76			`nop`
77			`nop`
78			`nop`
79			`nop`
80
81			`mov #0x0000, &RESLO`
82			`mov #0xC000, &RESHI`
83
84			`mov #0x0001, &MPY ; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000`
85			`mov #0x0001, &OP2`
86
87			`mov &RESLO, R10`
88			`mov &RESHI, R11`
89			`mov &SUMEXT, R12`
90			`nop`
91			`mov #0x0003, R15`
92			`nop`
93			`nop`
94			`nop`
95			`nop`
96
97			`mov #0x0000, &RESLO`
98			`mov #0xC000, &RESHI`
99
100			`mov #0x7FFF, &MPY ; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000`
101			`mov #0x7FFF, &OP2`
102
103			`mov &RESLO, R10`
104			`mov &RESHI, R11`
105			`mov &SUMEXT, R12`
106			`nop`
107			`mov #0x0004, R15`
108			`nop`
109			`nop`
110			`nop`
111			`nop`
112
113			`mov #0x0000, &RESLO`
114			`mov #0xC000, &RESHI`
115
116			`mov #0xFFFF, &MPY ; 0xFFFF * 0xFFFF = 0xFFFE_0001, ext=0x0000`
117			`mov #0xFFFF, &OP2`
118
119			`mov &RESLO, R10`
120			`mov &RESHI, R11`
121			`mov &SUMEXT, R12`
122			`nop`
123			`mov #0x0005, R15`
124			`nop`
125			`nop`
126			`nop`
127			`nop`
128
129			`mov #0x0000, &RESLO`
130			`mov #0xC000, &RESHI`
131
132			`mov #0x7FFF, &MPY ; 0x7FFF * 0xFFFF = 0x7FFE_8001, ext=0x0000`
133			`mov #0xFFFF, &OP2`
134
135			`mov &RESLO, R10`
136			`mov &RESHI, R11`
137			`mov &SUMEXT, R12`
138			`nop`
139			`mov #0x0006, R15`
140			`nop`
141			`nop`
142			`nop`
143			`nop`
144
145			`mov #0x0000, &RESLO`
146			`mov #0xC000, &RESHI`
147
148			`mov #0x8000, &MPY ; 0x8000 * 0x7FFF = 0x3FFF_8000, ext=0x0000`
149			`mov #0x7FFF, &OP2`
150
151			`mov &RESLO, R10`
152			`mov &RESHI, R11`
153			`mov &SUMEXT, R12`
154			`nop`
155			`mov #0x0007, R15`
156			`nop`
157			`nop`
158			`nop`
159			`nop`
160
161			`mov #0x0000, &RESLO`
162			`mov #0xC000, &RESHI`
163
164			`mov #0x8000, &MPY ; 0x8000 * 0xFFFF = 0x7FFF_8000, ext=0x0000`
165			`mov #0xFFFF, &OP2`
166
167			`mov &RESLO, R10`
168			`mov &RESHI, R11`
169			`mov &SUMEXT, R12`
170			`nop`
171			`mov #0x0008, R15`
172			`nop`
173			`nop`
174			`nop`
175			`nop`
176
177			`mov #0x0000, &RESLO`
178			`mov #0xC000, &RESHI`
179
180			`mov #0x8000, &MPY ; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000`
181			`mov #0x8000, &OP2`
182
183			`mov &RESLO, R10`
184			`mov &RESHI, R11`
185			`mov &SUMEXT, R12`
186			`nop`
187			`mov #0x0009, R15`
188			`nop`
189			`nop`
190			`nop`
191			`nop`
192
193			`/* -------------- SIGNED MULTIPLICATION --------------- */`
194
195			`mov #0x0000, &RESLO`
196			`mov #0xC000, &RESHI`
197
198			`mov #0x3104, &MPYS ; 0x3104 * 0x8285 = 0xE7F9_7F14, ext=0xFFFF`
199			`mov #0x8285, &OP2 ; 12548 * -32123`
200
201			`mov &RESLO, R10`
202			`mov &RESHI, R11`
203			`mov &SUMEXT, R12`
204			`nop`
205			`mov #0x0001, R15`
206			`nop`
207			`nop`
208			`nop`
209			`nop`
210
211			`mov #0x0000, &RESLO`
212			`mov #0xC000, &RESHI`
213
214			`mov #0x0000, &MPYS ; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000`
215			`mov #0x0000, &OP2`
216
217			`mov &RESLO, R10`
218			`mov &RESHI, R11`
219			`mov &SUMEXT, R12`
220			`nop`
221			`mov #0x0002, R15`
222			`nop`
223			`nop`
224			`nop`
225			`nop`
226
227			`mov #0x0000, &RESLO`
228			`mov #0xC000, &RESHI`
229
230			`mov #0x0001, &MPYS ; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000`
231			`mov #0x0001, &OP2`
232
233			`mov &RESLO, R10`
234			`mov &RESHI, R11`
235			`mov &SUMEXT, R12`
236			`nop`
237			`mov #0x0003, R15`
238			`nop`
239			`nop`
240			`nop`
241			`nop`
242
243			`mov #0x0000, &RESLO`
244			`mov #0xC000, &RESHI`
245
246			`mov #0x7FFF, &MPYS ; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000`
247			`mov #0x7FFF, &OP2`
248
249			`mov &RESLO, R10`
250			`mov &RESHI, R11`
251			`mov &SUMEXT, R12`
252			`nop`
253			`mov #0x0004, R15`
254			`nop`
255			`nop`
256			`nop`
257			`nop`
258
259			`mov #0x0000, &RESLO`
260			`mov #0xC000, &RESHI`
261
262			`mov #0xFFFF, &MPYS ; 0xFFFF * 0xFFFF = 0x0000_0001, ext=0x0000`
263			`mov #0xFFFF, &OP2`
264
265			`mov &RESLO, R10`
266			`mov &RESHI, R11`
267			`mov &SUMEXT, R12`
268			`nop`
269			`mov #0x0005, R15`
270			`nop`
271			`nop`
272			`nop`
273			`nop`
274
275			`mov #0x0000, &RESLO`
276			`mov #0xC000, &RESHI`
277
278			`mov #0x7FFF, &MPYS ; 0x7FFF * 0xFFFF = 0xFFFF_8001, ext=0xFFFF`
279			`mov #0xFFFF, &OP2`
280
281			`mov &RESLO, R10`
282			`mov &RESHI, R11`
283			`mov &SUMEXT, R12`
284			`nop`
285			`mov #0x0006, R15`
286			`nop`
287			`nop`
288			`nop`
289			`nop`
290
291			`mov #0x0000, &RESLO`
292			`mov #0xC000, &RESHI`
293
294			`mov #0x8000, &MPYS ; 0x8000 * 0x7FFF = 0xC000_8000, ext=0xFFFF`
295			`mov #0x7FFF, &OP2`
296
297			`mov &RESLO, R10`
298			`mov &RESHI, R11`
299			`mov &SUMEXT, R12`
300			`nop`
301			`mov #0x0007, R15`
302			`nop`
303			`nop`
304			`nop`
305			`nop`
306
307			`mov #0x0000, &RESLO`
308			`mov #0xC000, &RESHI`
309
310			`mov #0x8000, &MPYS ; 0x8000 * 0xFFFF = 0x0000_8000, ext=0x0000`
311			`mov #0xFFFF, &OP2`
312
313			`mov &RESLO, R10`
314			`mov &RESHI, R11`
315			`mov &SUMEXT, R12`
316			`nop`
317			`mov #0x0008, R15`
318			`nop`
319			`nop`
320			`nop`
321			`nop`
322
323			`mov #0x0000, &RESLO`
324			`mov #0xC000, &RESHI`
325
326			`mov #0x8000, &MPYS ; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000`
327			`mov #0x8000, &OP2`
328
329			`mov &RESLO, R10`
330			`mov &RESHI, R11`
331			`mov &SUMEXT, R12`
332			`nop`
333			`mov #0x0009, R15`
334			`nop`
335			`nop`
336			`nop`
337			`nop`
338
339			`/* -------------- UNSIGNED MULTIPLY-ACCUMULATE --------------- */`
340
341			`mov #0x0000, &RESLO`
342			`mov #0xC000, &RESHI`
343
344			`mov #0x3104, &MAC ; 0xC000_0000 + (0x3104 * 0x0285) = 0x007B_7F14, ext=0x0000`
345			`mov #0x0285, &OP2`
346
347			`mov &RESLO, R10`
348			`mov &RESHI, R11`
349			`mov &SUMEXT, R12`
350			`nop`
351			`mov #0x0001, R15`
352			`nop`
353			`nop`
354			`nop`
355			`nop`
356
357			`mov #0x0000, &RESLO`
358			`mov #0xC000, &RESHI`
359
360			`mov #0x0000, &MAC ; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0x0000`
361			`mov #0x0000, &OP2`
362
363			`mov &RESLO, R10`
364			`mov &RESHI, R11`
365			`mov &SUMEXT, R12`
366			`nop`
367			`mov #0x0002, R15`
368			`nop`
369			`nop`
370			`nop`
371			`nop`
372
373			`mov #0x0000, &RESLO`
374			`mov #0xC000, &RESHI`
375
376			`mov #0x0001, &MAC ; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0x0000`
377			`mov #0x0001, &OP2`
378
379			`mov &RESLO, R10`
380			`mov &RESHI, R11`
381			`mov &SUMEXT, R12`
382			`nop`
383			`mov #0x0003, R15`
384			`nop`
385			`nop`
386			`nop`
387			`nop`
388
389			`mov #0x0000, &RESLO`
390			`mov #0xC000, &RESHI`
391
392			`mov #0x7FFF, &MAC ; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0x0000`
393			`mov #0x7FFF, &OP2`
394
395			`mov &RESLO, R10`
396			`mov &RESHI, R11`
397			`mov &SUMEXT, R12`
398			`nop`
399			`mov #0x0004, R15`
400			`nop`
401			`nop`
402			`nop`
403			`nop`
404
405			`mov #0x0000, &RESLO`
406			`mov #0xC000, &RESHI`
407
408			`mov #0xFFFF, &MAC ; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xBFFE_0001, ext=0x0001`
409			`mov #0xFFFF, &OP2`
410
411			`mov &RESLO, R10`
412			`mov &RESHI, R11`
413			`mov &SUMEXT, R12`
414			`nop`
415			`mov #0x0005, R15`
416			`nop`
417			`nop`
418			`nop`
419			`nop`
420
421			`mov #0x0000, &RESLO`
422			`mov #0xC000, &RESHI`
423
424			`mov #0x7FFF, &MAC ; 0xC000_0000 + (0x7FFF * 0xFFFF) = 0x3FFE_8001, ext=0x0001`
425			`mov #0xFFFF, &OP2`
426
427			`mov &RESLO, R10`
428			`mov &RESHI, R11`
429			`mov &SUMEXT, R12`
430			`nop`
431			`mov #0x0006, R15`
432			`nop`
433			`nop`
434			`nop`
435			`nop`
436
437			`mov #0x0000, &RESLO`
438			`mov #0xC000, &RESHI`
439
440			`mov #0x8000, &MAC ; 0xC000_0000 + (0x8000 * 0x7FFF) = 0xFFFF_8000, ext=0x0000`
441			`mov #0x7FFF, &OP2`
442
443			`mov &RESLO, R10`
444			`mov &RESHI, R11`
445			`mov &SUMEXT, R12`
446			`nop`
447			`mov #0x0007, R15`
448			`nop`
449			`nop`
450			`nop`
451			`nop`
452
453			`mov #0x0000, &RESLO`
454			`mov #0xC000, &RESHI`
455
456			`mov #0x8000, &MAC ; 0xC000_0000 + (0x8000 * 0xFFFF) = 0x3FFF_8000, ext=0x0001`
457			`mov #0xFFFF, &OP2`
458
459			`mov &RESLO, R10`
460			`mov &RESHI, R11`
461			`mov &SUMEXT, R12`
462			`nop`
463			`mov #0x0008, R15`
464			`nop`
465			`nop`
466			`nop`
467			`nop`
468
469			`mov #0x0000, &RESLO`
470			`mov #0xC000, &RESHI`
471
472			`mov #0x8000, &MAC ; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0001`
473			`mov #0x8000, &OP2`
474
475			`mov &RESLO, R10`
476			`mov &RESHI, R11`
477			`mov &SUMEXT, R12`
478			`nop`
479			`mov #0x0009, R15`
480			`nop`
481			`nop`
482			`nop`
483			`nop`
484
485
486			`/* -------------- SIGNED MULTIPLY-ACCUMULATE --------------- */`
487
488			`mov #0x0000, &RESLO`
489			`mov #0xC000, &RESHI`
490
491			`mov #0x3104, &MACS ; 0xC000_0000 + (0x3104 * 0x8285) = 0xA7F9_7F14, ext=0xFFFF`
492			`mov #0x8285, &OP2`
493
494			`mov &RESLO, R10`
495			`mov &RESHI, R11`
496			`mov &SUMEXT, R12`
497			`nop`
498			`mov #0x0001, R15`
499			`nop`
500			`nop`
501			`nop`
502			`nop`
503
504			`mov #0x0000, &RESLO`
505			`mov #0xC000, &RESHI`
506
507			`mov #0x0000, &MACS ; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0xFFFF`
508			`mov #0x0000, &OP2`
509
510			`mov &RESLO, R10`
511			`mov &RESHI, R11`
512			`mov &SUMEXT, R12`
513			`nop`
514			`mov #0x0002, R15`
515			`nop`
516			`nop`
517			`nop`
518			`nop`
519
520			`mov #0x0000, &RESLO`
521			`mov #0xC000, &RESHI`
522
523			`mov #0x0001, &MACS ; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0xFFFF`
524			`mov #0x0001, &OP2`
525
526			`mov &RESLO, R10`
527			`mov &RESHI, R11`
528			`mov &SUMEXT, R12`
529			`nop`
530			`mov #0x0003, R15`
531			`nop`
532			`nop`
533			`nop`
534			`nop`
535
536			`mov #0x0000, &RESLO`
537			`mov #0xC000, &RESHI`
538
539			`mov #0x7FFF, &MACS ; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0xFFFF`
540			`mov #0x7FFF, &OP2`
541
542			`mov &RESLO, R10`
543			`mov &RESHI, R11`
544			`mov &SUMEXT, R12`
545			`nop`
546			`mov #0x0004, R15`
547			`nop`
548			`nop`
549			`nop`
550			`nop`
551
552			`mov #0x0000, &RESLO`
553			`mov #0xC000, &RESHI`
554
555			`mov #0xFFFF, &MACS ; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xC000_0001, ext=0xFFFF`
556			`mov #0xFFFF, &OP2`
557
558			`mov &RESLO, R10`
559			`mov &RESHI, R11`
560			`mov &SUMEXT, R12`
561			`nop`
562			`mov #0x0005, R15`
563			`nop`
564			`nop`
565			`nop`
566			`nop`
567
568			`mov #0x0000, &RESLO`
569			`mov #0xC000, &RESHI`
570
571			`mov #0x7FFF, &MACS ; 0xC000_0000 + (0x7FFF * 0xFFFF = 0xBFFF_8001, ext=0xFFFF`
572			`mov #0xFFFF, &OP2`
573
574			`mov &RESLO, R10`
575			`mov &RESHI, R11`
576			`mov &SUMEXT, R12`
577			`nop`
578			`mov #0x0006, R15`
579			`nop`
580			`nop`
581			`nop`
582			`nop`
583
584			`mov #0x0000, &RESLO`
585			`mov #0xC000, &RESHI`
586
587			`mov #0x8000, &MACS ; 0xC000_0000 + (0x8000 * 0x7FFF) = 0x8000_8000, ext=0xFFFF`
588			`mov #0x7FFF, &OP2`
589
590			`mov &RESLO, R10`
591			`mov &RESHI, R11`
592			`mov &SUMEXT, R12`
593			`nop`
594			`mov #0x0007, R15`
595			`nop`
596			`nop`
597			`nop`
598			`nop`
599
600			`mov #0x0000, &RESLO`
601			`mov #0xC000, &RESHI`
602
603			`mov #0x8000, &MACS ; 0xC000_0000 + (0x8000 * 0xFFFF) = 0xC000_8000, ext=0xFFFF`
604			`mov #0xFFFF, &OP2`
605
606			`mov &RESLO, R10`
607			`mov &RESHI, R11`
608			`mov &SUMEXT, R12`
609			`nop`
610			`mov #0x0008, R15`
611			`nop`
612			`nop`
613			`nop`
614			`nop`
615
616			`mov #0x0000, &RESLO`
617			`mov #0xC000, &RESHI`
618
619			`mov #0x8000, &MACS ; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0000`
620			`mov #0x8000, &OP2`
621
622			`mov &RESLO, R10`
623			`mov &RESHI, R11`
624			`mov &SUMEXT, R12`
625			`nop`
626			`mov #0x0009, R15`
627			`nop`
628			`nop`
629			`nop`
630			`nop`
631
632	186	olivier.gi	`/* -------------- 16-BIT RD/WR ACCESS OPERANDS --------------- */`
633	67	olivier.gi
634	111	olivier.gi	`mov #0x1234, &MPY`
635			`mov #0x5678, &OP2`
636			`nop`
637			`mov &MPY, r10`
638			`mov &MPYS, r11`
639			`mov &MAC, r12`
640			`mov &MACS, r13`
641			`mov &OP2, r14`
642			`nop`
643			`mov #0x0001, r15`
644			`nop`
645			`nop`
646			`nop`
647			`nop`
648	67	olivier.gi
649	111	olivier.gi	`mov #0x4321, &MPYS`
650			`mov #0x8765, &OP2`
651			`nop`
652			`mov &MPY, r10`
653			`mov &MPYS, r11`
654			`mov &MAC, r12`
655			`mov &MACS, r13`
656			`mov &OP2, r14`
657			`nop`
658			`mov #0x0002, r15`
659			`nop`
660			`nop`
661			`nop`
662			`nop`
663
664			`mov #0x9ABC, &MAC`
665			`mov #0xDEF0, &OP2`
666			`nop`
667			`mov &MPY, r10`
668			`mov &MPYS, r11`
669			`mov &MAC, r12`
670			`mov &MACS, r13`
671			`mov &OP2, r14`
672			`nop`
673			`mov #0x0003, r15`
674			`nop`
675			`nop`
676			`nop`
677			`nop`
678
679			`mov #0xCBA9, &MACS`
680			`mov #0x0FED, &OP2`
681			`nop`
682			`mov &MPY, r10`
683			`mov &MPYS, r11`
684			`mov &MAC, r12`
685			`mov &MACS, r13`
686			`mov &OP2, r14`
687			`nop`
688			`mov #0x0004, r15`
689			`nop`
690			`nop`
691			`nop`
692			`nop`
693
694	186	olivier.gi	`/* -------------- 8-BIT RD/WR ACCESS OPERANDS --------------- */`
695
696			`mov #0x1234, &MPY`
697			`mov &MPY, r10`
698			`mov.b #0xab, &MPY`
699			`mov &MPY, r11`
700			`nop`
701			`mov #0x0001, r15`
702			`nop`
703
704			`mov #0x5678, &MPYS`
705			`mov &MPYS, r10`
706			`mov.b #0xbc, &MPYS`
707			`mov &MPYS, r11`
708			`nop`
709			`mov #0x0002, r15`
710			`nop`
711
712			`mov #0x9abc, &MAC`
713			`mov &MAC, r10`
714			`mov.b #0xde, &MAC`
715			`mov &MAC, r11`
716			`nop`
717			`mov #0x0003, r15`
718			`nop`
719
720			`mov #0xdef0, &MACS`
721			`mov &MACS, r10`
722			`mov.b #0xed, &MACS`
723			`mov &MACS, r11`
724			`nop`
725			`mov #0x0004, r15`
726			`nop`
727
728			`mov #0x4321, &OP2`
729			`mov &OP2, r10`
730			`mov.b #0xdc, &OP2`
731			`mov &OP2, r11`
732			`nop`
733			`mov #0x0005, r15`
734			`nop`
735
736			`mov #0x8765, &RESLO`
737			`mov &RESLO, r10`
738			`mov.b #0xcb, &RESLO`
739			`mov &RESLO, r11`
740			`nop`
741			`mov #0x0006, r15`
742			`nop`
743
744			`mov #0xcba9, &RESHI`
745			`mov &RESHI, r10`
746			`mov.b #0xba, &RESHI`
747			`mov &RESHI, r11`
748			`nop`
749			`mov #0x0007, r15`
750			`nop`
751
752
753	67	olivier.gi	`/* ---------------------- END OF TEST --------------- */`
754			`end_of_test:`
755			`nop`
756			`br #0xffff`
757
758
759
760
761			`/* ---------------------- INTERRUPT VECTORS --------------- */`
762
763			`.section .vectors, "a"`
764			`.word end_of_test ; Interrupt 0 (lowest priority)`
765			`.word end_of_test ; Interrupt 1`
766			`.word end_of_test ; Interrupt 2`
767			`.word end_of_test ; Interrupt 3`
768			`.word end_of_test ; Interrupt 4`
769			`.word end_of_test ; Interrupt 5`
770			`.word end_of_test ; Interrupt 6`
771			`.word end_of_test ; Interrupt 7`
772			`.word end_of_test ; Interrupt 8`
773			`.word end_of_test ; Interrupt 9`
774			`.word end_of_test ; Interrupt 10 Watchdog timer`
775			`.word end_of_test ; Interrupt 11`
776			`.word end_of_test ; Interrupt 12`
777			`.word end_of_test ; Interrupt 13`
778			`.word end_of_test ; Interrupt 14 NMI`
779			`.word main ; Interrupt 15 (highest priority) RESET`