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olivier.gi |
/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/*===========================================================================*/
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/* HARDWARE MULTIPLIER */
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/*---------------------------------------------------------------------------*/
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/* Test the hardware multiplier: */
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/* - MACS mode. */
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/* */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/*---------------------------------------------------------------------------*/
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/* $Rev: 18 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $ */
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/*===========================================================================*/
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`define NO_TIMEOUT
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integer i;
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reg signed [31:0] result;
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wire signed [15:0] r8_s = r8;
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wire signed [15:0] r9_s = r9;
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initial
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begin
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$display(" ===============================================");
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$display("| START SIMULATION |");
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$display(" ===============================================");
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repeat(5) @(posedge mclk);
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stimulus_done = 0;
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i = 0;
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for ( i=0; i < 'h10000; i=i+1)
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begin
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@(r15);
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result = r8_s*r9_s;
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result = 32'hC000_0000 + result;
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if (r10 !== result[15:0])
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begin
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$display("ERROR: OP1 = 0x%h / OP2 = 0x%h", r8, r9);
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$display("ERROR: Result is: SUMEXT = 0x%h / RESHI = 0x%h / RESLO = 0x%h", r12, r11, r10);
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$display("ERROR: Expected : SUMEXT = 0x%h / RESHI = 0x%h / RESLO = 0x%h", {16{result[31]}}, result[31:16], result[15:0]);
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tb_error("====== SIGNED MULTIPLY ACCUMULATE: RESLO =====");
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end
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if (r11 !== result[31:16])
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begin
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$display("ERROR: OP1 = 0x%h / OP2 = 0x%h", r8, r9);
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$display("ERROR: Result is: SUMEXT = 0x%h / RESHI = 0x%h / RESLO = 0x%h", r12, r11, r10);
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$display("ERROR: Expected : SUMEXT = 0x%h / RESHI = 0x%h / RESLO = 0x%h", {16{result[31]}}, result[31:16], result[15:0]);
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tb_error("====== SIGNED MULTIPLY ACCUMULATE: RESHI =====");
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end
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if (r12 !== {16{result[31]}})
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begin
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$display("ERROR: OP1 = 0x%h / OP2 = 0x%h", r8, r9);
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$display("ERROR: Result is: SUMEXT = 0x%h / RESHI = 0x%h / RESLO = 0x%h", r12, r11, r10);
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$display("ERROR: Expected : SUMEXT = 0x%h / RESHI = 0x%h / RESLO = 0x%h", {16{result[31]}}, result[31:16], result[15:0]);
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tb_error("====== SIGNED MULTIPLY ACCUMULATE: SUMEXT =====");
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end
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if (r15[7:0]==8'h00)
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$display("OP2 = 0x%h done", r9);
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end
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stimulus_done = 1;
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end
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