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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                 SINGLE-OPERAND ARITHMETIC: CALL  INSTRUCTION              */
/*---------------------------------------------------------------------------*/
/* Test the CALL  instruction.                                               */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
/*===========================================================================*/
 
.set    DMEM_BASE, (__data_start     )
.set    DMEM_200,  (__data_start+0x00)
.set    DMEM_250,  (__data_start+0x50)
.set    DMEM_252,  (__data_start+0x52)
.set    DMEM_300,  (__data_start+0x100)
 
.set    WDTCTL, 0x0120
.set    IE1,    0x0000
.set    IFG1,   0x0002
 
.global main
 
.macro LPM4
 bis    #0x00F0, r2
.endm
.macro LPM4_exit
 bic    #0x00F0, @r1
.endm
 
 
main:
        mov   #DMEM_250, r1   ;# Initialize stack & Enable interrupts
        eint
 
        mov     #0x0000, r6   ;# R6 will be incremented with every NMI serviced interrupts
        mov     #0x0000, r7   ;# Save Status register in NMI service routine
        mov     #0x0000, r8   ;# Save Stack register in NMI service routine
 
        ;# Test NMI disabled
        ;#-----------------------
        mov     #0x1000, r15
 
        mov.b   &IFG1,   r14 	;# Check reset value
        mov     #0x1001, r15
 
        LPM4
 
        mov     #0x0100, r9     ;# Wait a while while .v stimulus plays with NMI pin
   wait_loop_nmi_dis:
        dec     r9
        jnz     wait_loop_nmi_dis
 
        mov.b   &IFG1,   r13    ;# Check the flag
        bic.b   #0x10,   &IFG1
        mov.b   &IFG1,   r12
        nop
        nop
        nop
        nop
        mov.b   &IFG1,   r11    ;# Wait a while and re-check the flag
 
        mov     #0x1002, r15
 
 
        ;# Test NMI rising edge
        ;#-----------------------
        mov     #0x2000, r15
 
        mov     #0x5a00, &WDTCTL  ; NMI Edge selection: rising
        bic.b   #0x10,   &IFG1    ; Clear NMI flag
        bis.b   #0x10,   &IE1     ; Enable NMI
 
        mov     #0x2001, r15
 
        LPM4
 
        mov     #0x0100, r9     ;# Wait a while
   wait_loop_nmi_re:
        dec     r9
        jnz     wait_loop_nmi_re
 
 
        ;# Test NMI falling edge
        ;#-----------------------
        mov     #0x3000, r15
 
        bic.b   #0x10,   &IE1     ; Disable NMI
        mov     #0x5a40, &WDTCTL  ; NMI Edge selection: falling
        bic.b   #0x10,   &IFG1    ; Clear NMI flag
        bis.b   #0x10,   &IE1     ; Enable NMI
        mov     #0x0000, r6
 
        mov     #0x3001, r15
 
        LPM4
 
        mov     #0x0100, r9     ;# Wait a while
   wait_loop_nmi_fe:
        dec     r9
        jnz     wait_loop_nmi_fe
 
 
        ;# Test NMI nested in maskable IRQ
        ;#---------------------------------
        mov     #0x4000, r15
 
        bic.b   #0x10,   &IE1     ; Disable NMI
        mov     #0x5a00, &WDTCTL  ; NMI Edge selection: rising
        bic.b   #0x10,   &IFG1    ; Clear NMI flag
        bis.b   #0x10,   &IE1     ; Enable NMI
        mov     #0x0000, r6
 
        mov     #0x4001, r15
 
        LPM4
 
        mov     #0x0100, r9     ;# Wait a while
   wait_loop_nmi_nested:
        dec     r9
        jnz     wait_loop_nmi_nested
 
        mov     #0x4002, r15
 
        /* ----------------------    END OF TEST   --------------- */
end_of_test:
        nop
        br #0xffff
 
 
 
        /* ----------------------    FUNCTIONS    --------------- */
 
IRQ00_ROUTINE:
        mov #0x5678, r10
        add      r6, r10    ; If NMI was taken before, 1 will be added to R10
        LPM4_exit
        reti
 
NMI_ROUTINE:
        mov #0x1234, r10
        inc          r6     ; Increment R6
        cmp      #2, r6
        jl   end_of_nmi
        LPM4_exit
    end_of_nmi:
        mov       r2, r7    ; Save Status register
        mov       r1, r8    ; Save Stack register
        bic.b  #0x10, &IFG1 ; Clear NMI flag
        bis.b  #0x10, &IE1  ; Enable NMI
        reti
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
.section .vectors, "a"
.word IRQ00_ROUTINE     ; Interrupt  0 (lowest priority)    
.word end_of_test       ; Interrupt  1                      
.word end_of_test       ; Interrupt  2                      
.word end_of_test       ; Interrupt  3                      
.word end_of_test       ; Interrupt  4                      
.word end_of_test       ; Interrupt  5                      
.word end_of_test       ; Interrupt  6                      
.word end_of_test       ; Interrupt  7                      
.word end_of_test       ; Interrupt  8                      
.word end_of_test       ; Interrupt  9                      
.word end_of_test       ; Interrupt 10                      Watchdog timer
.word end_of_test       ; Interrupt 11                      
.word end_of_test       ; Interrupt 12                      
.word end_of_test       ; Interrupt 13                      
.word NMI_ROUTINE       ; Interrupt 14                      NMI
.word main              ; Interrupt 15 (highest priority)   RESET

Line No.	Rev	Author	Line
1	134	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24			`/* SINGLE-OPERAND ARITHMETIC: CALL INSTRUCTION */`
25			`/---------------------------------------------------------------------------/`
26			`/* Test the CALL instruction. */`
27			`/* */`
28			`/* Author(s): */`
29			`/* - Olivier Girard, olgirard@gmail.com */`
30			`/* */`
31			`/---------------------------------------------------------------------------/`
32			`/* $Rev: 19 $ */`
33			`/* $LastChangedBy: olivier.girard $ */`
34			`/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */`
35			`/===========================================================================/`
36
37			`.set DMEM_BASE, (__data_start )`
38			`.set DMEM_200, (__data_start+0x00)`
39			`.set DMEM_250, (__data_start+0x50)`
40			`.set DMEM_252, (__data_start+0x52)`
41			`.set DMEM_300, (__data_start+0x100)`
42
43			`.set WDTCTL, 0x0120`
44			`.set IE1, 0x0000`
45			`.set IFG1, 0x0002`
46
47			`.global main`
48
49			`.macro LPM4`
50			`bis #0x00F0, r2`
51			`.endm`
52			`.macro LPM4_exit`
53			`bic #0x00F0, @r1`
54			`.endm`
55
56
57			`main:`
58			`mov #DMEM_250, r1 ;# Initialize stack & Enable interrupts`
59			`eint`
60
61			`mov #0x0000, r6 ;# R6 will be incremented with every NMI serviced interrupts`
62			`mov #0x0000, r7 ;# Save Status register in NMI service routine`
63			`mov #0x0000, r8 ;# Save Stack register in NMI service routine`
64
65			`;# Test NMI disabled`
66			`;#-----------------------`
67			`mov #0x1000, r15`
68
69			`mov.b &IFG1, r14 ;# Check reset value`
70			`mov #0x1001, r15`
71
72			`LPM4`
73
74			`mov #0x0100, r9 ;# Wait a while while .v stimulus plays with NMI pin`
75			`wait_loop_nmi_dis:`
76			`dec r9`
77			`jnz wait_loop_nmi_dis`
78
79			`mov.b &IFG1, r13 ;# Check the flag`
80			`bic.b #0x10, &IFG1`
81			`mov.b &IFG1, r12`
82			`nop`
83			`nop`
84			`nop`
85			`nop`
86			`mov.b &IFG1, r11 ;# Wait a while and re-check the flag`
87
88			`mov #0x1002, r15`
89
90
91			`;# Test NMI rising edge`
92			`;#-----------------------`
93			`mov #0x2000, r15`
94
95			`mov #0x5a00, &WDTCTL ; NMI Edge selection: rising`
96			`bic.b #0x10, &IFG1 ; Clear NMI flag`
97			`bis.b #0x10, &IE1 ; Enable NMI`
98
99			`mov #0x2001, r15`
100
101			`LPM4`
102
103			`mov #0x0100, r9 ;# Wait a while`
104			`wait_loop_nmi_re:`
105			`dec r9`
106			`jnz wait_loop_nmi_re`
107
108
109			`;# Test NMI falling edge`
110			`;#-----------------------`
111			`mov #0x3000, r15`
112
113			`bic.b #0x10, &IE1 ; Disable NMI`
114			`mov #0x5a40, &WDTCTL ; NMI Edge selection: falling`
115			`bic.b #0x10, &IFG1 ; Clear NMI flag`
116			`bis.b #0x10, &IE1 ; Enable NMI`
117			`mov #0x0000, r6`
118
119			`mov #0x3001, r15`
120
121			`LPM4`
122
123			`mov #0x0100, r9 ;# Wait a while`
124			`wait_loop_nmi_fe:`
125			`dec r9`
126			`jnz wait_loop_nmi_fe`
127
128
129			`;# Test NMI nested in maskable IRQ`
130			`;#---------------------------------`
131			`mov #0x4000, r15`
132
133			`bic.b #0x10, &IE1 ; Disable NMI`
134			`mov #0x5a00, &WDTCTL ; NMI Edge selection: rising`
135			`bic.b #0x10, &IFG1 ; Clear NMI flag`
136			`bis.b #0x10, &IE1 ; Enable NMI`
137			`mov #0x0000, r6`
138
139			`mov #0x4001, r15`
140
141			`LPM4`
142
143			`mov #0x0100, r9 ;# Wait a while`
144			`wait_loop_nmi_nested:`
145			`dec r9`
146			`jnz wait_loop_nmi_nested`
147
148			`mov #0x4002, r15`
149
150			`/* ---------------------- END OF TEST --------------- */`
151			`end_of_test:`
152			`nop`
153			`br #0xffff`
154
155
156
157			`/* ---------------------- FUNCTIONS --------------- */`
158
159			`IRQ00_ROUTINE:`
160			`mov #0x5678, r10`
161			`add r6, r10 ; If NMI was taken before, 1 will be added to R10`
162			`LPM4_exit`
163			`reti`
164
165			`NMI_ROUTINE:`
166			`mov #0x1234, r10`
167			`inc r6 ; Increment R6`
168			`cmp #2, r6`
169			`jl end_of_nmi`
170			`LPM4_exit`
171			`end_of_nmi:`
172			`mov r2, r7 ; Save Status register`
173			`mov r1, r8 ; Save Stack register`
174			`bic.b #0x10, &IFG1 ; Clear NMI flag`
175			`bis.b #0x10, &IE1 ; Enable NMI`
176			`reti`
177
178
179			`/* ---------------------- INTERRUPT VECTORS --------------- */`
180
181			`.section .vectors, "a"`
182			`.word IRQ00_ROUTINE ; Interrupt 0 (lowest priority)`
183			`.word end_of_test ; Interrupt 1`
184			`.word end_of_test ; Interrupt 2`
185			`.word end_of_test ; Interrupt 3`
186			`.word end_of_test ; Interrupt 4`
187			`.word end_of_test ; Interrupt 5`
188			`.word end_of_test ; Interrupt 6`
189			`.word end_of_test ; Interrupt 7`
190			`.word end_of_test ; Interrupt 8`
191			`.word end_of_test ; Interrupt 9`
192			`.word end_of_test ; Interrupt 10 Watchdog timer`
193			`.word end_of_test ; Interrupt 11`
194			`.word end_of_test ; Interrupt 12`
195			`.word end_of_test ; Interrupt 13`
196			`.word NMI_ROUTINE ; Interrupt 14 NMI`
197			`.word main ; Interrupt 15 (highest priority) RESET`

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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [nmi.s43] - Blame information for rev 134