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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [op_modes_asic.s43] - Blame information for rev 134

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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                            CPU OPERATING MODES                            */
/*---------------------------------------------------------------------------*/
/* Test the CPU Operating modes:                                             */
/*                                 - CPUOFF (<=> R2[4]): turn off CPU.       */
/*                                 - OSCOFF (<=> R2[5]): turn off LFXT_CLK.  */
/*                                 - SCG0   (<=> R2[6]): turn off DCO.       */
/*                                 - SCG1   (<=> R2[7]): turn off SMCLK.     */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
/*===========================================================================*/
 
.global main
 
.set   DMEM_BASE, (__data_start     )
.set   DMEM_200,  (__data_start+0x00)
.set   DMEM_250,  (__data_start+0x50)
 
.set   BCSCTL1, 0x0057
.set   BCSCTL2, 0x0058
 
 
WAIT_FUNC:
        dec r14
        jnz WAIT_FUNC
        ret
 
main:
 
        ; Initialize stack and enable global interrupts
        mov   #DMEM_250, r1
        eint
 
        mov     #0x1000, r15
 
 
        /* -------------- SCG1   (<=> R2[7]): turn off SMCLK --------------- */
 
        mov.b  #0x00, &BCSCTL2  ; # Div /1
 
        mov    #0x0008, r2      ; # SCG1=0 (SMCLK on)
        mov    #0x1001, r15
        mov    #0x0030, r14
        call   #WAIT_FUNC
 
        mov    #0x0088, r2      ; # SCG1=1 (SMCLK off)
        mov    #0x1002, r15
        mov    #0x0030, r14
        call   #WAIT_FUNC
 
        mov    #0x1003, r15     ; # SCG1=1 (SMCLK off) with IRQ PORT2 (extiting power mode)
        mov    #0x0030, r14
        call   #WAIT_FUNC
 
        mov    #0x1004, r15     ; # SCG1=1 (SMCLK off) return from IRQ PORT2
        mov    #0x0030, r14
        call   #WAIT_FUNC
 
        mov    #0x0088, r2      ; # SCG1=1 (SMCLK off)
        mov    #0x1005, r15
        mov    #0x0030, r14
        call   #WAIT_FUNC
 
        mov    #0x1006, r15     ; # SCG1=1 (SMCLK off) with IRQ PORT1 (staying in power mode)
        mov    #0x0030, r14
        call   #WAIT_FUNC
 
        mov    #0x1007, r15     ; # SCG1=1 (SMCLK off) return from IRQ PORT1
        mov    #0x0030, r14
        call   #WAIT_FUNC
 
        mov    #0x0008, r2      ; # SCG1=0 (SMCLK on)
        mov    #0x1008, r15
        mov    #0x0030, r14
        call   #WAIT_FUNC
 
        mov     #0x2000, r15
 
 
        /* -------------- OSCOFF (<=> R2[5]): turn off LFXT1CLK --------------- */
 
        mov.b  #0x00, &BCSCTL1  ; # ACLK Div /1
 
        mov    #0x0008, r2      ; # OSCOFF=0 (ACLK on)
        mov    #0x2001, r15
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
        mov    #0x0028, r2      ; # OSCOFF=1 (ACLK off)
        mov    #0x2002, r15
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
        mov    #0x2003, r15     ; # OSCOFF=1 (ACLK off) with IRQ PORT2 (extiting power mode)
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
        mov    #0x2004, r15     ; # OSCOFF=1 (ACLK off) return from IRQ PORT2
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
        mov    #0x0028, r2      ; # OSCOFF=1 (ACLK off)
        mov    #0x2005, r15
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
        mov    #0x2006, r15     ; # OSCOFF=1 (ACLK off) with IRQ PORT1 (staying in power mode)
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
        mov    #0x2007, r15     ; # OSCOFF=1 (ACLK off) return from IRQ PORT1
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
        mov    #0x0008, r2      ; # OSCOFF=0 (ACLK on)
        mov    #0x2008, r15
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
 
        mov    #0x3000, r15
 
 
        /* -------------- CPUOFF (<=> R2[4]): turn off CPU    --------------- */
 
        mov.b  #0x00, &BCSCTL2  ; # Div /1 --> select DCOCLK
 
        mov    #0x3001, r15
        mov    #0x0008, r2      ; # CPUOFF=0 (CPU on)
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
        mov    #0x3002, r15
        mov    #0x0018, r2      ; # CPUOFF=1 (CPU off)
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
        mov    #0x3003, r15
        mov    #0x0008, r2      ; # CPUOFF=0 (CPU on)
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
 
        mov    #0x4000, r15
 
 
        /* -------------- SCG0 (<=> R2[6]): turn off DCO oscillator  --------------- */
 
        mov.b  #0x00, &BCSCTL2  ; # Div /1 --> select DCOCLK
 
        mov    #0x4001, r15
        mov    #0x0008, r2      ; # SCG0=0 (DCO on)
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
        mov    #0x4002, r15
        mov    #0x0048, r2      ; # SCG0=1 (DCO off)
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
        mov    #0x4003, r15
        mov    #0x0008, r2      ; # SCG0=0 (DCO on)
        mov    #0x0060, r14
        call   #WAIT_FUNC
 
 
        mov    #0x5000, r15
 
 
        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff
 
 
        /* ----------------------      INTERRUPT ROUTINES    --------------- */
 
PORT1_VECTOR:
        push       r13
        push       r14
        mov    #0x0060, r14
        call   #WAIT_FUNC
        mov    #0xaaaa, r13
        pop        r14
        pop        r13
        reti
 
PORT2_VECTOR:
        push       r13
        push       r14
        mov    #0x0060, r14
        call   #WAIT_FUNC
        mov    #0xbbbb, r13
        pop        r14
        pop        r13
        bic    #0xf0, 0(r1) ;exit all lowpower mode
        reti
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    
.word end_of_test  ; Interrupt  1                      
.word PORT1_VECTOR ; Interrupt  2                      
.word PORT2_VECTOR ; Interrupt  3                      
.word end_of_test  ; Interrupt  4                      
.word end_of_test  ; Interrupt  5                      
.word end_of_test  ; Interrupt  6                      
.word end_of_test  ; Interrupt  7                      
.word end_of_test  ; Interrupt  8                      
.word end_of_test  ; Interrupt  9                      
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      
.word end_of_test  ; Interrupt 12                      
.word end_of_test  ; Interrupt 13                      
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET

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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [op_modes_asic.s43] - Blame information for rev 134

Line No.	Rev	Author	Line
1	134	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24			`/* CPU OPERATING MODES */`
25			`/---------------------------------------------------------------------------/`
26			`/* Test the CPU Operating modes: */`
27			`/* - CPUOFF (<=> R2[4]): turn off CPU. */`
28			`/* - OSCOFF (<=> R2[5]): turn off LFXT_CLK. */`
29			`/* - SCG0 (<=> R2[6]): turn off DCO. */`
30			`/* - SCG1 (<=> R2[7]): turn off SMCLK. */`
31			`/* */`
32			`/* Author(s): */`
33			`/* - Olivier Girard, olgirard@gmail.com */`
34			`/* */`
35			`/---------------------------------------------------------------------------/`
36			`/* $Rev: 19 $ */`
37			`/* $LastChangedBy: olivier.girard $ */`
38			`/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */`
39			`/===========================================================================/`
40
41			`.global main`
42
43			`.set DMEM_BASE, (__data_start )`
44			`.set DMEM_200, (__data_start+0x00)`
45			`.set DMEM_250, (__data_start+0x50)`
46
47			`.set BCSCTL1, 0x0057`
48			`.set BCSCTL2, 0x0058`
49
50
51			`WAIT_FUNC:`
52			`dec r14`
53			`jnz WAIT_FUNC`
54			`ret`
55
56			`main:`
57
58			`; Initialize stack and enable global interrupts`
59			`mov #DMEM_250, r1`
60			`eint`
61
62			`mov #0x1000, r15`
63
64
65			`/* -------------- SCG1 (<=> R2[7]): turn off SMCLK --------------- */`
66
67			`mov.b #0x00, &BCSCTL2 ; # Div /1`
68
69			`mov #0x0008, r2 ; # SCG1=0 (SMCLK on)`
70			`mov #0x1001, r15`
71			`mov #0x0030, r14`
72			`call #WAIT_FUNC`
73
74			`mov #0x0088, r2 ; # SCG1=1 (SMCLK off)`
75			`mov #0x1002, r15`
76			`mov #0x0030, r14`
77			`call #WAIT_FUNC`
78
79			`mov #0x1003, r15 ; # SCG1=1 (SMCLK off) with IRQ PORT2 (extiting power mode)`
80			`mov #0x0030, r14`
81			`call #WAIT_FUNC`
82
83			`mov #0x1004, r15 ; # SCG1=1 (SMCLK off) return from IRQ PORT2`
84			`mov #0x0030, r14`
85			`call #WAIT_FUNC`
86
87			`mov #0x0088, r2 ; # SCG1=1 (SMCLK off)`
88			`mov #0x1005, r15`
89			`mov #0x0030, r14`
90			`call #WAIT_FUNC`
91
92			`mov #0x1006, r15 ; # SCG1=1 (SMCLK off) with IRQ PORT1 (staying in power mode)`
93			`mov #0x0030, r14`
94			`call #WAIT_FUNC`
95
96			`mov #0x1007, r15 ; # SCG1=1 (SMCLK off) return from IRQ PORT1`
97			`mov #0x0030, r14`
98			`call #WAIT_FUNC`
99
100			`mov #0x0008, r2 ; # SCG1=0 (SMCLK on)`
101			`mov #0x1008, r15`
102			`mov #0x0030, r14`
103			`call #WAIT_FUNC`
104
105			`mov #0x2000, r15`
106
107
108			`/* -------------- OSCOFF (<=> R2[5]): turn off LFXT1CLK --------------- */`
109
110			`mov.b #0x00, &BCSCTL1 ; # ACLK Div /1`
111
112			`mov #0x0008, r2 ; # OSCOFF=0 (ACLK on)`
113			`mov #0x2001, r15`
114			`mov #0x0060, r14`
115			`call #WAIT_FUNC`
116
117			`mov #0x0028, r2 ; # OSCOFF=1 (ACLK off)`
118			`mov #0x2002, r15`
119			`mov #0x0060, r14`
120			`call #WAIT_FUNC`
121
122			`mov #0x2003, r15 ; # OSCOFF=1 (ACLK off) with IRQ PORT2 (extiting power mode)`
123			`mov #0x0060, r14`
124			`call #WAIT_FUNC`
125
126			`mov #0x2004, r15 ; # OSCOFF=1 (ACLK off) return from IRQ PORT2`
127			`mov #0x0060, r14`
128			`call #WAIT_FUNC`
129
130			`mov #0x0028, r2 ; # OSCOFF=1 (ACLK off)`
131			`mov #0x2005, r15`
132			`mov #0x0060, r14`
133			`call #WAIT_FUNC`
134
135			`mov #0x2006, r15 ; # OSCOFF=1 (ACLK off) with IRQ PORT1 (staying in power mode)`
136			`mov #0x0060, r14`
137			`call #WAIT_FUNC`
138
139			`mov #0x2007, r15 ; # OSCOFF=1 (ACLK off) return from IRQ PORT1`
140			`mov #0x0060, r14`
141			`call #WAIT_FUNC`
142
143			`mov #0x0008, r2 ; # OSCOFF=0 (ACLK on)`
144			`mov #0x2008, r15`
145			`mov #0x0060, r14`
146			`call #WAIT_FUNC`
147
148
149			`mov #0x3000, r15`
150
151
152			`/* -------------- CPUOFF (<=> R2[4]): turn off CPU --------------- */`
153
154			`mov.b #0x00, &BCSCTL2 ; # Div /1 --> select DCOCLK`
155
156			`mov #0x3001, r15`
157			`mov #0x0008, r2 ; # CPUOFF=0 (CPU on)`
158			`mov #0x0060, r14`
159			`call #WAIT_FUNC`
160
161			`mov #0x3002, r15`
162			`mov #0x0018, r2 ; # CPUOFF=1 (CPU off)`
163			`mov #0x0060, r14`
164			`call #WAIT_FUNC`
165
166			`mov #0x3003, r15`
167			`mov #0x0008, r2 ; # CPUOFF=0 (CPU on)`
168			`mov #0x0060, r14`
169			`call #WAIT_FUNC`
170
171
172			`mov #0x4000, r15`
173
174
175			`/* -------------- SCG0 (<=> R2[6]): turn off DCO oscillator --------------- */`
176
177			`mov.b #0x00, &BCSCTL2 ; # Div /1 --> select DCOCLK`
178
179			`mov #0x4001, r15`
180			`mov #0x0008, r2 ; # SCG0=0 (DCO on)`
181			`mov #0x0060, r14`
182			`call #WAIT_FUNC`
183
184			`mov #0x4002, r15`
185			`mov #0x0048, r2 ; # SCG0=1 (DCO off)`
186			`mov #0x0060, r14`
187			`call #WAIT_FUNC`
188
189			`mov #0x4003, r15`
190			`mov #0x0008, r2 ; # SCG0=0 (DCO on)`
191			`mov #0x0060, r14`
192			`call #WAIT_FUNC`
193
194
195			`mov #0x5000, r15`
196
197
198			`/* ---------------------- END OF TEST --------------- */`
199			`end_of_test:`
200			`nop`
201			`br #0xffff`
202
203
204			`/* ---------------------- INTERRUPT ROUTINES --------------- */`
205
206			`PORT1_VECTOR:`
207			`push r13`
208			`push r14`
209			`mov #0x0060, r14`
210			`call #WAIT_FUNC`
211			`mov #0xaaaa, r13`
212			`pop r14`
213			`pop r13`
214			`reti`
215
216			`PORT2_VECTOR:`
217			`push r13`
218			`push r14`
219			`mov #0x0060, r14`
220			`call #WAIT_FUNC`
221			`mov #0xbbbb, r13`
222			`pop r14`
223			`pop r13`
224			`bic #0xf0, 0(r1) ;exit all lowpower mode`
225			`reti`
226
227
228			`/* ---------------------- INTERRUPT VECTORS --------------- */`
229
230			`.section .vectors, "a"`
231			`.word end_of_test ; Interrupt 0 (lowest priority)`
232			`.word end_of_test ; Interrupt 1`
233			`.word PORT1_VECTOR ; Interrupt 2`
234			`.word PORT2_VECTOR ; Interrupt 3`
235			`.word end_of_test ; Interrupt 4`
236			`.word end_of_test ; Interrupt 5`
237			`.word end_of_test ; Interrupt 6`
238			`.word end_of_test ; Interrupt 7`
239			`.word end_of_test ; Interrupt 8`
240			`.word end_of_test ; Interrupt 9`
241			`.word end_of_test ; Interrupt 10 Watchdog timer`
242			`.word end_of_test ; Interrupt 11`
243			`.word end_of_test ; Interrupt 12`
244			`.word end_of_test ; Interrupt 13`
245			`.word end_of_test ; Interrupt 14 NMI`
246			`.word main ; Interrupt 15 (highest priority) RESET`