OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sfr.s43] - Blame information for rev 219

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 134 olivier.gi
/*===========================================================================*/
2
/* Copyright (C) 2001 Authors                                                */
3
/*                                                                           */
4
/* This source file may be used and distributed without restriction provided */
5
/* that this copyright statement is not removed from the file and that any   */
6
/* derivative work contains the original copyright notice and the associated */
7
/* disclaimer.                                                               */
8
/*                                                                           */
9
/* This source file is free software; you can redistribute it and/or modify  */
10
/* it under the terms of the GNU Lesser General Public License as published  */
11
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12
/* (at your option) any later version.                                       */
13
/*                                                                           */
14
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17
/* License for more details.                                                 */
18
/*                                                                           */
19
/* You should have received a copy of the GNU Lesser General Public License  */
20
/* along with this source; if not, write to the Free Software Foundation,    */
21
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22
/*                                                                           */
23
/*===========================================================================*/
24
/*                  Special Function Registers (SFRs)                        */
25
/*---------------------------------------------------------------------------*/
26
/* Test the SFR registers.                                                   */
27
/*                                                                           */
28
/* Author(s):                                                                */
29
/*             - Olivier Girard,    olgirard@gmail.com                       */
30
/*                                                                           */
31
/*---------------------------------------------------------------------------*/
32
/* $Rev: 19 $                                                                */
33
/* $LastChangedBy: olivier.girard $                                          */
34
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
35
/*===========================================================================*/
36
 
37 141 olivier.gi
.include "pmem_defs.asm"
38
 
39 134 olivier.gi
.global main
40
 
41
main:
42
 
43
        /* -------   NMI             ------ */
44
 
45
        mov   #0x1000, r15
46
 
47
        ;; NMI feature is verified in the NMI.S43 test
48
 
49
        mov   #0x1001, r15
50
 
51
 
52
        /* -------   WATCHDOG        ------ */
53
 
54
        mov   #0x2000, r15
55
 
56
        ;; WATCHDOG feature is verified in the WDT_*.S43 tests
57
        mov   #0x5a90, &WDTCTL	  ;# Enable interval mode & disable timer
58
 
59
        mov   #0x2001, r15
60
 
61
 
62
        /* -------   READ/WRITE IFG1       ------ */
63
 
64
        mov   #0x3000, r15
65
 
66
        mov   &IFG1,   r10
67
        mov   #0x3001, r15
68
 
69
        mov   #0x5555, &IFG1
70
        mov   &IFG1,   r10
71
        mov   #0x3002, r15
72
 
73
        mov   #0xAAAA, &IFG1
74
        mov   &IFG1,   r10
75
        mov   #0x3003, r15
76
 
77
        mov.b #0x55,   &IFG1
78
        mov.b &IFG1,   r10
79
        mov   #0x3004, r15
80
 
81
        mov.b #0xAA,    &IFG1_HI
82
        mov.b &IFG1_HI, r10
83
        mov   #0x3005,  r15
84
 
85
        mov   #0x0000, &IFG1
86
        mov   &IFG1,   r10
87
        mov   #0x3006, r15
88
 
89
 
90
        /* -------   READ/WRITE IE1         ------ */
91
 
92
        mov   #0x4000, r15
93
 
94
        mov   &IE1,    r10
95
        mov   #0x4001, r15
96
 
97
        mov   #0x5555, &IE1
98
        mov   &IE1,    r10
99
        mov   #0x4002, r15
100
 
101
        mov   #0xAAAA, &IE1
102
        mov   &IE1,    r10
103
        mov   #0x4003, r15
104
 
105
        mov.b #0x55,   &IE1
106
        mov.b &IE1,    r10
107
        mov   #0x4004, r15
108
 
109
        mov.b #0xAA,    &IE1_HI
110
        mov.b &IE1_HI,  r10
111
        mov   #0x4005,  r15
112
 
113
        mov   #0x0000, &IE1
114
        mov   &IE1,    r10
115
        mov   #0x4006, r15
116
 
117
 
118
        /* -------   READ/WRITE CPU_ID     ------ */
119
 
120
        mov   #0x5000, r15
121
 
122
        mov   &CPU_ID_LO, r10
123
        mov   &CPU_ID_HI, r11
124
        mov   #0x5001, r15
125
 
126 149 olivier.gi
        mov   0x5554,     &CPU_ID_LO
127 134 olivier.gi
        mov   0xAAAA,     &CPU_ID_HI
128
        mov   &CPU_ID_LO, r10
129
        mov   &CPU_ID_HI, r11
130
        mov   #0x5002, r15
131
 
132
        mov   0xAAAA,     &CPU_ID_LO
133 149 olivier.gi
        mov   0x5554,     &CPU_ID_HI
134 134 olivier.gi
        mov   &CPU_ID_LO, r10
135
        mov   &CPU_ID_HI, r11
136
        mov   #0x5003, r15
137
 
138
 
139 154 olivier.gi
        /* -------   READ/WRITE CPU_NR     ------ */
140
 
141
        mov   #0x6000, r15
142
 
143
        mov   &CPU_NR, r10
144
        mov   #0x6001, r15
145
 
146
        mov   0x5554,  &CPU_NR
147
        mov   &CPU_NR, r10
148
        mov   #0x6002, r15
149 134 olivier.gi
 
150 154 olivier.gi
        mov   0xAAAA,  &CPU_NR
151
        mov   &CPU_NR, r10
152
        mov   #0x6003, r15
153
 
154
 
155
 
156 134 olivier.gi
        /* ----------------------         END OF TEST        --------------- */
157
end_of_test:
158
        nop
159
        br #0xffff
160
 
161
 
162
 
163
        /* ----------------------         INTERRUPT VECTORS  --------------- */
164
 
165
.section .vectors, "a"
166
.word end_of_test     ; Interrupt  0 (lowest priority)    
167
.word end_of_test     ; Interrupt  1                      
168
.word end_of_test     ; Interrupt  2                      
169
.word end_of_test     ; Interrupt  3                      
170
.word end_of_test     ; Interrupt  4                      
171
.word end_of_test     ; Interrupt  5                      
172
.word end_of_test     ; Interrupt  6                      
173
.word end_of_test     ; Interrupt  7                      
174
.word end_of_test     ; Interrupt  8                      
175
.word end_of_test     ; Interrupt  9                      
176
.word end_of_test     ; Interrupt 10                      Watchdog timer
177
.word end_of_test     ; Interrupt 11                      
178
.word end_of_test     ; Interrupt 12                      
179
.word end_of_test     ; Interrupt 13                      
180
.word end_of_test     ; Interrupt 14                      NMI
181
.word main            ; Interrupt 15 (highest priority)   RESET

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.