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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_push_rom-rd.s43] - Blame information for rev 138

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Line No. Rev Author Line
1 2 olivier.gi
/*===========================================================================*/
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/* Copyright (C) 2001 Authors                                                */
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/*                                                                           */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any   */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer.                                                               */
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/*                                                                           */
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/* This source file is free software; you can redistribute it and/or modify  */
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/* it under the terms of the GNU Lesser General Public License as published  */
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/* by the Free Software Foundation; either version 2.1 of the License, or    */
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/* (at your option) any later version.                                       */
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/*                                                                           */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
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/* License for more details.                                                 */
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/*                                                                           */
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/* You should have received a copy of the GNU Lesser General Public License  */
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/* along with this source; if not, write to the Free Software Foundation,    */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
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/*                                                                           */
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/*===========================================================================*/
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/*                     PUSH:   DATA READ ACCESS FROM ROM                     */
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/*---------------------------------------------------------------------------*/
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/* Test the PUSH instruction with all addressing modes making a read access  */
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/* to the ROM.                                                               */
28 18 olivier.gi
/*                                                                           */
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/* Author(s):                                                                */
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/*             - Olivier Girard,    olgirard@gmail.com                       */
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/*                                                                           */
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/*---------------------------------------------------------------------------*/
33 19 olivier.gi
/* $Rev: 111 $                                                                */
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/* $LastChangedBy: olivier.girard $                                          */
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/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $          */
36 2 olivier.gi
/*===========================================================================*/
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38 111 olivier.gi
.set    DMEM_BASE, (__data_start     )
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.set    DMEM_200,  (__data_start+0x00)
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.set    DMEM_212,  (__data_start+0x12)
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.set    DMEM_216,  (__data_start+0x16)
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.set    DMEM_21A,  (__data_start+0x1A)
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.set    DMEM_21E,  (__data_start+0x1E)
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.set    DMEM_220,  (__data_start+0x20)
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.set    DMEM_222,  (__data_start+0x22)
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.set    DMEM_224,  (__data_start+0x24)
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.set    DMEM_230,  (__data_start+0x30)
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.set    DMEM_240,  (__data_start+0x40)
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.set    DMEM_250,  (__data_start+0x50)
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.set    DMEM_252,  (__data_start+0x52)
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.set    DMEM_300,  (__data_start+0x100)
52 2 olivier.gi
 
53 111 olivier.gi
 
54 2 olivier.gi
.global main
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main:
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        /* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
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        # Initialization
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        #------------------------
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        mov     #0x0020, r4        ;# Initialize RAM
63 111 olivier.gi
        mov   #DMEM_230, r5
64 2 olivier.gi
clear_mem_loop:
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        clr    0(r5)
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        incd     r5
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        dec      r4
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        jnz     clear_mem_loop
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71 111 olivier.gi
        mov   #DMEM_252, r1        ;# Initialize stack pointer
72 2 olivier.gi
 
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        mov     #0x1000, r15
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        # Addressing mode: @Rn
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        #------------------------
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        mov     #data_aRn_0x1234, r4
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        push                     @r4           ;# PUSH (0x1234  =>  @=0x0250)
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        mov     #data_aRn_0x5678, r6
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        push                     @r6           ;# PUSH (0x5678  =>  @=0x024E)
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        mov              #0x2000, r15
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        # Addressing mode: @Rn+
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        #------------------------
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        mov     #data_aRni_0x9abc, r4
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        push                      @r4+         ;# PUSH (0x9abc  =>  @=0x024C)
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        push                      @r4+         ;# PUSH (0xdef0  =>  @=0x024A)
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        mov     #0x3000, r15
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        # Addressing mode: X(Rn)
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        #------------------------
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        mov     #data_xRn_0x0fed, r4
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        push                   26(r4)          ;# PUSH (0x0fed  =>  @=0x0248)
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        push                   28(r4)          ;# PUSH (0xcba9  =>  @=0x0246)
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        mov     #0x4000, r15
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        # Addressing mode: EDE
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        #------------------------
111 111 olivier.gi
.set   EDE_21E,  DMEM_21E
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.set   EDE_220,  DMEM_220
113 2 olivier.gi
 
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        push    data_EDE_0x8765                ;# PUSH (0x8765  =>  @=0x0244)
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        push    data_EDE_0x4321                ;# PUSH (0x4321  =>  @=0x0242)
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        mov     #0x5000, r15
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        # Addressing mode: &EDE
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        #------------------------
122 111 olivier.gi
.set   aEDE_222,  DMEM_222
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.set   aEDE_224,  DMEM_224
124 2 olivier.gi
 
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        push  &data_aEDE_0x1f2e                ;# PUSH (0x1f2e  =>  @=0x0240)
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        push  &data_aEDE_0x3d4c                ;# PUSH (0x3d4c  =>  @=0x023E)
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        mov     #0x6000, r15
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        /* ----------------------         END OF TEST        --------------- */
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end_of_test:
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        nop
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        br #0xffff
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        /* ----------------------            DATA TABLE      --------------- */
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data_aRn_0x1234:
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        .word 0x1234
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data_aRn_0x5678:
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        .word 0x5678
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data_aRni_0x9abc:
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        .word 0x9abc
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        .word 0xdef0
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data_xRn_0x0fed:
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        .word 0x0000
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        .word 0x0000
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        .word 0x0000
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        .word 0x0000
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        .word 0x0000
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        .word 0x0000
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        .word 0x0000
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        .word 0x0000
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        .word 0x0000
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        .word 0x0000
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        .word 0x0000
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        .word 0x0000
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        .word 0x0000
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        .word 0x0fed
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        .word 0xcba9
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data_EDE_0x8765:
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        .word 0x8765
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data_EDE_0x4321:
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        .word 0x4321
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data_aEDE_0x1f2e:
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        .word 0x1f2e
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data_aEDE_0x3d4c:
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        .word 0x3d4c
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        /* ----------------------         INTERRUPT VECTORS  --------------- */
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.section .vectors, "a"
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.word end_of_test  ; Interrupt  0 (lowest priority)    
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.word end_of_test  ; Interrupt  1                      
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.word end_of_test  ; Interrupt  2                      
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.word end_of_test  ; Interrupt  3                      
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.word end_of_test  ; Interrupt  4                      
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.word end_of_test  ; Interrupt  5                      
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.word end_of_test  ; Interrupt  6                      
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.word end_of_test  ; Interrupt  7                      
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.word end_of_test  ; Interrupt  8                      
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.word end_of_test  ; Interrupt  9                      
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.word end_of_test  ; Interrupt 10                      Watchdog timer
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.word end_of_test  ; Interrupt 11                      
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.word end_of_test  ; Interrupt 12                      
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.word end_of_test  ; Interrupt 13                      
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.word end_of_test  ; Interrupt 14                      NMI
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.word main         ; Interrupt 15 (highest priority)   RESET

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