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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_push_rom-rd.v] - Blame information for rev 111

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Line No. Rev Author Line
1 2 olivier.gi 
/*===========================================================================*/
2 
/* Copyright (C) 2001 Authors                                                */
3 
/*                                                                           */
4 
/* This source file may be used and distributed without restriction provided */
5 
/* that this copyright statement is not removed from the file and that any   */
6 
/* derivative work contains the original copyright notice and the associated */
7 
/* disclaimer.                                                               */
8 
/*                                                                           */
9 
/* This source file is free software; you can redistribute it and/or modify  */
10 
/* it under the terms of the GNU Lesser General Public License as published  */
11 
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12 
/* (at your option) any later version.                                       */
13 
/*                                                                           */
14 
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15 
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16 
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17 
/* License for more details.                                                 */
18 
/*                                                                           */
19 
/* You should have received a copy of the GNU Lesser General Public License  */
20 
/* along with this source; if not, write to the Free Software Foundation,    */
21 
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22 
/*                                                                           */
23 
/*===========================================================================*/
24 
/*                     PUSH:   DATA READ ACCESS FROM ROM                     */
25 
/*---------------------------------------------------------------------------*/
26 
/* Test the PUSH instruction with all addressing modes making a read access  */
27 
/* to the ROM.                                                               */
28 18 olivier.gi 
/*                                                                           */
29 
/* Author(s):                                                                */
30 
/*             - Olivier Girard,    olgirard@gmail.com                       */
31 
/*                                                                           */
32 
/*---------------------------------------------------------------------------*/
33 19 olivier.gi 
/* $Rev: 111 $                                                                */
34 
/* $LastChangedBy: olivier.girard $                                          */
35 
/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $          */
36 2 olivier.gi 
/*===========================================================================*/
37 
 
38 
initial
39 
   begin
40 
      $display(" ===============================================");
41 
      $display("|                 START SIMULATION              |");
42 
      $display(" ===============================================");
43 
      repeat(5) @(posedge mclk);
44 
      stimulus_done = 0;
45 
 
46 
      /* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
47 
 
48 
      // Initialization
49 
      @(r15==16'h1000);
50 111 olivier.gi 
      if (r1     !==(`PER_SIZE+16'h0052)) tb_error("====== SP  initialization (R1 value)      =====");
51 2 olivier.gi 
      if (mem250 !==16'h0000) tb_error("====== RAM Initialization (@0x0250 value) =====");
52 
      if (mem24E !==16'h0000) tb_error("====== RAM Initialization (@0x024e value) =====");
53 
      if (mem24C !==16'h0000) tb_error("====== RAM Initialization (@0x024c value) =====");
54 
      if (mem24A !==16'h0000) tb_error("====== RAM Initialization (@0x024a value) =====");
55 
      if (mem248 !==16'h0000) tb_error("====== RAM Initialization (@0x0248 value) =====");
56 
      if (mem246 !==16'h0000) tb_error("====== RAM Initialization (@0x0246 value) =====");
57 
      if (mem244 !==16'h0000) tb_error("====== RAM Initialization (@0x0244 value) =====");
58 
      if (mem242 !==16'h0000) tb_error("====== RAM Initialization (@0x0242 value) =====");
59 
      if (mem240 !==16'h0000) tb_error("====== RAM Initialization (@0x0240 value) =====");
60 
      if (mem23E !==16'h0000) tb_error("====== RAM Initialization (@0x023e value) =====");
61 
      if (mem23C !==16'h0000) tb_error("====== RAM Initialization (@0x023c value) =====");
62 
      if (mem23A !==16'h0000) tb_error("====== RAM Initialization (@0x023a value) =====");
63 
      if (mem238 !==16'h0000) tb_error("====== RAM Initialization (@0x0238 value) =====");
64 
      if (mem236 !==16'h0000) tb_error("====== RAM Initialization (@0x0236 value) =====");
65 
      if (mem234 !==16'h0000) tb_error("====== RAM Initialization (@0x0234 value) =====");
66 
      if (mem232 !==16'h0000) tb_error("====== RAM Initialization (@0x0232 value) =====");
67 
      if (mem230 !==16'h0000) tb_error("====== RAM Initialization (@0x0230 value) =====");
68 
 
69 
 
70 
      // Addressing mode: @Rn
71 
      @(r15==16'h2000);
72 111 olivier.gi 
      if (r1     !==(`PER_SIZE+16'h004E)) tb_error("====== PUSH (@Rn mode): SP value      =====");
73 2 olivier.gi 
      if (mem250 !==16'h1234) tb_error("====== PUSH (@Rn mode): @0x0250 value =====");
74 
      if (mem24E !==16'h5678) tb_error("====== PUSH (@Rn mode): @0x024E value =====");
75 
      if (mem24C !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x024c value =====");
76 
      if (mem24A !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x024a value =====");
77 
      if (mem248 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0248 value =====");
78 
      if (mem246 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0246 value =====");
79 
      if (mem244 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0244 value =====");
80 
      if (mem242 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0242 value =====");
81 
      if (mem240 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0240 value =====");
82 
      if (mem23E !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x023e value =====");
83 
      if (mem23C !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x023c value =====");
84 
      if (mem23A !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x023a value =====");
85 
      if (mem238 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0238 value =====");
86 
      if (mem236 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0236 value =====");
87 
      if (mem234 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0234 value =====");
88 
      if (mem232 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0232 value =====");
89 
      if (mem230 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0230 value =====");
90 
 
91 
 
92 
      // Addressing mode: @Rn+
93 
      @(r15==16'h3000);
94 111 olivier.gi 
      if (r1     !==(`PER_SIZE+16'h004a)) tb_error("====== PUSH (@Rn+ mode): SP value      =====");
95 2 olivier.gi 
      if (mem250 !==16'h1234) tb_error("====== PUSH (@Rn+ mode): @0x0250 value =====");
96 
      if (mem24E !==16'h5678) tb_error("====== PUSH (@Rn+ mode): @0x024E value =====");
97 
      if (mem24C !==16'h9abc) tb_error("====== PUSH (@Rn+ mode): @0x024c value =====");
98 
      if (mem24A !==16'hdef0) tb_error("====== PUSH (@Rn+ mode): @0x024a value =====");
99 
      if (mem248 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0248 value =====");
100 
      if (mem246 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0246 value =====");
101 
      if (mem244 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0244 value =====");
102 
      if (mem242 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0242 value =====");
103 
      if (mem240 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0240 value =====");
104 
      if (mem23E !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x023e value =====");
105 
      if (mem23C !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x023c value =====");
106 
      if (mem23A !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x023a value =====");
107 
      if (mem238 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0238 value =====");
108 
      if (mem236 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0236 value =====");
109 
      if (mem234 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0234 value =====");
110 
      if (mem232 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0232 value =====");
111 
      if (mem230 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0230 value =====");
112 
 
113 
 
114 
      // Addressing mode: X(Rn)
115 
      @(r15==16'h4000);
116 111 olivier.gi 
      if (r1     !==(`PER_SIZE+16'h0046)) tb_error("====== PUSH (X(Rn) mode): SP value      =====");
117 2 olivier.gi 
      if (mem250 !==16'h1234) tb_error("====== PUSH (X(Rn) mode): @0x0250 value =====");
118 
      if (mem24E !==16'h5678) tb_error("====== PUSH (X(Rn) mode): @0x024E value =====");
119 
      if (mem24C !==16'h9abc) tb_error("====== PUSH (X(Rn) mode): @0x024c value =====");
120 
      if (mem24A !==16'hdef0) tb_error("====== PUSH (X(Rn) mode): @0x024a value =====");
121 
      if (mem248 !==16'h0fed) tb_error("====== PUSH (X(Rn) mode): @0x0248 value =====");
122 
      if (mem246 !==16'hcba9) tb_error("====== PUSH (X(Rn) mode): @0x0246 value =====");
123 
      if (mem244 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0244 value =====");
124 
      if (mem242 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0242 value =====");
125 
      if (mem240 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0240 value =====");
126 
      if (mem23E !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x023e value =====");
127 
      if (mem23C !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x023c value =====");
128 
      if (mem23A !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x023a value =====");
129 
      if (mem238 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0238 value =====");
130 
      if (mem236 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0236 value =====");
131 
      if (mem234 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0234 value =====");
132 
      if (mem232 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0232 value =====");
133 
      if (mem230 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0230 value =====");
134 
 
135 
 
136 
      // Addressing mode: EDE
137 
      @(r15==16'h5000);
138 111 olivier.gi 
      if (r1     !==(`PER_SIZE+16'h0042)) tb_error("====== PUSH (EDE mode): SP value      =====");
139 2 olivier.gi 
      if (mem250 !==16'h1234) tb_error("====== PUSH (EDE mode): @0x0250 value =====");
140 
      if (mem24E !==16'h5678) tb_error("====== PUSH (EDE mode): @0x024E value =====");
141 
      if (mem24C !==16'h9abc) tb_error("====== PUSH (EDE mode): @0x024c value =====");
142 
      if (mem24A !==16'hdef0) tb_error("====== PUSH (EDE mode): @0x024a value =====");
143 
      if (mem248 !==16'h0fed) tb_error("====== PUSH (EDE mode): @0x0248 value =====");
144 
      if (mem246 !==16'hcba9) tb_error("====== PUSH (EDE mode): @0x0246 value =====");
145 
      if (mem244 !==16'h8765) tb_error("====== PUSH (EDE mode): @0x0244 value =====");
146 
      if (mem242 !==16'h4321) tb_error("====== PUSH (EDE mode): @0x0242 value =====");
147 
      if (mem240 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0240 value =====");
148 
      if (mem23E !==16'h0000) tb_error("====== PUSH (EDE mode): @0x023e value =====");
149 
      if (mem23C !==16'h0000) tb_error("====== PUSH (EDE mode): @0x023c value =====");
150 
      if (mem23A !==16'h0000) tb_error("====== PUSH (EDE mode): @0x023a value =====");
151 
      if (mem238 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0238 value =====");
152 
      if (mem236 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0236 value =====");
153 
      if (mem234 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0234 value =====");
154 
      if (mem232 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0232 value =====");
155 
      if (mem230 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0230 value =====");
156 
 
157 
 
158 
      // Addressing mode: &EDE
159 
      @(r15==16'h6000);
160 111 olivier.gi 
      if (r1     !==(`PER_SIZE+16'h003E)) tb_error("====== PUSH (&EDE mode): SP value      =====");
161 2 olivier.gi 
      if (mem250 !==16'h1234) tb_error("====== PUSH (&EDE mode): @0x0250 value =====");
162 
      if (mem24E !==16'h5678) tb_error("====== PUSH (&EDE mode): @0x024E value =====");
163 
      if (mem24C !==16'h9abc) tb_error("====== PUSH (&EDE mode): @0x024c value =====");
164 
      if (mem24A !==16'hdef0) tb_error("====== PUSH (&EDE mode): @0x024a value =====");
165 
      if (mem248 !==16'h0fed) tb_error("====== PUSH (&EDE mode): @0x0248 value =====");
166 
      if (mem246 !==16'hcba9) tb_error("====== PUSH (&EDE mode): @0x0246 value =====");
167 
      if (mem244 !==16'h8765) tb_error("====== PUSH (&EDE mode): @0x0244 value =====");
168 
      if (mem242 !==16'h4321) tb_error("====== PUSH (&EDE mode): @0x0242 value =====");
169 
      if (mem240 !==16'h1f2e) tb_error("====== PUSH (&EDE mode): @0x0240 value =====");
170 
      if (mem23E !==16'h3d4c) tb_error("====== PUSH (&EDE mode): @0x023e value =====");
171 
      if (mem23C !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x023c value =====");
172 
      if (mem23A !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x023a value =====");
173 
      if (mem238 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0238 value =====");
174 
      if (mem236 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0236 value =====");
175 
      if (mem234 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0234 value =====");
176 
      if (mem232 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0232 value =====");
177 
      if (mem230 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0230 value =====");
178 
 
179 
 
180 
 
181 
 
182 
      stimulus_done = 1;
183 
   end
184 
 

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