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olivier.gi |
/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/*===========================================================================*/
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/* PUSH: DATA READ ACCESS FROM ROM */
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/*---------------------------------------------------------------------------*/
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/* Test the PUSH instruction with all addressing modes making a read access */
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/* to the ROM. */
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olivier.gi |
/* */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/*---------------------------------------------------------------------------*/
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olivier.gi |
/* $Rev: 19 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
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olivier.gi |
/*===========================================================================*/
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initial
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begin
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$display(" ===============================================");
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$display("| START SIMULATION |");
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$display(" ===============================================");
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repeat(5) @(posedge mclk);
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stimulus_done = 0;
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/* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
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// Initialization
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@(r15==16'h1000);
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if (r1 !==16'h0252) tb_error("====== SP initialization (R1 value) =====");
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if (mem250 !==16'h0000) tb_error("====== RAM Initialization (@0x0250 value) =====");
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if (mem24E !==16'h0000) tb_error("====== RAM Initialization (@0x024e value) =====");
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if (mem24C !==16'h0000) tb_error("====== RAM Initialization (@0x024c value) =====");
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if (mem24A !==16'h0000) tb_error("====== RAM Initialization (@0x024a value) =====");
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if (mem248 !==16'h0000) tb_error("====== RAM Initialization (@0x0248 value) =====");
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if (mem246 !==16'h0000) tb_error("====== RAM Initialization (@0x0246 value) =====");
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if (mem244 !==16'h0000) tb_error("====== RAM Initialization (@0x0244 value) =====");
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if (mem242 !==16'h0000) tb_error("====== RAM Initialization (@0x0242 value) =====");
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if (mem240 !==16'h0000) tb_error("====== RAM Initialization (@0x0240 value) =====");
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if (mem23E !==16'h0000) tb_error("====== RAM Initialization (@0x023e value) =====");
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if (mem23C !==16'h0000) tb_error("====== RAM Initialization (@0x023c value) =====");
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if (mem23A !==16'h0000) tb_error("====== RAM Initialization (@0x023a value) =====");
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if (mem238 !==16'h0000) tb_error("====== RAM Initialization (@0x0238 value) =====");
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if (mem236 !==16'h0000) tb_error("====== RAM Initialization (@0x0236 value) =====");
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if (mem234 !==16'h0000) tb_error("====== RAM Initialization (@0x0234 value) =====");
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if (mem232 !==16'h0000) tb_error("====== RAM Initialization (@0x0232 value) =====");
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if (mem230 !==16'h0000) tb_error("====== RAM Initialization (@0x0230 value) =====");
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// Addressing mode: @Rn
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@(r15==16'h2000);
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if (r1 !==16'h024E) tb_error("====== PUSH (@Rn mode): SP value =====");
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if (mem250 !==16'h1234) tb_error("====== PUSH (@Rn mode): @0x0250 value =====");
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if (mem24E !==16'h5678) tb_error("====== PUSH (@Rn mode): @0x024E value =====");
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if (mem24C !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x024c value =====");
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if (mem24A !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x024a value =====");
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if (mem248 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0248 value =====");
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if (mem246 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0246 value =====");
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if (mem244 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0244 value =====");
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if (mem242 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0242 value =====");
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if (mem240 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0240 value =====");
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if (mem23E !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x023e value =====");
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if (mem23C !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x023c value =====");
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if (mem23A !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x023a value =====");
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if (mem238 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0238 value =====");
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if (mem236 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0236 value =====");
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if (mem234 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0234 value =====");
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if (mem232 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0232 value =====");
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if (mem230 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0230 value =====");
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// Addressing mode: @Rn+
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@(r15==16'h3000);
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if (r1 !==16'h024a) tb_error("====== PUSH (@Rn+ mode): SP value =====");
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if (mem250 !==16'h1234) tb_error("====== PUSH (@Rn+ mode): @0x0250 value =====");
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if (mem24E !==16'h5678) tb_error("====== PUSH (@Rn+ mode): @0x024E value =====");
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if (mem24C !==16'h9abc) tb_error("====== PUSH (@Rn+ mode): @0x024c value =====");
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if (mem24A !==16'hdef0) tb_error("====== PUSH (@Rn+ mode): @0x024a value =====");
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if (mem248 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0248 value =====");
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if (mem246 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0246 value =====");
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if (mem244 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0244 value =====");
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if (mem242 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0242 value =====");
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if (mem240 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0240 value =====");
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if (mem23E !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x023e value =====");
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if (mem23C !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x023c value =====");
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if (mem23A !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x023a value =====");
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if (mem238 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0238 value =====");
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if (mem236 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0236 value =====");
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if (mem234 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0234 value =====");
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if (mem232 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0232 value =====");
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if (mem230 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0230 value =====");
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// Addressing mode: X(Rn)
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@(r15==16'h4000);
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if (r1 !==16'h0246) tb_error("====== PUSH (X(Rn) mode): SP value =====");
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if (mem250 !==16'h1234) tb_error("====== PUSH (X(Rn) mode): @0x0250 value =====");
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if (mem24E !==16'h5678) tb_error("====== PUSH (X(Rn) mode): @0x024E value =====");
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if (mem24C !==16'h9abc) tb_error("====== PUSH (X(Rn) mode): @0x024c value =====");
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if (mem24A !==16'hdef0) tb_error("====== PUSH (X(Rn) mode): @0x024a value =====");
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if (mem248 !==16'h0fed) tb_error("====== PUSH (X(Rn) mode): @0x0248 value =====");
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if (mem246 !==16'hcba9) tb_error("====== PUSH (X(Rn) mode): @0x0246 value =====");
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if (mem244 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0244 value =====");
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if (mem242 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0242 value =====");
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if (mem240 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0240 value =====");
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if (mem23E !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x023e value =====");
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if (mem23C !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x023c value =====");
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if (mem23A !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x023a value =====");
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if (mem238 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0238 value =====");
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if (mem236 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0236 value =====");
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if (mem234 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0234 value =====");
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if (mem232 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0232 value =====");
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if (mem230 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0230 value =====");
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// Addressing mode: EDE
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@(r15==16'h5000);
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if (r1 !==16'h0242) tb_error("====== PUSH (EDE mode): SP value =====");
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if (mem250 !==16'h1234) tb_error("====== PUSH (EDE mode): @0x0250 value =====");
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if (mem24E !==16'h5678) tb_error("====== PUSH (EDE mode): @0x024E value =====");
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if (mem24C !==16'h9abc) tb_error("====== PUSH (EDE mode): @0x024c value =====");
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if (mem24A !==16'hdef0) tb_error("====== PUSH (EDE mode): @0x024a value =====");
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if (mem248 !==16'h0fed) tb_error("====== PUSH (EDE mode): @0x0248 value =====");
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if (mem246 !==16'hcba9) tb_error("====== PUSH (EDE mode): @0x0246 value =====");
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if (mem244 !==16'h8765) tb_error("====== PUSH (EDE mode): @0x0244 value =====");
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if (mem242 !==16'h4321) tb_error("====== PUSH (EDE mode): @0x0242 value =====");
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if (mem240 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0240 value =====");
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if (mem23E !==16'h0000) tb_error("====== PUSH (EDE mode): @0x023e value =====");
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if (mem23C !==16'h0000) tb_error("====== PUSH (EDE mode): @0x023c value =====");
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if (mem23A !==16'h0000) tb_error("====== PUSH (EDE mode): @0x023a value =====");
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if (mem238 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0238 value =====");
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if (mem236 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0236 value =====");
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if (mem234 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0234 value =====");
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if (mem232 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0232 value =====");
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if (mem230 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0230 value =====");
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// Addressing mode: &EDE
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@(r15==16'h6000);
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if (r1 !==16'h023E) tb_error("====== PUSH (&EDE mode): SP value =====");
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if (mem250 !==16'h1234) tb_error("====== PUSH (&EDE mode): @0x0250 value =====");
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if (mem24E !==16'h5678) tb_error("====== PUSH (&EDE mode): @0x024E value =====");
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if (mem24C !==16'h9abc) tb_error("====== PUSH (&EDE mode): @0x024c value =====");
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if (mem24A !==16'hdef0) tb_error("====== PUSH (&EDE mode): @0x024a value =====");
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if (mem248 !==16'h0fed) tb_error("====== PUSH (&EDE mode): @0x0248 value =====");
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if (mem246 !==16'hcba9) tb_error("====== PUSH (&EDE mode): @0x0246 value =====");
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if (mem244 !==16'h8765) tb_error("====== PUSH (&EDE mode): @0x0244 value =====");
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if (mem242 !==16'h4321) tb_error("====== PUSH (&EDE mode): @0x0242 value =====");
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if (mem240 !==16'h1f2e) tb_error("====== PUSH (&EDE mode): @0x0240 value =====");
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if (mem23E !==16'h3d4c) tb_error("====== PUSH (&EDE mode): @0x023e value =====");
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if (mem23C !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x023c value =====");
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if (mem23A !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x023a value =====");
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if (mem238 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0238 value =====");
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if (mem236 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0236 value =====");
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if (mem234 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0234 value =====");
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if (mem232 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0232 value =====");
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if (mem230 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0230 value =====");
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stimulus_done = 1;
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end
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184 |
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