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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_reti.v] - Blame information for rev 64

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1 2 olivier.gi 
/*===========================================================================*/
2 
/* Copyright (C) 2001 Authors                                                */
3 
/*                                                                           */
4 
/* This source file may be used and distributed without restriction provided */
5 
/* that this copyright statement is not removed from the file and that any   */
6 
/* derivative work contains the original copyright notice and the associated */
7 
/* disclaimer.                                                               */
8 
/*                                                                           */
9 
/* This source file is free software; you can redistribute it and/or modify  */
10 
/* it under the terms of the GNU Lesser General Public License as published  */
11 
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12 
/* (at your option) any later version.                                       */
13 
/*                                                                           */
14 
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15 
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16 
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17 
/* License for more details.                                                 */
18 
/*                                                                           */
19 
/* You should have received a copy of the GNU Lesser General Public License  */
20 
/* along with this source; if not, write to the Free Software Foundation,    */
21 
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22 
/*                                                                           */
23 
/*===========================================================================*/
24 
/*                 SINGLE-OPERAND ARITHMETIC: RETI  INSTRUCTION              */
25 
/*---------------------------------------------------------------------------*/
26 
/* Test the RETI instruction.                                                */
27 18 olivier.gi 
/*                                                                           */
28 
/* Author(s):                                                                */
29 
/*             - Olivier Girard,    olgirard@gmail.com                       */
30 
/*                                                                           */
31 
/*---------------------------------------------------------------------------*/
32 19 olivier.gi 
/* $Rev: 19 $                                                                */
33 
/* $LastChangedBy: olivier.girard $                                          */
34 
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
35 2 olivier.gi 
/*===========================================================================*/
36 
 
37 
integer    i;
38 
reg [15:0] temp_val;
39 
 
40 
initial
41 
   begin
42 
      $display(" ===============================================");
43 
      $display("|                 START SIMULATION              |");
44 
      $display(" ===============================================");
45 
      repeat(5) @(posedge mclk);
46 
      stimulus_done = 0;
47 
 
48 
      // RETI Instruction test
49 
      //--------------------------
50 
      @(r15==16'h1000);
51 
      if (r3    !==16'h0000) tb_error("====== RESET Vector: R3  value  =====");
52 
      if (r4    !==16'h0000) tb_error("====== RESET Vector: R4  value  =====");
53 
      if (r5    !==16'h0000) tb_error("====== RESET Vector: R5  value  =====");
54 
      if (r6    !==16'h0000) tb_error("====== RESET Vector: R6  value  =====");
55 
      if (r7    !==16'h0000) tb_error("====== RESET Vector: R7  value  =====");
56 
      if (r8    !==16'h0000) tb_error("====== RESET Vector: R8  value  =====");
57 
      if (r9    !==16'h0000) tb_error("====== RESET Vector: R9  value  =====");
58 
      if (r10   !==16'h0000) tb_error("====== RESET Vector: R10 value  =====");
59 
      if (r11   !==16'h0000) tb_error("====== RESET Vector: R11 value  =====");
60 
      if (r12   !==16'h0000) tb_error("====== RESET Vector: R12 value  =====");
61 
      if (r13   !==16'h0000) tb_error("====== RESET Vector: R13 value  =====");
62 
      if (r14   !==16'h0000) tb_error("====== RESET Vector: R14 value  =====");
63 
 
64 
 
65 
      // RETI Instruction test
66 
      //--------------------------
67 
      @(r15==16'h2000);
68 
      if (r1    !==16'h0252) tb_error("====== RETI: SP value      =====");
69 
      if (r2    !==16'h0145) tb_error("====== RETI: SR value      =====");
70 
      if (r5    !==16'h1234) tb_error("====== RETI: R5 value      =====");
71 
 
72 
 
73 
      // Test interruption 0
74 
      //--------------------------
75 
      @(r15==16'h3000);
76 
      repeat(2) @(posedge mclk);
77 
      irq[0] = 1'b1;
78 
      repeat(15) @(posedge mclk);
79 
      irq[0] = 1'b0;
80 
 
81 
      @(r15==16'h3001);
82 
      if (r1    !==16'h0252) tb_error("====== IRQ  0: SP value      =====");
83 
      if (r2[3] !==1'b1)     tb_error("====== IRQ  0: GIE value     =====");
84 
      if (r6    !==16'h5678) tb_error("====== IRQ  0: R6 value      =====");
85 
      if (r7    !==16'h0000) tb_error("====== IRQ  0: R7 value      =====");
86 
      if (r8    !==16'h024e) tb_error("====== IRQ  0: R8 value      =====");
87 
 
88 
 
89 
      // Test interruption 1
90 
      //--------------------------
91 
      @(r15==16'h4000);
92 
      repeat(2) @(posedge mclk);
93 
      irq[1:0] = {2{1'b1}};
94 
      repeat(15) @(posedge mclk);
95 
      irq[1:0] = 1'b0;
96 
 
97 
      @(r15==16'h4001);
98 
      if (r1    !==16'h0252) tb_error("====== IRQ  1: SP value      =====");
99 
      if (r2[3] !==1'b1)     tb_error("====== IRQ  1: GIE value     =====");
100 
      if (r6    !==16'h9abc) tb_error("====== IRQ  1: R6 value      =====");
101 
      if (r7    !==16'h0000) tb_error("====== IRQ  1: R7 value      =====");
102 
      if (r8    !==16'h024e) tb_error("====== IRQ  1: R8 value      =====");
103 
 
104 
 
105 
      // Test interruption 2
106 
      //--------------------------
107 
      @(r15==16'h5000);
108 
      repeat(2) @(posedge mclk);
109 
      irq[2:0] = {3{1'b1}};
110 
      repeat(15) @(posedge mclk);
111 
      irq[2:0] = 1'b0;
112 
 
113 
      @(r15==16'h5001);
114 
      if (r1    !==16'h0252) tb_error("====== IRQ  2: SP value      =====");
115 
      if (r2[3] !==1'b1)     tb_error("====== IRQ  2: GIE value     =====");
116 
      if (r6    !==16'hdef1) tb_error("====== IRQ  2: R6 value      =====");
117 
      if (r7    !==16'h0000) tb_error("====== IRQ  2: R7 value      =====");
118 
      if (r8    !==16'h024e) tb_error("====== IRQ  2: R8 value      =====");
119 
 
120 
 
121 
      // Test interruption 3
122 
      //--------------------------
123 
      @(r15==16'h6000);
124 
      repeat(2) @(posedge mclk);
125 
      irq[3:0] = {4{1'b1}};
126 
      repeat(15) @(posedge mclk);
127 
      irq[3:0] = 1'b0;
128 
 
129 
      @(r15==16'h6001);
130 
      if (r1    !==16'h0252) tb_error("====== IRQ  3: SP value      =====");
131 
      if (r2[3] !==1'b1)     tb_error("====== IRQ  3: GIE value     =====");
132 
      if (r6    !==16'h2345) tb_error("====== IRQ  3: R6 value      =====");
133 
      if (r7    !==16'h0000) tb_error("====== IRQ  3: R7 value      =====");
134 
      if (r8    !==16'h024e) tb_error("====== IRQ  3: R8 value      =====");
135 
 
136 
 
137 
      // Test interruption 4
138 
      //--------------------------
139 
      @(r15==16'h7000);
140 
      repeat(2) @(posedge mclk);
141 
      irq[4:0] = {5{1'b1}};
142 
      repeat(15) @(posedge mclk);
143 
      irq[4:0] = 1'b0;
144 
 
145 
      @(r15==16'h7001);
146 
      if (r1    !==16'h0252) tb_error("====== IRQ  4: SP value      =====");
147 
      if (r2[3] !==1'b1)     tb_error("====== IRQ  4: GIE value     =====");
148 
      if (r6    !==16'h6789) tb_error("====== IRQ  4: R6 value      =====");
149 
      if (r7    !==16'h0000) tb_error("====== IRQ  4: R7 value      =====");
150 
      if (r8    !==16'h024e) tb_error("====== IRQ  4: R8 value      =====");
151 
 
152 
 
153 
      // Test interruption 5
154 
      //--------------------------
155 
      @(r15==16'h8000);
156 
      repeat(2) @(posedge mclk);
157 
      irq[5:0] = {6{1'b1}};
158 
      repeat(15) @(posedge mclk);
159 
      irq[5:0] = 1'b0;
160 
 
161 
      @(r15==16'h8001);
162 
      if (r1    !==16'h0252) tb_error("====== IRQ  5: SP value      =====");
163 
      if (r2[3] !==1'b1)     tb_error("====== IRQ  5: GIE value     =====");
164 
      if (r6    !==16'habcd) tb_error("====== IRQ  5: R6 value      =====");
165 
      if (r7    !==16'h0000) tb_error("====== IRQ  5: R7 value      =====");
166 
      if (r8    !==16'h024e) tb_error("====== IRQ  5: R8 value      =====");
167 
 
168 
 
169 
      // Test interruption 6
170 
      //--------------------------
171 
      @(r15==16'h9000);
172 
      repeat(2) @(posedge mclk);
173 
      irq[6:0] = {7{1'b1}};
174 
      repeat(15) @(posedge mclk);
175 
      irq[6:0] = 1'b0;
176 
 
177 
      @(r15==16'h9001);
178 
      if (r1    !==16'h0252) tb_error("====== IRQ  6: SP value      =====");
179 
      if (r2[3] !==1'b1)     tb_error("====== IRQ  6: GIE value     =====");
180 
      if (r6    !==16'hef12) tb_error("====== IRQ  6: R6 value      =====");
181 
      if (r7    !==16'h0000) tb_error("====== IRQ  6: R7 value      =====");
182 
      if (r8    !==16'h024e) tb_error("====== IRQ  6: R8 value      =====");
183 
 
184 
 
185 
      // Test interruption 7
186 
      //--------------------------
187 
      @(r15==16'ha000);
188 
      repeat(2) @(posedge mclk);
189 
      irq[7:0] = {8{1'b1}};
190 
      repeat(15) @(posedge mclk);
191 
      irq[7:0] = 1'b0;
192 
 
193 
      @(r15==16'ha001);
194 
      if (r1    !==16'h0252) tb_error("====== IRQ  7: SP value      =====");
195 
      if (r2[3] !==1'b1)     tb_error("====== IRQ  7: GIE value     =====");
196 
      if (r6    !==16'h3456) tb_error("====== IRQ  7: R6 value      =====");
197 
      if (r7    !==16'h0000) tb_error("====== IRQ  7: R7 value      =====");
198 
      if (r8    !==16'h024e) tb_error("====== IRQ  7: R8 value      =====");
199 
 
200 
 
201 
      // Test interruption 8
202 
      //--------------------------
203 
      @(r15==16'hb000);
204 
      repeat(2) @(posedge mclk);
205 
      irq[8:0] = {9{1'b1}};
206 
      repeat(15) @(posedge mclk);
207 
      irq[8:0] = 1'b0;
208 
 
209 
      @(r15==16'hb001);
210 
      if (r1    !==16'h0252) tb_error("====== IRQ  8: SP value      =====");
211 
      if (r2[3] !==1'b1)     tb_error("====== IRQ  8: GIE value     =====");
212 
      if (r6    !==16'h789a) tb_error("====== IRQ  8: R6 value      =====");
213 
      if (r7    !==16'h0000) tb_error("====== IRQ  8: R7 value      =====");
214 
      if (r8    !==16'h024e) tb_error("====== IRQ  8: R8 value      =====");
215 
 
216 
 
217 
      // Test interruption 9
218 
      //--------------------------
219 
      @(r15==16'hc000);
220 
      repeat(2) @(posedge mclk);
221 
      irq[9:0] = {10{1'b1}};
222 
      repeat(15) @(posedge mclk);
223 
      irq[9:0] = 1'b0;
224 
 
225 
      @(r15==16'hc001);
226 
      if (r1    !==16'h0252) tb_error("====== IRQ  9: SP value      =====");
227 
      if (r2[3] !==1'b1)     tb_error("====== IRQ  9: GIE value     =====");
228 
      if (r6    !==16'hbcde) tb_error("====== IRQ  9: R6 value      =====");
229 
      if (r7    !==16'h0000) tb_error("====== IRQ  9: R7 value      =====");
230 
      if (r8    !==16'h024e) tb_error("====== IRQ  9: R8 value      =====");
231 
 
232 
 
233 
      // Test interruption 10
234 
      //--------------------------
235 
      @(r15==16'hd000);
236 
      repeat(2) @(posedge mclk);
237 
      irq[10:0] = {11{1'b1}};
238 
      repeat(15) @(posedge mclk);
239 
      irq[10:0] = 1'b0;
240 
 
241 
      @(r15==16'hd001);
242 
      if (r1    !==16'h0252) tb_error("====== IRQ 10: SP value      =====");
243 
      if (r2[3] !==1'b1)     tb_error("====== IRQ 10: GIE value     =====");
244 
      if (r6    !==16'hf123) tb_error("====== IRQ 10: R6 value      =====");
245 
      if (r7    !==16'h0000) tb_error("====== IRQ 10: R7 value      =====");
246 
      if (r8    !==16'h024e) tb_error("====== IRQ 10: R8 value      =====");
247 
 
248 
 
249 
      // Test interruption 11
250 
      //--------------------------
251 
      @(r15==16'he000);
252 
      repeat(2) @(posedge mclk);
253 
      irq[11:0] = {12{1'b1}};
254 
      repeat(15) @(posedge mclk);
255 
      irq[11:0] = 1'b0;
256 
 
257 
      @(r15==16'he001);
258 
      if (r1    !==16'h0252) tb_error("====== IRQ 11: SP value      =====");
259 
      if (r2[3] !==1'b1)     tb_error("====== IRQ 11: GIE value     =====");
260 
      if (r6    !==16'h4567) tb_error("====== IRQ 11: R6 value      =====");
261 
      if (r7    !==16'h0000) tb_error("====== IRQ 11: R7 value      =====");
262 
      if (r8    !==16'h024e) tb_error("====== IRQ 11: R8 value      =====");
263 
 
264 
 
265 
      // Test interruption 12
266 
      //--------------------------
267 
      @(r15==16'hf000);
268 
      repeat(2) @(posedge mclk);
269 
      irq[12:0] = {13{1'b1}};
270 
      repeat(15) @(posedge mclk);
271 
      irq[12:0] = 1'b0;
272 
 
273 
      @(r15==16'hf001);
274 
      if (r1    !==16'h0252) tb_error("====== IRQ 12: SP value      =====");
275 
      if (r2[3] !==1'b1)     tb_error("====== IRQ 12: GIE value     =====");
276 
      if (r6    !==16'h89ab) tb_error("====== IRQ 12: R6 value      =====");
277 
      if (r7    !==16'h0000) tb_error("====== IRQ 12: R7 value      =====");
278 
      if (r8    !==16'h024e) tb_error("====== IRQ 12: R8 value      =====");
279 
 
280 
 
281 
      // Test interruption 13
282 
      //--------------------------
283 
      @(r15==16'hf100);
284 
      repeat(2) @(posedge mclk);
285 
      irq[13:0] = {14{1'b1}};
286 
      repeat(15) @(posedge mclk);
287 
      irq[13:0] = 1'b0;
288 
 
289 
      @(r15==16'hf101);
290 
      if (r1    !==16'h0252) tb_error("====== IRQ 13: SP value      =====");
291 
      if (r2[3] !==1'b1)     tb_error("====== IRQ 13: GIE value     =====");
292 
      if (r6    !==16'hcdef) tb_error("====== IRQ 13: R6 value      =====");
293 
      if (r7    !==16'h0000) tb_error("====== IRQ 13: R7 value      =====");
294 
      if (r8    !==16'h024e) tb_error("====== IRQ 13: R8 value      =====");
295 
 
296 
 
297 
      // Test interruption NMI:  rising edge
298 
      //--------------------------------------
299 
      @(r15==16'hf200);
300 
      repeat(2) @(posedge mclk);
301 
      irq[13:0] = {14{1'b1}};
302 
      nmi       = 1'b1;
303 
      repeat(15) @(posedge mclk);
304 
      irq[13:0] = 1'b0;
305 
      nmi       = 1'b0;
306 
 
307 
      @(r15==16'hf201);
308 
      if (r1    !==16'h0252) tb_error("====== NMI: SP value      =====");
309 
      if (r2[3] !==1'b1)     tb_error("====== NMI: GIE value     =====");
310 
      if (r6    !==16'h0123) tb_error("====== NMI: R6 value      =====");
311 
      if (r7    !==16'h0000) tb_error("====== NMI: R7 value      =====");
312 
      if (r8    !==16'h024e) tb_error("====== NMI: R8 value      =====");
313 
 
314 
      if (r9    !==16'h0000) tb_error("====== NMI: NMIE   value  =====");
315 
      if (r10   !==16'h0010) tb_error("====== NMI: NMIIFG value  =====");
316 
 
317 
 
318 
      stimulus_done = 1;
319 
   end
320 
 

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