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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                 SINGLE-OPERAND ARITHMETIC: RRA[.B] INSTRUCTION            */
/*---------------------------------------------------------------------------*/
/* Test the RRA[.B] instruction.                                             */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 200 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2015-01-21 23:01:31 +0100 (Wed, 21 Jan 2015) $          */
/*===========================================================================*/
 
.include "pmem_defs.asm"
 
.global main
 
main:
        /* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
 
 
        # Addressing mode: Rn
        #------------------------
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x7332, r4
        rra          r4            ;# RRA ({r4=0x7332}  => {r4=0x3999, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x7333, r6
        rra          r6            ;# RRA ({r6=0x7333}  => {r6=0x3999, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x8332, r8
        rra          r8            ;# RRA ({r9=0x8332}  => {r9=0xc199, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x8333, r10
        rra         r10            ;# RRA ({r10=0x8333} => {r10=0xc199, C=1})
        mov          r2, r11
 
        mov     #0x1000, r15
 
 
        # Addressing mode: @Rn
        #------------------------
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x7332, &DMEM_200
        mov   #DMEM_200, r4
        mov     #0xaaaa, &DMEM_202
        rra         @r4            ;# RRA ({mem00=0x7332}  => {mem00=0x3999, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x7333, &DMEM_202
        mov   #DMEM_202, r6
        mov     #0xaaaa, &DMEM_204
        rra         @r6            ;# RRA ({mem01=0x7333}  => {mem01=0x3999, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x8332, &DMEM_204
        mov   #DMEM_204, r8
        mov     #0xaaaa, &DMEM_206
        rra         @r8            ;# RRA ({mem02=0x8332}  => {mem02=0xc199, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x8333, &DMEM_206
        mov   #DMEM_206, r10
        mov     #0xaaaa, &DMEM_208
        rra        @r10            ;# RRA ({mem03=0x8333}  => {mem03=0xc199, C=1})
        mov          r2, r11
 
        mov     #0x2000, r15
 
 
        # Addressing mode: @Rn+
        #------------------------
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x7332, &DMEM_208
        mov   #DMEM_208, r4
        mov     #0xaaaa, &DMEM_20A
        rra        @r4+            ;# RRA ({mem04=0x7332}  => {mem04=0x3999, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x7333, &DMEM_20A
        mov   #DMEM_20A, r6
        mov     #0xaaaa, &DMEM_20C
        rra        @r6+            ;# RRA ({mem05=0x7333}  => {mem05=0x3999, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x8332, &DMEM_20C
        mov   #DMEM_20C, r8
        mov     #0xaaaa, &DMEM_20E
        rra        @r8+            ;# RRA ({mem06=0x8332}  => {mem06=0xc199, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x8333, &DMEM_20E
        mov   #DMEM_20E, r10
        mov     #0xaaaa, &DMEM_210
        rra       @r10+            ;# RRA ({mem07=0x8333}  => {mem07=0xc199, C=1})
        mov          r2, r11
 
        mov     #0x3000, r15
 
 
        # Addressing mode: X(Rn)
        #------------------------
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x7332, &DMEM_210
        mov   #DMEM_200, r4
        mov     #0xaaaa, &DMEM_212
        rra       16(r4)            ;# RRA ({mem08=0x7332}  => {mem08=0x3999, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x7333, &DMEM_212
        mov   #DMEM_200, r6
        mov     #0xaaaa, &DMEM_214
        rra       18(r6)            ;# RRA ({mem09=0x7333}  => {mem09=0x3999, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x8332, &DMEM_214
        mov   #DMEM_200, r8
        mov     #0xaaaa, &DMEM_216
        rra       20(r8)            ;# RRA ({mem0a=0x8332}  => {mem0a=0xc199, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x8333, &DMEM_216
        mov   #DMEM_200, r10
        mov     #0xaaaa, &DMEM_218
        rra      22(r10)            ;# RRA ({mem0b=0x8333}  => {mem0b=0xc199, C=1})
        mov          r2, r11
 
        mov     #0x4000, r15
 
 
        # Addressing mode: EDE
        #------------------------
.set   EDE_218,  DMEM_218+PMEM_EDE_LENGTH
.set   EDE_21A,  DMEM_21A+PMEM_EDE_LENGTH
.set   EDE_21C,  DMEM_21C+PMEM_EDE_LENGTH
.set   EDE_21E,  DMEM_21E+PMEM_EDE_LENGTH
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x7332, &DMEM_218
        mov     #0xaaaa, &DMEM_21A
        rra     EDE_218            ;# RRA ({mem0c=0x7332}  => {mem0c=0x3999, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x7333, &DMEM_21A
        mov     #0xaaaa, &DMEM_21C
        rra     EDE_21A            ;# RRA ({mem0d=0x7333}  => {mem0d=0x3999, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x8332, &DMEM_21C
        mov     #0xaaaa, &DMEM_21E
        rra     EDE_21C            ;# RRA ({mem0e=0x8332}  => {mem0e=0xc199, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x8333, &DMEM_21E
        mov     #0xaaaa, &DMEM_220
        rra     EDE_21E            ;# RRA ({mem0f=0x8333}  => {mem0f=0xc199, C=1})
        mov          r2, r11
 
        mov     #0x5000, r15
 
 
        # Addressing mode: &EDE
        #------------------------
.set   aEDE_220,  DMEM_220
.set   aEDE_222,  DMEM_222
.set   aEDE_224,  DMEM_224
.set   aEDE_226,  DMEM_226
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x7332, &DMEM_220
        mov     #0xaaaa, &DMEM_222
        rra   &aEDE_220            ;# RRA ({mem10=0x7332}  => {mem10=0x3999, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x7333, &DMEM_222
        mov     #0xaaaa, &DMEM_224
        rra   &aEDE_222            ;# RRA ({mem11=0x7333}  => {mem11=0x3999, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x8332, &DMEM_224
        mov     #0xaaaa, &DMEM_226
        rra   &aEDE_224            ;# RRA ({mem12=0x8332}  => {mem12=0xc199, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x8333, &DMEM_226
        mov     #0xaaaa, &DMEM_228
        rra   &aEDE_226            ;# RRA ({mem13=0x8333}  => {mem13=0xc199, C=1})
        mov          r2, r11
 
        mov     #0x6000, r15
 
 
        /* ----------------------- CLEAR MEMORY --------------------------- */
        mov     #0x0015, r4
        mov   #DMEM_200, r5
clear_mem_loop:
        clr    0(r5)
        incd     r5
        dec      r4
        jnz     clear_mem_loop
 
        mov     #0x7000, r15
 
 
        /* -------------- TEST INSTRUCTION IN BYTE MODE ------------------- */
 
        # Addressing mode: Rn
        #------------------------
 
        mov     #0x0001, r2    ;# Test 1
        mov     #0xff72, r4
        rra.b        r4        ;# RRA.B ({r4=0x32}  => {r4=0x39, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2    ;# Test 2
        mov     #0xff73, r6
        rra.b        r6        ;# RRA.B ({r6=0x33}  => {r6=0x39, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2    ;# Test 3
        mov     #0xf082, r8
        rra.b        r8        ;# RRA.B ({r9=0x32}  => {r9=0xc1, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2    ;# Test 4
        mov     #0xf083, r10
        rra.b       r10        ;# RRA.B ({r10=0x33} => {r10=0xc1, C=1})
        mov          r2, r11
 
        mov     #0x8000, r15
 
 
        # Addressing mode: @Rn (Low Byte)
        #---------------------------------
 
        mov     #0x0001, r2        ;# Test 1: Low Byte
        mov     #0x2572, &DMEM_200
        mov   #DMEM_200, r4
        mov     #0xaaaa, &DMEM_202
        rra.b       @r4            ;# RRA.B ({mem00=0x2572}  => {mem00=0x2539, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2: Low Byte
        mov     #0x2573, &DMEM_202
        mov   #DMEM_202, r6
        mov     #0xaaaa, &DMEM_204
        rra.b       @r6            ;# RRA.B ({mem01=0x2573}  => {mem01=0x2539, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3: Low Byte
        mov     #0x2582, &DMEM_204
        mov   #DMEM_204, r8
        mov     #0xaaaa, &DMEM_206
        rra.b       @r8            ;# RRA.B ({mem02=0x2582}  => {mem02=0x25c1, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4: Low Byte
        mov     #0x2583, &DMEM_206
        mov   #DMEM_206, r10
        mov     #0xaaaa, &DMEM_208
        rra.b      @r10            ;# RRA.B ({mem03=0x2583}  => {mem03=0x25c1, C=1})
        mov          r2, r11
 
        mov     #0x9000, r15
 
        # Addressing mode: @Rn (High Byte)
        #---------------------------------
 
        mov     #0x0001, r2        ;# Test 1: High Byte
        mov     #0x7225, &DMEM_208
        mov   #DMEM_209, r4
        mov     #0xaaaa, &DMEM_20A
        rra.b       @r4            ;# RRA.B ({mem04=0x7225}  => {mem04=0x3925, C=0})
        mov          r2, r6
 
        mov     #0x0001, r2        ;# Test 2: High Byte
        mov     #0x7325, &DMEM_20A
        mov   #DMEM_20B, r6
        mov     #0xaaaa, &DMEM_20C
        rra.b       @r6            ;# RRA.B ({mem05=0x7325}  => {mem05=0x3925, C=1})
        mov          r2, r8
 
        mov     #0x0000, r2        ;# Test 3: High Byte
        mov     #0x8225, &DMEM_20C
        mov   #DMEM_20D, r8
        mov     #0xaaaa, &DMEM_20E
        rra.b       @r8            ;# RRA.B ({mem06=0x8225}  => {mem06=0xc125, C=0})
        mov          r2, r10
 
        mov     #0x0000, r2        ;# Test 4: High Byte
        mov     #0x8325, &DMEM_20E
        mov   #DMEM_20F, r10
        mov     #0xaaaa, &DMEM_210
        rra.b      @r10            ;# RRA.B ({mem07=0x8325}  => {mem07=0xc125, C=1})
        mov          r2, r11
 
        mov     #0x9001, r15
 
 
        # Addressing mode: @Rn+ (Low Byte)
        #---------------------------------
 
        mov     #0x0001, r2        ;# Test 1: Low Byte
        mov     #0x2572, &DMEM_210
        mov   #DMEM_210, r4
        mov     #0xaaaa, &DMEM_212
        rra.b      @r4+            ;# RRA.B ({mem08=0x2582}  => {mem08=0x2539, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2: Low Byte
        mov     #0x2573, &DMEM_212
        mov   #DMEM_212, r6
        mov     #0xaaaa, &DMEM_214
        rra.b      @r6+            ;# RRA.B ({mem09=0x2583}  => {mem09=0x2539, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3: Low Byte
        mov     #0x2582, &DMEM_214
        mov   #DMEM_214, r8
        mov     #0xaaaa, &DMEM_216
        rra.b      @r8+            ;# RRA.B ({mem0a=0x2572}  => {mem0a=0x25c1, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4: Low Byte
        mov     #0x2583, &DMEM_216
        mov   #DMEM_216, r10
        mov     #0xaaaa, &DMEM_218
        rra.b     @r10+            ;# RRA.B ({mem0b=0x2573}  => {mem0b=0x25c1, C=1})
        mov          r2, r11
 
        mov     #0xA000, r15
 
        # Addressing mode: @Rn+ (High Byte)
        #-----------------------------------
 
        mov     #0x0001, r2        ;# Test 1: High Byte
        mov     #0x7225, &DMEM_218
        mov   #DMEM_219, r4
        mov     #0xaaaa, &DMEM_21A
        rra.b      @r4+            ;# RRA.B ({mem0c=0x7225}  => {mem0c=0x3925, C=0})
        mov          r2, r6
 
        mov     #0x0001, r2        ;# Test 2: High Byte
        mov     #0x7325, &DMEM_21A
        mov   #DMEM_21B, r6
        mov     #0xaaaa, &DMEM_21C
        rra.b      @r6+            ;# RRA.B ({mem0d=0x7325}  => {mem0d=0x3925, C=1})
        mov          r2, r8
 
        mov     #0x0000, r2        ;# Test 3: High Byte
        mov     #0x8225, &DMEM_21C
        mov   #DMEM_21D, r8
        mov     #0xaaaa, &DMEM_21E
        rra.b      @r8+            ;# RRA.B ({mem0e=0x8225}  => {mem0e=0xc125, C=0})
        mov          r2, r10
 
        mov     #0x0000, r2        ;# Test 4: High Byte
        mov     #0x8325, &DMEM_21E
        mov   #DMEM_21F, r10
        mov     #0xaaaa, &DMEM_220
        rra.b     @r10+            ;# RRA.B ({mem0f=0x8325}  => {mem0f=0xc125, C=1})
        mov          r2, r11
 
        mov     #0xA001, r15
 
 
        # Addressing mode: X(Rn) (Low Byte)
        #-----------------------------------
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x2572, &DMEM_220
        mov   #DMEM_200, r4
        mov     #0xaaaa, &DMEM_222
        rra.b     32(r4)           ;# RRA ({mem10=0x2572}  => {mem10=0x2539, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x2573, &DMEM_222
        mov   #DMEM_200, r6
        mov     #0xaaaa, &DMEM_224
        rra.b     34(r6)           ;# RRA ({mem11=0x2573}  => {mem11=0x2539, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x2582, &DMEM_224
        mov   #DMEM_200, r8
        mov     #0xaaaa, &DMEM_226
        rra.b     36(r8)           ;# RRA ({mem12=0x2582}  => {mem12=0x25c1, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x2583, &DMEM_226
        mov   #DMEM_200, r10
        mov     #0xaaaa, &DMEM_228
        rra.b    38(r10)           ;# RRA ({mem13=0x2583}  => {mem13=0x25c1, C=1})
        mov          r2, r11
 
        mov     #0xB000, r15
 
        # Addressing mode: X(Rn) (High Byte)
        #------------------------------------
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x7225, &DMEM_228
        mov   #DMEM_200, r4
        mov     #0xaaaa, &DMEM_22A
        rra.b     41(r4)           ;# RRA ({mem14=0x7225}  => {mem14=0x3925, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x7325, &DMEM_22A
        mov   #DMEM_200, r6
        mov     #0xaaaa, &DMEM_22C
        rra.b     43(r6)           ;# RRA ({mem15=0x7325}  => {mem15=0x3925, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x8225, &DMEM_22C
        mov   #DMEM_200, r8
        mov     #0xaaaa, &DMEM_22E
        rra.b     45(r8)           ;# RRA ({mem16=0x8225}  => {mem16=0xc125, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x8325, &DMEM_22E
        mov   #DMEM_200, r10
        mov     #0xaaaa, &DMEM_230
        rra.b    47(r10)           ;# RRA ({mem17=0x8325}  => {mem17=0xc125, C=1})
        mov          r2, r11
 
        mov     #0xB001, r15
 
 
        # Addressing mode: EDE (Low Byte)
        #---------------------------------
.set   EDE_230,  DMEM_230+PMEM_EDE_LENGTH
.set   EDE_232,  DMEM_232+PMEM_EDE_LENGTH
.set   EDE_234,  DMEM_234+PMEM_EDE_LENGTH
.set   EDE_236,  DMEM_236+PMEM_EDE_LENGTH
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x2572, &DMEM_230
        mov     #0xaaaa, &DMEM_232
        rra.b   EDE_230            ;# RRA ({mem18=0x2572}  => {mem18=0x2539, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x2573, &DMEM_232
        mov     #0xaaaa, &DMEM_234
        rra.b   EDE_232            ;# RRA ({mem19=0x2573}  => {mem19=0x2539, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x2582, &DMEM_234
        mov     #0xaaaa, &DMEM_236
        rra.b   EDE_234            ;# RRA ({mem1a=0x2582}  => {mem1a=0x25c1, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x2583, &DMEM_236
        mov     #0xaaaa, &DMEM_238
        rra.b   EDE_236            ;# RRA ({mem1b=0x2583}  => {mem1b=0x25c1, C=1})
        mov          r2, r11
 
        mov     #0xC000, r15
 
        # Addressing mode: EDE (High Byte)
        #----------------------------------
.set   EDE_239,  DMEM_239+PMEM_EDE_LENGTH
.set   EDE_23B,  DMEM_23B+PMEM_EDE_LENGTH
.set   EDE_23D,  DMEM_23D+PMEM_EDE_LENGTH
.set   EDE_23F,  DMEM_23F+PMEM_EDE_LENGTH
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x7225, &DMEM_238
        mov     #0xaaaa, &DMEM_23A
        rra.b   EDE_239            ;# RRA ({mem1c=0x7225}  => {mem1c=0x3925, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x7325, &DMEM_23A
        mov     #0xaaaa, &DMEM_23C
        rra.b   EDE_23B            ;# RRA ({mem1d=0x7325}  => {mem1d=0x3925, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x8225, &DMEM_23C
        mov     #0xaaaa, &DMEM_23E
        rra.b   EDE_23D            ;# RRA ({mem1e=0x8225}  => {mem1e=0xc125, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x8325, &DMEM_23E
        mov     #0xaaaa, &DMEM_240
        rra.b   EDE_23F            ;# RRA ({mem1f=0x8325}  => {mem1f=0xc125, C=1})
        mov          r2, r11
 
        mov     #0xC001, r15
 
 
        # Addressing mode: &EDE (Low Byte)
        #----------------------------------
.set   aEDE_240,  DMEM_240
.set   aEDE_242,  DMEM_242
.set   aEDE_244,  DMEM_244
.set   aEDE_246,  DMEM_246
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x2572, &DMEM_240
        mov     #0xaaaa, &DMEM_242
        rra.b &aEDE_240            ;# RRA ({mem20=0x2572}  => {mem20=0x2539, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x2573, &DMEM_242
        mov     #0xaaaa, &DMEM_244
        rra.b &aEDE_242            ;# RRA ({mem21=0x2573}  => {mem21=0x2539, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x2582, &DMEM_244
        mov     #0xaaaa, &DMEM_246
        rra.b &aEDE_244            ;# RRA ({mem22=0x2582}  => {mem22=0x25c1, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x2583, &DMEM_246
        mov     #0xaaaa, &DMEM_248
        rra.b &aEDE_246            ;# RRA ({mem23=0x2583}  => {mem23=0x25c1, C=1})
        mov          r2, r11
 
        mov     #0xD000, r15
 
        # Addressing mode: &EDE (High Byte)
        #-----------------------------------
.set   aEDE_249,  DMEM_249
.set   aEDE_24B,  DMEM_24B
.set   aEDE_24D,  DMEM_24D
.set   aEDE_24F,  DMEM_24F
 
        mov     #0x0001, r2        ;# Test 1
        mov     #0x7225, &DMEM_248
        mov     #0xaaaa, &DMEM_24A
        rra.b &aEDE_249            ;# RRA ({mem24=0x7225}  => {mem24=0x3925, C=0})
        mov          r2, r5
 
        mov     #0x0001, r2        ;# Test 2
        mov     #0x7325, &DMEM_24A
        mov     #0xaaaa, &DMEM_24C
        rra.b &aEDE_24B            ;# RRA ({mem25=0x7325}  => {mem25=0x3925, C=1})
        mov          r2, r7
 
        mov     #0x0000, r2        ;# Test 3
        mov     #0x8225, &DMEM_24C
        mov     #0xaaaa, &DMEM_24E
        rra.b &aEDE_24D            ;# RRA ({mem26=0x8225}  => {mem26=0xc125, C=0})
        mov          r2, r9
 
        mov     #0x0000, r2        ;# Test 4
        mov     #0x8325, &DMEM_24E
        mov     #0xaaaa, &DMEM_250
        rra.b &aEDE_24F            ;# RRA ({mem27=0x8325}  => {mem27=0xc125, C=1})
        mov          r2, r11
 
        mov     #0xD001, r15
 
 
 
        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    
.word end_of_test  ; Interrupt  1                      
.word end_of_test  ; Interrupt  2                      
.word end_of_test  ; Interrupt  3                      
.word end_of_test  ; Interrupt  4                      
.word end_of_test  ; Interrupt  5                      
.word end_of_test  ; Interrupt  6                      
.word end_of_test  ; Interrupt  7                      
.word end_of_test  ; Interrupt  8                      
.word end_of_test  ; Interrupt  9                      
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      
.word end_of_test  ; Interrupt 12                      
.word end_of_test  ; Interrupt 13                      
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET

Line No.	Rev	Author	Line
1	2	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24			`/* SINGLE-OPERAND ARITHMETIC: RRA[.B] INSTRUCTION */`
25			`/---------------------------------------------------------------------------/`
26			`/* Test the RRA[.B] instruction. */`
27	18	olivier.gi	`/* */`
28			`/* Author(s): */`
29			`/* - Olivier Girard, olgirard@gmail.com */`
30			`/* */`
31			`/---------------------------------------------------------------------------/`
32	19	olivier.gi	`/* $Rev: 200 $ */`
33			`/* $LastChangedBy: olivier.girard $ */`
34			`/* $LastChangedDate: 2015-01-21 23:01:31 +0100 (Wed, 21 Jan 2015) $ */`
35	2	olivier.gi	`/===========================================================================/`
36
37	141	olivier.gi	`.include "pmem_defs.asm"`
38	2	olivier.gi
39			`.global main`
40
41			`main:`
42			`/* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */`
43
44
45			`# Addressing mode: Rn`
46			`#------------------------`
47
48			`mov #0x0001, r2 ;# Test 1`
49			`mov #0x7332, r4`
50			`rra r4 ;# RRA ({r4=0x7332} => {r4=0x3999, C=0})`
51			`mov r2, r5`
52
53			`mov #0x0001, r2 ;# Test 2`
54			`mov #0x7333, r6`
55			`rra r6 ;# RRA ({r6=0x7333} => {r6=0x3999, C=1})`
56			`mov r2, r7`
57
58			`mov #0x0000, r2 ;# Test 3`
59			`mov #0x8332, r8`
60			`rra r8 ;# RRA ({r9=0x8332} => {r9=0xc199, C=0})`
61			`mov r2, r9`
62
63			`mov #0x0000, r2 ;# Test 4`
64			`mov #0x8333, r10`
65			`rra r10 ;# RRA ({r10=0x8333} => {r10=0xc199, C=1})`
66			`mov r2, r11`
67
68			`mov #0x1000, r15`
69
70
71			`# Addressing mode: @Rn`
72			`#------------------------`
73
74			`mov #0x0001, r2 ;# Test 1`
75	111	olivier.gi	`mov #0x7332, &DMEM_200`
76			`mov #DMEM_200, r4`
77			`mov #0xaaaa, &DMEM_202`
78	2	olivier.gi	`rra @r4 ;# RRA ({mem00=0x7332} => {mem00=0x3999, C=0})`
79			`mov r2, r5`
80
81			`mov #0x0001, r2 ;# Test 2`
82	111	olivier.gi	`mov #0x7333, &DMEM_202`
83			`mov #DMEM_202, r6`
84			`mov #0xaaaa, &DMEM_204`
85	2	olivier.gi	`rra @r6 ;# RRA ({mem01=0x7333} => {mem01=0x3999, C=1})`
86			`mov r2, r7`
87
88			`mov #0x0000, r2 ;# Test 3`
89	111	olivier.gi	`mov #0x8332, &DMEM_204`
90			`mov #DMEM_204, r8`
91			`mov #0xaaaa, &DMEM_206`
92	2	olivier.gi	`rra @r8 ;# RRA ({mem02=0x8332} => {mem02=0xc199, C=0})`
93			`mov r2, r9`
94
95			`mov #0x0000, r2 ;# Test 4`
96	111	olivier.gi	`mov #0x8333, &DMEM_206`
97			`mov #DMEM_206, r10`
98			`mov #0xaaaa, &DMEM_208`
99	2	olivier.gi	`rra @r10 ;# RRA ({mem03=0x8333} => {mem03=0xc199, C=1})`
100			`mov r2, r11`
101
102			`mov #0x2000, r15`
103
104
105			`# Addressing mode: @Rn+`
106			`#------------------------`
107
108			`mov #0x0001, r2 ;# Test 1`
109	111	olivier.gi	`mov #0x7332, &DMEM_208`
110			`mov #DMEM_208, r4`
111			`mov #0xaaaa, &DMEM_20A`
112	2	olivier.gi	`rra @r4+ ;# RRA ({mem04=0x7332} => {mem04=0x3999, C=0})`
113			`mov r2, r5`
114
115			`mov #0x0001, r2 ;# Test 2`
116	111	olivier.gi	`mov #0x7333, &DMEM_20A`
117			`mov #DMEM_20A, r6`
118			`mov #0xaaaa, &DMEM_20C`
119	2	olivier.gi	`rra @r6+ ;# RRA ({mem05=0x7333} => {mem05=0x3999, C=1})`
120			`mov r2, r7`
121
122			`mov #0x0000, r2 ;# Test 3`
123	111	olivier.gi	`mov #0x8332, &DMEM_20C`
124			`mov #DMEM_20C, r8`
125			`mov #0xaaaa, &DMEM_20E`
126	2	olivier.gi	`rra @r8+ ;# RRA ({mem06=0x8332} => {mem06=0xc199, C=0})`
127			`mov r2, r9`
128
129			`mov #0x0000, r2 ;# Test 4`
130	111	olivier.gi	`mov #0x8333, &DMEM_20E`
131			`mov #DMEM_20E, r10`
132			`mov #0xaaaa, &DMEM_210`
133	2	olivier.gi	`rra @r10+ ;# RRA ({mem07=0x8333} => {mem07=0xc199, C=1})`
134			`mov r2, r11`
135
136			`mov #0x3000, r15`
137
138
139			`# Addressing mode: X(Rn)`
140			`#------------------------`
141
142			`mov #0x0001, r2 ;# Test 1`
143	111	olivier.gi	`mov #0x7332, &DMEM_210`
144			`mov #DMEM_200, r4`
145			`mov #0xaaaa, &DMEM_212`
146	2	olivier.gi	`rra 16(r4) ;# RRA ({mem08=0x7332} => {mem08=0x3999, C=0})`
147			`mov r2, r5`
148
149			`mov #0x0001, r2 ;# Test 2`
150	111	olivier.gi	`mov #0x7333, &DMEM_212`
151			`mov #DMEM_200, r6`
152			`mov #0xaaaa, &DMEM_214`
153	2	olivier.gi	`rra 18(r6) ;# RRA ({mem09=0x7333} => {mem09=0x3999, C=1})`
154			`mov r2, r7`
155
156			`mov #0x0000, r2 ;# Test 3`
157	111	olivier.gi	`mov #0x8332, &DMEM_214`
158			`mov #DMEM_200, r8`
159			`mov #0xaaaa, &DMEM_216`
160	2	olivier.gi	`rra 20(r8) ;# RRA ({mem0a=0x8332} => {mem0a=0xc199, C=0})`
161			`mov r2, r9`
162
163			`mov #0x0000, r2 ;# Test 4`
164	111	olivier.gi	`mov #0x8333, &DMEM_216`
165			`mov #DMEM_200, r10`
166			`mov #0xaaaa, &DMEM_218`
167	2	olivier.gi	`rra 22(r10) ;# RRA ({mem0b=0x8333} => {mem0b=0xc199, C=1})`
168			`mov r2, r11`
169
170			`mov #0x4000, r15`
171
172
173			`# Addressing mode: EDE`
174			`#------------------------`
175	200	olivier.gi	`.set EDE_218, DMEM_218+PMEM_EDE_LENGTH`
176			`.set EDE_21A, DMEM_21A+PMEM_EDE_LENGTH`
177			`.set EDE_21C, DMEM_21C+PMEM_EDE_LENGTH`
178			`.set EDE_21E, DMEM_21E+PMEM_EDE_LENGTH`
179	2	olivier.gi
180			`mov #0x0001, r2 ;# Test 1`
181	111	olivier.gi	`mov #0x7332, &DMEM_218`
182			`mov #0xaaaa, &DMEM_21A`
183	200	olivier.gi	`rra EDE_218 ;# RRA ({mem0c=0x7332} => {mem0c=0x3999, C=0})`
184	2	olivier.gi	`mov r2, r5`
185
186			`mov #0x0001, r2 ;# Test 2`
187	111	olivier.gi	`mov #0x7333, &DMEM_21A`
188			`mov #0xaaaa, &DMEM_21C`
189	200	olivier.gi	`rra EDE_21A ;# RRA ({mem0d=0x7333} => {mem0d=0x3999, C=1})`
190	2	olivier.gi	`mov r2, r7`
191
192			`mov #0x0000, r2 ;# Test 3`
193	111	olivier.gi	`mov #0x8332, &DMEM_21C`
194			`mov #0xaaaa, &DMEM_21E`
195	200	olivier.gi	`rra EDE_21C ;# RRA ({mem0e=0x8332} => {mem0e=0xc199, C=0})`
196	2	olivier.gi	`mov r2, r9`
197
198			`mov #0x0000, r2 ;# Test 4`
199	111	olivier.gi	`mov #0x8333, &DMEM_21E`
200			`mov #0xaaaa, &DMEM_220`
201	200	olivier.gi	`rra EDE_21E ;# RRA ({mem0f=0x8333} => {mem0f=0xc199, C=1})`
202	2	olivier.gi	`mov r2, r11`
203
204			`mov #0x5000, r15`
205
206
207			`# Addressing mode: &EDE`
208			`#------------------------`
209	111	olivier.gi	`.set aEDE_220, DMEM_220`
210			`.set aEDE_222, DMEM_222`
211			`.set aEDE_224, DMEM_224`
212			`.set aEDE_226, DMEM_226`
213	2	olivier.gi
214			`mov #0x0001, r2 ;# Test 1`
215	111	olivier.gi	`mov #0x7332, &DMEM_220`
216			`mov #0xaaaa, &DMEM_222`
217	2	olivier.gi	`rra &aEDE_220 ;# RRA ({mem10=0x7332} => {mem10=0x3999, C=0})`
218			`mov r2, r5`
219
220			`mov #0x0001, r2 ;# Test 2`
221	111	olivier.gi	`mov #0x7333, &DMEM_222`
222			`mov #0xaaaa, &DMEM_224`
223	2	olivier.gi	`rra &aEDE_222 ;# RRA ({mem11=0x7333} => {mem11=0x3999, C=1})`
224			`mov r2, r7`
225
226			`mov #0x0000, r2 ;# Test 3`
227	111	olivier.gi	`mov #0x8332, &DMEM_224`
228			`mov #0xaaaa, &DMEM_226`
229	2	olivier.gi	`rra &aEDE_224 ;# RRA ({mem12=0x8332} => {mem12=0xc199, C=0})`
230			`mov r2, r9`
231
232			`mov #0x0000, r2 ;# Test 4`
233	111	olivier.gi	`mov #0x8333, &DMEM_226`
234			`mov #0xaaaa, &DMEM_228`
235	2	olivier.gi	`rra &aEDE_226 ;# RRA ({mem13=0x8333} => {mem13=0xc199, C=1})`
236			`mov r2, r11`
237
238			`mov #0x6000, r15`
239
240
241			`/* ----------------------- CLEAR MEMORY --------------------------- */`
242			`mov #0x0015, r4`
243	111	olivier.gi	`mov #DMEM_200, r5`
244	2	olivier.gi	`clear_mem_loop:`
245			`clr 0(r5)`
246			`incd r5`
247			`dec r4`
248	200	olivier.gi	`jnz clear_mem_loop`
249	2	olivier.gi
250			`mov #0x7000, r15`
251
252
253			`/* -------------- TEST INSTRUCTION IN BYTE MODE ------------------- */`
254
255			`# Addressing mode: Rn`
256			`#------------------------`
257
258			`mov #0x0001, r2 ;# Test 1`
259			`mov #0xff72, r4`
260			`rra.b r4 ;# RRA.B ({r4=0x32} => {r4=0x39, C=0})`
261			`mov r2, r5`
262
263			`mov #0x0001, r2 ;# Test 2`
264			`mov #0xff73, r6`
265			`rra.b r6 ;# RRA.B ({r6=0x33} => {r6=0x39, C=1})`
266			`mov r2, r7`
267
268			`mov #0x0000, r2 ;# Test 3`
269			`mov #0xf082, r8`
270			`rra.b r8 ;# RRA.B ({r9=0x32} => {r9=0xc1, C=0})`
271			`mov r2, r9`
272
273			`mov #0x0000, r2 ;# Test 4`
274			`mov #0xf083, r10`
275			`rra.b r10 ;# RRA.B ({r10=0x33} => {r10=0xc1, C=1})`
276			`mov r2, r11`
277
278			`mov #0x8000, r15`
279
280
281			`# Addressing mode: @Rn (Low Byte)`
282			`#---------------------------------`
283
284			`mov #0x0001, r2 ;# Test 1: Low Byte`
285	111	olivier.gi	`mov #0x2572, &DMEM_200`
286			`mov #DMEM_200, r4`
287			`mov #0xaaaa, &DMEM_202`
288	2	olivier.gi	`rra.b @r4 ;# RRA.B ({mem00=0x2572} => {mem00=0x2539, C=0})`
289			`mov r2, r5`
290
291			`mov #0x0001, r2 ;# Test 2: Low Byte`
292	111	olivier.gi	`mov #0x2573, &DMEM_202`
293			`mov #DMEM_202, r6`
294			`mov #0xaaaa, &DMEM_204`
295	2	olivier.gi	`rra.b @r6 ;# RRA.B ({mem01=0x2573} => {mem01=0x2539, C=1})`
296			`mov r2, r7`
297
298			`mov #0x0000, r2 ;# Test 3: Low Byte`
299	111	olivier.gi	`mov #0x2582, &DMEM_204`
300			`mov #DMEM_204, r8`
301			`mov #0xaaaa, &DMEM_206`
302	2	olivier.gi	`rra.b @r8 ;# RRA.B ({mem02=0x2582} => {mem02=0x25c1, C=0})`
303			`mov r2, r9`
304
305			`mov #0x0000, r2 ;# Test 4: Low Byte`
306	111	olivier.gi	`mov #0x2583, &DMEM_206`
307			`mov #DMEM_206, r10`
308			`mov #0xaaaa, &DMEM_208`
309	2	olivier.gi	`rra.b @r10 ;# RRA.B ({mem03=0x2583} => {mem03=0x25c1, C=1})`
310			`mov r2, r11`
311
312			`mov #0x9000, r15`
313
314			`# Addressing mode: @Rn (High Byte)`
315			`#---------------------------------`
316
317			`mov #0x0001, r2 ;# Test 1: High Byte`
318	111	olivier.gi	`mov #0x7225, &DMEM_208`
319			`mov #DMEM_209, r4`
320			`mov #0xaaaa, &DMEM_20A`
321	2	olivier.gi	`rra.b @r4 ;# RRA.B ({mem04=0x7225} => {mem04=0x3925, C=0})`
322			`mov r2, r6`
323
324			`mov #0x0001, r2 ;# Test 2: High Byte`
325	111	olivier.gi	`mov #0x7325, &DMEM_20A`
326			`mov #DMEM_20B, r6`
327			`mov #0xaaaa, &DMEM_20C`
328	2	olivier.gi	`rra.b @r6 ;# RRA.B ({mem05=0x7325} => {mem05=0x3925, C=1})`
329			`mov r2, r8`
330
331			`mov #0x0000, r2 ;# Test 3: High Byte`
332	111	olivier.gi	`mov #0x8225, &DMEM_20C`
333			`mov #DMEM_20D, r8`
334			`mov #0xaaaa, &DMEM_20E`
335	2	olivier.gi	`rra.b @r8 ;# RRA.B ({mem06=0x8225} => {mem06=0xc125, C=0})`
336			`mov r2, r10`
337
338			`mov #0x0000, r2 ;# Test 4: High Byte`
339	111	olivier.gi	`mov #0x8325, &DMEM_20E`
340			`mov #DMEM_20F, r10`
341			`mov #0xaaaa, &DMEM_210`
342	2	olivier.gi	`rra.b @r10 ;# RRA.B ({mem07=0x8325} => {mem07=0xc125, C=1})`
343			`mov r2, r11`
344
345			`mov #0x9001, r15`
346
347
348			`# Addressing mode: @Rn+ (Low Byte)`
349			`#---------------------------------`
350
351			`mov #0x0001, r2 ;# Test 1: Low Byte`
352	111	olivier.gi	`mov #0x2572, &DMEM_210`
353			`mov #DMEM_210, r4`
354			`mov #0xaaaa, &DMEM_212`
355	2	olivier.gi	`rra.b @r4+ ;# RRA.B ({mem08=0x2582} => {mem08=0x2539, C=0})`
356			`mov r2, r5`
357
358			`mov #0x0001, r2 ;# Test 2: Low Byte`
359	111	olivier.gi	`mov #0x2573, &DMEM_212`
360			`mov #DMEM_212, r6`
361			`mov #0xaaaa, &DMEM_214`
362	2	olivier.gi	`rra.b @r6+ ;# RRA.B ({mem09=0x2583} => {mem09=0x2539, C=1})`
363			`mov r2, r7`
364
365			`mov #0x0000, r2 ;# Test 3: Low Byte`
366	111	olivier.gi	`mov #0x2582, &DMEM_214`
367			`mov #DMEM_214, r8`
368			`mov #0xaaaa, &DMEM_216`
369	2	olivier.gi	`rra.b @r8+ ;# RRA.B ({mem0a=0x2572} => {mem0a=0x25c1, C=0})`
370			`mov r2, r9`
371
372			`mov #0x0000, r2 ;# Test 4: Low Byte`
373	111	olivier.gi	`mov #0x2583, &DMEM_216`
374			`mov #DMEM_216, r10`
375			`mov #0xaaaa, &DMEM_218`
376	2	olivier.gi	`rra.b @r10+ ;# RRA.B ({mem0b=0x2573} => {mem0b=0x25c1, C=1})`
377			`mov r2, r11`
378
379			`mov #0xA000, r15`
380
381			`# Addressing mode: @Rn+ (High Byte)`
382			`#-----------------------------------`
383
384			`mov #0x0001, r2 ;# Test 1: High Byte`
385	111	olivier.gi	`mov #0x7225, &DMEM_218`
386			`mov #DMEM_219, r4`
387			`mov #0xaaaa, &DMEM_21A`
388	2	olivier.gi	`rra.b @r4+ ;# RRA.B ({mem0c=0x7225} => {mem0c=0x3925, C=0})`
389			`mov r2, r6`
390
391			`mov #0x0001, r2 ;# Test 2: High Byte`
392	111	olivier.gi	`mov #0x7325, &DMEM_21A`
393			`mov #DMEM_21B, r6`
394			`mov #0xaaaa, &DMEM_21C`
395	2	olivier.gi	`rra.b @r6+ ;# RRA.B ({mem0d=0x7325} => {mem0d=0x3925, C=1})`
396			`mov r2, r8`
397
398			`mov #0x0000, r2 ;# Test 3: High Byte`
399	111	olivier.gi	`mov #0x8225, &DMEM_21C`
400			`mov #DMEM_21D, r8`
401			`mov #0xaaaa, &DMEM_21E`
402	2	olivier.gi	`rra.b @r8+ ;# RRA.B ({mem0e=0x8225} => {mem0e=0xc125, C=0})`
403			`mov r2, r10`
404
405			`mov #0x0000, r2 ;# Test 4: High Byte`
406	111	olivier.gi	`mov #0x8325, &DMEM_21E`
407			`mov #DMEM_21F, r10`
408			`mov #0xaaaa, &DMEM_220`
409	2	olivier.gi	`rra.b @r10+ ;# RRA.B ({mem0f=0x8325} => {mem0f=0xc125, C=1})`
410			`mov r2, r11`
411
412			`mov #0xA001, r15`
413
414
415			`# Addressing mode: X(Rn) (Low Byte)`
416			`#-----------------------------------`
417
418			`mov #0x0001, r2 ;# Test 1`
419	111	olivier.gi	`mov #0x2572, &DMEM_220`
420			`mov #DMEM_200, r4`
421			`mov #0xaaaa, &DMEM_222`
422	2	olivier.gi	`rra.b 32(r4) ;# RRA ({mem10=0x2572} => {mem10=0x2539, C=0})`
423			`mov r2, r5`
424
425			`mov #0x0001, r2 ;# Test 2`
426	111	olivier.gi	`mov #0x2573, &DMEM_222`
427			`mov #DMEM_200, r6`
428			`mov #0xaaaa, &DMEM_224`
429	2	olivier.gi	`rra.b 34(r6) ;# RRA ({mem11=0x2573} => {mem11=0x2539, C=1})`
430			`mov r2, r7`
431
432			`mov #0x0000, r2 ;# Test 3`
433	111	olivier.gi	`mov #0x2582, &DMEM_224`
434			`mov #DMEM_200, r8`
435			`mov #0xaaaa, &DMEM_226`
436	2	olivier.gi	`rra.b 36(r8) ;# RRA ({mem12=0x2582} => {mem12=0x25c1, C=0})`
437			`mov r2, r9`
438
439			`mov #0x0000, r2 ;# Test 4`
440	111	olivier.gi	`mov #0x2583, &DMEM_226`
441			`mov #DMEM_200, r10`
442			`mov #0xaaaa, &DMEM_228`
443	2	olivier.gi	`rra.b 38(r10) ;# RRA ({mem13=0x2583} => {mem13=0x25c1, C=1})`
444			`mov r2, r11`
445
446			`mov #0xB000, r15`
447
448			`# Addressing mode: X(Rn) (High Byte)`
449			`#------------------------------------`
450
451			`mov #0x0001, r2 ;# Test 1`
452	111	olivier.gi	`mov #0x7225, &DMEM_228`
453			`mov #DMEM_200, r4`
454			`mov #0xaaaa, &DMEM_22A`
455	2	olivier.gi	`rra.b 41(r4) ;# RRA ({mem14=0x7225} => {mem14=0x3925, C=0})`
456			`mov r2, r5`
457
458			`mov #0x0001, r2 ;# Test 2`
459	111	olivier.gi	`mov #0x7325, &DMEM_22A`
460			`mov #DMEM_200, r6`
461			`mov #0xaaaa, &DMEM_22C`
462	2	olivier.gi	`rra.b 43(r6) ;# RRA ({mem15=0x7325} => {mem15=0x3925, C=1})`
463			`mov r2, r7`
464
465			`mov #0x0000, r2 ;# Test 3`
466	111	olivier.gi	`mov #0x8225, &DMEM_22C`
467			`mov #DMEM_200, r8`
468			`mov #0xaaaa, &DMEM_22E`
469	2	olivier.gi	`rra.b 45(r8) ;# RRA ({mem16=0x8225} => {mem16=0xc125, C=0})`
470			`mov r2, r9`
471
472			`mov #0x0000, r2 ;# Test 4`
473	111	olivier.gi	`mov #0x8325, &DMEM_22E`
474			`mov #DMEM_200, r10`
475			`mov #0xaaaa, &DMEM_230`
476	2	olivier.gi	`rra.b 47(r10) ;# RRA ({mem17=0x8325} => {mem17=0xc125, C=1})`
477			`mov r2, r11`
478
479			`mov #0xB001, r15`
480
481
482			`# Addressing mode: EDE (Low Byte)`
483			`#---------------------------------`
484	200	olivier.gi	`.set EDE_230, DMEM_230+PMEM_EDE_LENGTH`
485			`.set EDE_232, DMEM_232+PMEM_EDE_LENGTH`
486			`.set EDE_234, DMEM_234+PMEM_EDE_LENGTH`
487			`.set EDE_236, DMEM_236+PMEM_EDE_LENGTH`
488	2	olivier.gi
489			`mov #0x0001, r2 ;# Test 1`
490	111	olivier.gi	`mov #0x2572, &DMEM_230`
491			`mov #0xaaaa, &DMEM_232`
492	200	olivier.gi	`rra.b EDE_230 ;# RRA ({mem18=0x2572} => {mem18=0x2539, C=0})`
493	2	olivier.gi	`mov r2, r5`
494
495			`mov #0x0001, r2 ;# Test 2`
496	111	olivier.gi	`mov #0x2573, &DMEM_232`
497			`mov #0xaaaa, &DMEM_234`
498	200	olivier.gi	`rra.b EDE_232 ;# RRA ({mem19=0x2573} => {mem19=0x2539, C=1})`
499	2	olivier.gi	`mov r2, r7`
500

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