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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_sxt.s43] - Blame information for rev 219

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Line No. Rev Author Line
1 2 olivier.gi
/*===========================================================================*/
2
/* Copyright (C) 2001 Authors                                                */
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/*                                                                           */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any   */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer.                                                               */
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/*                                                                           */
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/* This source file is free software; you can redistribute it and/or modify  */
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/* it under the terms of the GNU Lesser General Public License as published  */
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/* by the Free Software Foundation; either version 2.1 of the License, or    */
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/* (at your option) any later version.                                       */
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/*                                                                           */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
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/* License for more details.                                                 */
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/*                                                                           */
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/* You should have received a copy of the GNU Lesser General Public License  */
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/* along with this source; if not, write to the Free Software Foundation,    */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
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/*                                                                           */
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/*===========================================================================*/
24 18 olivier.gi
/*                 SINGLE-OPERAND ARITHMETIC: SXT  INSTRUCTION               */
25 2 olivier.gi
/*---------------------------------------------------------------------------*/
26 18 olivier.gi
/* Test the SXT  instruction.                                                */
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/*                                                                           */
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/* Author(s):                                                                */
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/*             - Olivier Girard,    olgirard@gmail.com                       */
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/*                                                                           */
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/*---------------------------------------------------------------------------*/
32 19 olivier.gi
/* $Rev: 200 $                                                                */
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/* $LastChangedBy: olivier.girard $                                          */
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/* $LastChangedDate: 2015-01-21 23:01:31 +0100 (Wed, 21 Jan 2015) $          */
35 2 olivier.gi
/*===========================================================================*/
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37 141 olivier.gi
.include "pmem_defs.asm"
38 2 olivier.gi
 
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.global main
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main:
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        /* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
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        # Addressing mode: Rn
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        #------------------------
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        mov     #0x0100, r2        ;# Test 1
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        mov     #0x7524, r4
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        sxt          r4            ;# SXT (r4=0x7524  =>  r4=0x0024)
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        mov          r2, r5
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        mov     #0x0100, r2        ;# Test 2
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        mov     #0x1cb6, r6
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        sxt          r6            ;# SXT (r6=0x1cb6  =>  r6=0xffb6)
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        mov          r2, r7
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        mov     #0x1000, r15
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        # Addressing mode: @Rn
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        #------------------------
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        mov     #0x0100, r2        ;# Test 1
65 111 olivier.gi
        mov     #0x7524, &DMEM_200
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        mov   #DMEM_200, r4
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        mov     #0xaaaa, &DMEM_202
68 2 olivier.gi
        sxt         @r4            ;# SXT (mem00=0x7524  => {mem00=0x0024)
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        mov          r2, r5
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        mov     #0x0100, r2        ;# Test 2
72 111 olivier.gi
        mov     #0x1cb6, &DMEM_202
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        mov   #DMEM_202, r6
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        mov     #0xaaaa, &DMEM_204
75 2 olivier.gi
        sxt         @r6            ;# SXT (mem01=0x1cb6  => {mem01=0xffb6)
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        mov          r2, r7
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        mov     #0x2000, r15
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        # Addressing mode: @Rn+
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        #------------------------
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        mov     #0x0100, r2        ;# Test 1
85 111 olivier.gi
        mov     #0x7524, &DMEM_208
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        mov   #DMEM_208, r4
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        mov     #0xaaaa, &DMEM_20A
88 2 olivier.gi
        sxt        @r4+            ;# SXT (mem04=0x7524  => {mem04=0x0024)
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        mov          r2, r5
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        mov     #0x0100, r2        ;# Test 2
92 111 olivier.gi
        mov     #0x1cb6, &DMEM_20A
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        mov   #DMEM_20A, r6
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        mov     #0xaaaa, &DMEM_20C
95 2 olivier.gi
        sxt        @r6+            ;# SXT (mem05=0x1cb6  => {mem05=0xffb6)
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        mov          r2, r7
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        mov     #0x3000, r15
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        # Addressing mode: X(Rn)
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        #------------------------
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        mov     #0x0100, r2        ;# Test 1
105 111 olivier.gi
        mov     #0x7524, &DMEM_210
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        mov   #DMEM_200, r4
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        mov     #0xaaaa, &DMEM_212
108 2 olivier.gi
        sxt       16(r4)            ;# SXT (mem08=0x7524  => {mem08=0x0024)
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        mov          r2, r5
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        mov     #0x0100, r2        ;# Test 2
112 111 olivier.gi
        mov     #0x1cb6, &DMEM_212
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        mov   #DMEM_200, r6
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        mov     #0xaaaa, &DMEM_214
115 2 olivier.gi
        sxt       18(r6)            ;# SXT (mem09=0x1cb6  => {mem09=0xffb6)
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        mov          r2, r7
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        mov     #0x4000, r15
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        # Addressing mode: EDE
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        #------------------------
123 200 olivier.gi
.set   EDE_218,  DMEM_218+PMEM_EDE_LENGTH
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.set   EDE_21A,  DMEM_21A+PMEM_EDE_LENGTH
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.set   EDE_21C,  DMEM_21C+PMEM_EDE_LENGTH
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.set   EDE_21E,  DMEM_21E+PMEM_EDE_LENGTH
127 2 olivier.gi
 
128
        mov     #0x0100, r2        ;# Test 1
129 111 olivier.gi
        mov     #0x7524, &DMEM_218
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        mov     #0xaaaa, &DMEM_21A
131 200 olivier.gi
        sxt     EDE_218            ;# SXT (mem0c=0x7524  => {mem0c=0x0024)
132 2 olivier.gi
        mov          r2, r5
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        mov     #0x0100, r2        ;# Test 2
135 111 olivier.gi
        mov     #0x1cb6, &DMEM_21A
136
        mov     #0xaaaa, &DMEM_21C
137 200 olivier.gi
        sxt     EDE_21A            ;# SXT (mem0d=0x1cb6  => {mem0d=0xffb6)
138 2 olivier.gi
        mov          r2, r7
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        mov     #0x5000, r15
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        # Addressing mode: &EDE
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        #------------------------
145 111 olivier.gi
.set   aEDE_220,  DMEM_220
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.set   aEDE_222,  DMEM_222
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.set   aEDE_224,  DMEM_224
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.set   aEDE_226,  DMEM_226
149 2 olivier.gi
 
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        mov     #0x0100, r2        ;# Test 1
151 111 olivier.gi
        mov     #0x7524, &DMEM_220
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        mov     #0xaaaa, &DMEM_222
153 2 olivier.gi
        sxt   &aEDE_220            ;# SXT (mem10=0x7524  => {mem10=0x0024)
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        mov          r2, r5
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156
        mov     #0x0100, r2        ;# Test 2
157 111 olivier.gi
        mov     #0x1cb6, &DMEM_222
158
        mov     #0xaaaa, &DMEM_224
159 2 olivier.gi
        sxt   &aEDE_222            ;# SXT (mem11=0x1cb6  => {mem11=0xffb6)
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        mov          r2, r7
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        mov     #0x6000, r15
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        /* ----------------------         END OF TEST        --------------- */
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end_of_test:
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        nop
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        br #0xffff
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        /* ----------------------         INTERRUPT VECTORS  --------------- */
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.section .vectors, "a"
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.word end_of_test  ; Interrupt  0 (lowest priority)    
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.word end_of_test  ; Interrupt  1                      
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.word end_of_test  ; Interrupt  2                      
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.word end_of_test  ; Interrupt  3                      
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.word end_of_test  ; Interrupt  4                      
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.word end_of_test  ; Interrupt  5                      
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.word end_of_test  ; Interrupt  6                      
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.word end_of_test  ; Interrupt  7                      
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.word end_of_test  ; Interrupt  8                      
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.word end_of_test  ; Interrupt  9                      
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.word end_of_test  ; Interrupt 10                      Watchdog timer
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.word end_of_test  ; Interrupt 11                      
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.word end_of_test  ; Interrupt 12                      
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.word end_of_test  ; Interrupt 13                      
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.word end_of_test  ; Interrupt 14                      NMI
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.word main         ; Interrupt 15 (highest priority)   RESET

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