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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [tA_capture.v] - Blame information for rev 19

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1 2 olivier.gi 
/*===========================================================================*/
2 
/* Copyright (C) 2001 Authors                                                */
3 
/*                                                                           */
4 
/* This source file may be used and distributed without restriction provided */
5 
/* that this copyright statement is not removed from the file and that any   */
6 
/* derivative work contains the original copyright notice and the associated */
7 
/* disclaimer.                                                               */
8 
/*                                                                           */
9 
/* This source file is free software; you can redistribute it and/or modify  */
10 
/* it under the terms of the GNU Lesser General Public License as published  */
11 
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12 
/* (at your option) any later version.                                       */
13 
/*                                                                           */
14 
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15 
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16 
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17 
/* License for more details.                                                 */
18 
/*                                                                           */
19 
/* You should have received a copy of the GNU Lesser General Public License  */
20 
/* along with this source; if not, write to the Free Software Foundation,    */
21 
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22 
/*                                                                           */
23 
/*===========================================================================*/
24 
/*                                  TIMER A                                  */
25 
/*---------------------------------------------------------------------------*/
26 
/* Test the timer A:                                                         */
27 
/*                        - Check the timer capture unit.                    */
28 18 olivier.gi 
/*                                                                           */
29 
/* Author(s):                                                                */
30 
/*             - Olivier Girard,    olgirard@gmail.com                       */
31 
/*                                                                           */
32 
/*---------------------------------------------------------------------------*/
33 19 olivier.gi 
/* $Rev: 19 $                                                                */
34 
/* $LastChangedBy: olivier.girard $                                          */
35 
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
36 2 olivier.gi 
/*===========================================================================*/
37 
 
38 
integer my_counter;
39 
always @ (posedge mclk)
40 
  my_counter <=  my_counter+1;
41 
 
42 
wire [15:0] tar = timerA_0.tar;
43 
 
44 
initial
45 
   begin
46 
      $display(" ===============================================");
47 
      $display("|                 START SIMULATION              |");
48 
      $display(" ===============================================");
49 
      repeat(5) @(posedge mclk);
50 
      stimulus_done = 0;
51 
 
52 
      // TIMER A TEST:  INPUT MUX (CCI)
53 
      //--------------------------------------------------------
54 
 
55 
                                // --------- Comparator 0 ----------
56 
      @(mem200 === 16'h0001);
57 
      ta_cci0a = 1'b1;
58 
      ta_cci0b = 1'b0;
59 
      ta_cci1a = 1'b0;
60 
      ta_cci1b = 1'b0;
61 
      ta_cci2a = 1'b0;
62 
      ta_cci2b = 1'b0;
63 
      @(mem200 === 16'h0002);
64 
      ta_cci0a = 1'b0;
65 
      ta_cci0b = 1'b1;
66 
      ta_cci1a = 1'b1;
67 
      ta_cci1b = 1'b1;
68 
      ta_cci2a = 1'b1;
69 
      ta_cci2b = 1'b1;
70 
      @(mem200 === 16'h0003);
71 
      if (mem202 !== 16'h0008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - CCIxA =====");
72 
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - CCIxA =====");
73 
 
74 
      @(mem200 === 16'h0004);
75 
      ta_cci0a = 1'b0;
76 
      ta_cci0b = 1'b1;
77 
      ta_cci1a = 1'b0;
78 
      ta_cci1b = 1'b0;
79 
      ta_cci2a = 1'b0;
80 
      ta_cci2b = 1'b0;
81 
      @(mem200 === 16'h0005);
82 
      ta_cci0a = 1'b1;
83 
      ta_cci0b = 1'b0;
84 
      ta_cci1a = 1'b1;
85 
      ta_cci1b = 1'b1;
86 
      ta_cci2a = 1'b1;
87 
      ta_cci2b = 1'b1;
88 
      @(mem200 === 16'h0006);
89 
      if (mem202 !== 16'h1008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - CCIxB =====");
90 
      if (mem204 !== 16'h1000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - CCIxB =====");
91 
 
92 
      @(mem200 === 16'h0007);
93 
      ta_cci0a = 1'b0;
94 
      ta_cci0b = 1'b0;
95 
      ta_cci1a = 1'b0;
96 
      ta_cci1b = 1'b0;
97 
      ta_cci2a = 1'b0;
98 
      ta_cci2b = 1'b0;
99 
      @(mem200 === 16'h0008);
100 
      ta_cci0a = 1'b1;
101 
      ta_cci0b = 1'b1;
102 
      ta_cci1a = 1'b1;
103 
      ta_cci1b = 1'b1;
104 
      ta_cci2a = 1'b1;
105 
      ta_cci2b = 1'b1;
106 
      @(mem200 === 16'h0009);
107 
      if (mem202 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - GND =====");
108 
      if (mem204 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - GND =====");
109 
 
110 
      @(mem200 === 16'h000A);
111 
      ta_cci0a = 1'b0;
112 
      ta_cci0b = 1'b0;
113 
      ta_cci1a = 1'b0;
114 
      ta_cci1b = 1'b0;
115 
      ta_cci2a = 1'b0;
116 
      ta_cci2b = 1'b0;
117 
      @(mem200 === 16'h000B);
118 
      ta_cci0a = 1'b1;
119 
      ta_cci0b = 1'b1;
120 
      ta_cci1a = 1'b1;
121 
      ta_cci1b = 1'b1;
122 
      ta_cci2a = 1'b1;
123 
      ta_cci2b = 1'b1;
124 
      @(mem200 === 16'h000C);
125 
      if (mem202 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - VDD =====");
126 
      if (mem204 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 0 - VDD =====");
127 
 
128 
 
129 
                                // --------- Comparator 1 ----------
130 
      @(mem200 === 16'h0011);
131 
      ta_cci0a = 1'b0;
132 
      ta_cci0b = 1'b0;
133 
      ta_cci1a = 1'b1;
134 
      ta_cci1b = 1'b0;
135 
      ta_cci2a = 1'b0;
136 
      ta_cci2b = 1'b0;
137 
      @(mem200 === 16'h0012);
138 
      ta_cci0a = 1'b1;
139 
      ta_cci0b = 1'b1;
140 
      ta_cci1a = 1'b0;
141 
      ta_cci1b = 1'b1;
142 
      ta_cci2a = 1'b1;
143 
      ta_cci2b = 1'b1;
144 
      @(mem200 === 16'h0013);
145 
      if (mem202 !== 16'h0008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - CCIxA =====");
146 
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - CCIxA =====");
147 
 
148 
      @(mem200 === 16'h0014);
149 
      ta_cci0a = 1'b0;
150 
      ta_cci0b = 1'b0;
151 
      ta_cci1a = 1'b0;
152 
      ta_cci1b = 1'b1;
153 
      ta_cci2a = 1'b0;
154 
      ta_cci2b = 1'b0;
155 
      @(mem200 === 16'h0015);
156 
      ta_cci0a = 1'b1;
157 
      ta_cci0b = 1'b1;
158 
      ta_cci1a = 1'b1;
159 
      ta_cci1b = 1'b0;
160 
      ta_cci2a = 1'b1;
161 
      ta_cci2b = 1'b1;
162 
      @(mem200 === 16'h0016);
163 
      if (mem202 !== 16'h1008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - CCIxB =====");
164 
      if (mem204 !== 16'h1000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - CCIxB =====");
165 
 
166 
      @(mem200 === 16'h0017);
167 
      ta_cci0a = 1'b0;
168 
      ta_cci0b = 1'b0;
169 
      ta_cci1a = 1'b0;
170 
      ta_cci1b = 1'b0;
171 
      ta_cci2a = 1'b0;
172 
      ta_cci2b = 1'b0;
173 
      @(mem200 === 16'h0018);
174 
      ta_cci0a = 1'b1;
175 
      ta_cci0b = 1'b1;
176 
      ta_cci1a = 1'b1;
177 
      ta_cci1b = 1'b1;
178 
      ta_cci2a = 1'b1;
179 
      ta_cci2b = 1'b1;
180 
      @(mem200 === 16'h0019);
181 
      if (mem202 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - GND =====");
182 
      if (mem204 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - GND =====");
183 
 
184 
      @(mem200 === 16'h001A);
185 
      ta_cci0a = 1'b0;
186 
      ta_cci0b = 1'b0;
187 
      ta_cci1a = 1'b0;
188 
      ta_cci1b = 1'b0;
189 
      ta_cci2a = 1'b0;
190 
      ta_cci2b = 1'b0;
191 
      @(mem200 === 16'h001B);
192 
      ta_cci0a = 1'b1;
193 
      ta_cci0b = 1'b1;
194 
      ta_cci1a = 1'b1;
195 
      ta_cci1b = 1'b1;
196 
      ta_cci2a = 1'b1;
197 
      ta_cci2b = 1'b1;
198 
      @(mem200 === 16'h001C);
199 
      if (mem202 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - VDD =====");
200 
      if (mem204 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 1 - VDD =====");
201 
 
202 
 
203 
                                // --------- Comparator 2 ----------
204 
      @(mem200 === 16'h0021);
205 
      ta_cci0a = 1'b0;
206 
      ta_cci0b = 1'b0;
207 
      ta_cci1a = 1'b0;
208 
      ta_cci1b = 1'b0;
209 
      ta_cci2a = 1'b1;
210 
      ta_cci2b = 1'b0;
211 
      @(mem200 === 16'h0022);
212 
      ta_cci0a = 1'b1;
213 
      ta_cci0b = 1'b1;
214 
      ta_cci1a = 1'b1;
215 
      ta_cci1b = 1'b1;
216 
      ta_cci2a = 1'b0;
217 
      ta_cci2b = 1'b1;
218 
      @(mem200 === 16'h0023);
219 
      if (mem202 !== 16'h0008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - CCIxA =====");
220 
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - CCIxA =====");
221 
 
222 
      @(mem200 === 16'h0024);
223 
      ta_cci0a = 1'b0;
224 
      ta_cci0b = 1'b0;
225 
      ta_cci1a = 1'b0;
226 
      ta_cci1b = 1'b0;
227 
      ta_cci2a = 1'b0;
228 
      ta_cci2b = 1'b1;
229 
      @(mem200 === 16'h0025);
230 
      ta_cci0a = 1'b1;
231 
      ta_cci0b = 1'b1;
232 
      ta_cci1a = 1'b1;
233 
      ta_cci1b = 1'b1;
234 
      ta_cci2a = 1'b1;
235 
      ta_cci2b = 1'b0;
236 
      @(mem200 === 16'h0026);
237 
      if (mem202 !== 16'h1008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - CCIxB =====");
238 
      if (mem204 !== 16'h1000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - CCIxB =====");
239 
 
240 
      @(mem200 === 16'h0027);
241 
      ta_cci0a = 1'b0;
242 
      ta_cci0b = 1'b0;
243 
      ta_cci1a = 1'b0;
244 
      ta_cci1b = 1'b0;
245 
      ta_cci2a = 1'b0;
246 
      ta_cci2b = 1'b0;
247 
      @(mem200 === 16'h0028);
248 
      ta_cci0a = 1'b1;
249 
      ta_cci0b = 1'b1;
250 
      ta_cci1a = 1'b1;
251 
      ta_cci1b = 1'b1;
252 
      ta_cci2a = 1'b1;
253 
      ta_cci2b = 1'b1;
254 
      @(mem200 === 16'h0029);
255 
      if (mem202 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - GND =====");
256 
      if (mem204 !== 16'h2000) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - GND =====");
257 
 
258 
      @(mem200 === 16'h002A);
259 
      ta_cci0a = 1'b0;
260 
      ta_cci0b = 1'b0;
261 
      ta_cci1a = 1'b0;
262 
      ta_cci1b = 1'b0;
263 
      ta_cci2a = 1'b0;
264 
      ta_cci2b = 1'b0;
265 
      @(mem200 === 16'h002B);
266 
      ta_cci0a = 1'b1;
267 
      ta_cci0b = 1'b1;
268 
      ta_cci1a = 1'b1;
269 
      ta_cci1b = 1'b1;
270 
      ta_cci2a = 1'b1;
271 
      ta_cci2b = 1'b1;
272 
      @(mem200 === 16'h002C);
273 
      if (mem202 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - VDD =====");
274 
      if (mem204 !== 16'h3008) tb_error("====== TIMER_A INPUT MUX: COMPARATOR 2 - VDD =====");
275 
      ta_cci0a = 1'b0;
276 
      ta_cci0b = 1'b0;
277 
      ta_cci1a = 1'b0;
278 
      ta_cci1b = 1'b0;
279 
      ta_cci2a = 1'b0;
280 
      ta_cci2b = 1'b0;
281 
 
282 
 
283 
      // TIMER A TEST:  CAPTURE, EDGE SELECTION AND INTERRUPT
284 
      //--------------------------------------------------------
285 
      @(r15 === 16'h1000);
286 
 
287 
                                // --------- Comparator 0 ----------
288 
      @(mem200 === 16'h0001);
289 
      ta_cci0a = 1'b1;
290 
      repeat(5) @(posedge mclk);
291 
      if (irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: NO CAPTURE 1 =====");
292 
      @(mem200 === 16'h0002);
293 
      ta_cci0a = 1'b0;
294 
      repeat(5) @(posedge mclk);
295 
      if (irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: NO CAPTURE 2 =====");
296 
      @(mem200 === 16'h0003);
297 
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: NO CAPTURE 3 =====");
298 
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: NO CAPTURE 4 =====");
299 
 
300 
      @(mem200 === 16'h0004);
301 
      ta_cci0a = 1'b1;
302 
      repeat(5) @(posedge mclk);
303 
      if (!irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING EDGE 1 =====");
304 
      @(mem200 === 16'h0005);
305 
      ta_cci0a = 1'b0;
306 
      repeat(5) @(posedge mclk);
307 
      if (irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING EDGE 2 =====");
308 
      @(mem200 === 16'h0006);
309 
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING EDGE 3 =====");
310 
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING EDGE 4 =====");
311 
 
312 
      @(mem200 === 16'h0007);
313 
      ta_cci0a = 1'b1;
314 
      repeat(5) @(posedge mclk);
315 
      if (irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: FALLING EDGE 1 =====");
316 
      @(mem200 === 16'h0008);
317 
      ta_cci0a = 1'b0;
318 
      repeat(5) @(posedge mclk);
319 
      if (!irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: FALLING EDGE 2 =====");
320 
      @(mem200 === 16'h0009);
321 
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: FALLING EDGE 3 =====");
322 
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: FALLING EDGE 4 =====");
323 
 
324 
      @(mem200 === 16'h000A);
325 
      ta_cci0a = 1'b1;
326 
      repeat(5) @(posedge mclk);
327 
      if (!irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING/FALLING EDGE 1 =====");
328 
      @(mem200 === 16'h000B);
329 
      ta_cci0a = 1'b0;
330 
      repeat(5) @(posedge mclk);
331 
      if (!irq_ta0) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING/FALLING EDGE 2 =====");
332 
      @(mem200 === 16'h000C);
333 
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING/FALLING EDGE 3 =====");
334 
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 0: RISING/FALLING EDGE 4 =====");
335 
 
336 
 
337 
                                // --------- comparator 1 ----------
338 
      @(mem200 === 16'h0001);
339 
      ta_cci1a = 1'b1;
340 
      repeat(5) @(posedge mclk);
341 
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: NO CAPTURE 1 =====");
342 
      @(mem200 === 16'h0002);
343 
      ta_cci1a = 1'b0;
344 
      repeat(5) @(posedge mclk);
345 
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: NO CAPTURE 2 =====");
346 
      @(mem200 === 16'h0003);
347 
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: NO CAPTURE 3 =====");
348 
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: NO CAPTURE 4 =====");
349 
 
350 
      @(mem200 === 16'h0004);
351 
      ta_cci1a = 1'b1;
352 
      repeat(5) @(posedge mclk);
353 
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING EDGE 1 =====");
354 
      @(mem200 === 16'h0005);
355 
      ta_cci1a = 1'b0;
356 
      repeat(5) @(posedge mclk);
357 
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING EDGE 2 =====");
358 
      @(mem200 === 16'h0006);
359 
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING EDGE 3 =====");
360 
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING EDGE 4 =====");
361 
 
362 
      @(mem200 === 16'h0007);
363 
      ta_cci1a = 1'b1;
364 
      repeat(5) @(posedge mclk);
365 
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: FALLING EDGE 1 =====");
366 
      @(mem200 === 16'h0008);
367 
      ta_cci1a = 1'b0;
368 
      repeat(5) @(posedge mclk);
369 
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: FALLING EDGE 2 =====");
370 
      @(mem200 === 16'h0009);
371 
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: FALLING EDGE 3 =====");
372 
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: FALLING EDGE 4 =====");
373 
 
374 
      @(mem200 === 16'h000A);
375 
      ta_cci1a = 1'b1;
376 
      repeat(5) @(posedge mclk);
377 
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING/FALLING EDGE 1 =====");
378 
      @(mem200 === 16'h000B);
379 
      ta_cci1a = 1'b0;
380 
      repeat(5) @(posedge mclk);
381 
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING/FALLING EDGE 2 =====");
382 
      @(mem200 === 16'h000C);
383 
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING/FALLING EDGE 3 =====");
384 
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 1: RISING/FALLING EDGE 4 =====");
385 
 
386 
 
387 
                                // --------- comparator 2 ----------
388 
      @(mem200 === 16'h0001);
389 
      ta_cci2a = 1'b1;
390 
      repeat(5) @(posedge mclk);
391 
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: NO CAPTURE 1 =====");
392 
      @(mem200 === 16'h0002);
393 
      ta_cci2a = 1'b0;
394 
      repeat(5) @(posedge mclk);
395 
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: NO CAPTURE 2 =====");
396 
      @(mem200 === 16'h0003);
397 
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: NO CAPTURE 3 =====");
398 
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: NO CAPTURE 4 =====");
399 
 
400 
      @(mem200 === 16'h0004);
401 
      ta_cci2a = 1'b1;
402 
      repeat(5) @(posedge mclk);
403 
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING EDGE 1 =====");
404 
      @(mem200 === 16'h0005);
405 
      ta_cci2a = 1'b0;
406 
      repeat(5) @(posedge mclk);
407 
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING EDGE 2 =====");
408 
      @(mem200 === 16'h0006);
409 
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING EDGE 3 =====");
410 
      if (mem204 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING EDGE 4 =====");
411 
 
412 
      @(mem200 === 16'h0007);
413 
      ta_cci2a = 1'b1;
414 
      repeat(5) @(posedge mclk);
415 
      if (irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: FALLING EDGE 1 =====");
416 
      @(mem200 === 16'h0008);
417 
      ta_cci2a = 1'b0;
418 
      repeat(5) @(posedge mclk);
419 
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: FALLING EDGE 2 =====");
420 
      @(mem200 === 16'h0009);
421 
      if (mem202 !== 16'h0000) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: FALLING EDGE 3 =====");
422 
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: FALLING EDGE 4 =====");
423 
 
424 
      @(mem200 === 16'h000A);
425 
      ta_cci2a = 1'b1;
426 
      repeat(5) @(posedge mclk);
427 
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING/FALLING EDGE 1 =====");
428 
      @(mem200 === 16'h000B);
429 
      ta_cci2a = 1'b0;
430 
      repeat(5) @(posedge mclk);
431 
      if (!irq_ta1) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING/FALLING EDGE 2 =====");
432 
      @(mem200 === 16'h000C);
433 
      if (mem202 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING/FALLING EDGE 3 =====");
434 
      if (mem204 !== 16'h1234) tb_error("====== TIMER_A CAPTURE, EDGE SELECTION AND INTERRUPT COMPARATOR 2: RISING/FALLING EDGE 4 =====");
435 
 
436 
 
437 
      // TIMER A TEST:  CAPTURE OVERFLOW
438 
      //--------------------------------------------------------
439 
      @(r15 === 16'h2000);
440 
 
441 
                                // --------- Comparator 0 ----------
442 
      @(mem200 === 16'h0001);
443 
      ta_cci0a = 1'b1;
444 
      @(mem200 === 16'h0002);
445 
      ta_cci0a = 1'b0;
446 
      @(mem200 === 16'h0003);
447 
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 0 =====");
448 
      if (mem204 !== 16'hC002) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 0 =====");
449 
 
450 
      @(mem200 === 16'h0004);
451 
      ta_cci0a = 1'b1;
452 
      @(mem200 === 16'h0005);
453 
      ta_cci0a = 1'b0;
454 
      @(mem200 === 16'h0006);
455 
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 0 =====");
456 
      if (mem204 !== 16'hC000) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 0 =====");
457 
 
458 
 
459 
                                // --------- Comparator 1 ----------
460 
      @(mem200 === 16'h0001);
461 
      ta_cci1a = 1'b1;
462 
      @(mem200 === 16'h0002);
463 
      ta_cci1a = 1'b0;
464 
      @(mem200 === 16'h0003);
465 
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 1 =====");
466 
      if (mem204 !== 16'hC002) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 1 =====");
467 
 
468 
      @(mem200 === 16'h0004);
469 
      ta_cci1a = 1'b1;
470 
      @(mem200 === 16'h0005);
471 
      ta_cci1a = 1'b0;
472 
      @(mem200 === 16'h0006);
473 
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 1 =====");
474 
      if (mem204 !== 16'hC000) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 1 =====");
475 
 
476 
 
477 
                                // --------- Comparator 2 ----------
478 
      @(mem200 === 16'h0001);
479 
      ta_cci2a = 1'b1;
480 
      @(mem200 === 16'h0002);
481 
      ta_cci2a = 1'b0;
482 
      @(mem200 === 16'h0003);
483 
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 2 =====");
484 
      if (mem204 !== 16'hC002) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 2 =====");
485 
 
486 
      @(mem200 === 16'h0004);
487 
      ta_cci2a = 1'b1;
488 
      @(mem200 === 16'h0005);
489 
      ta_cci2a = 1'b0;
490 
      @(mem200 === 16'h0006);
491 
      if (mem202 !== 16'hC008) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 2 =====");
492 
      if (mem204 !== 16'hC000) tb_error("====== TIMER_A CAPTURE OVERFLOW: COMPARATOR 2 =====");
493 
 
494 
 
495 
 
496 
      stimulus_done = 1;
497 
   end
498 
 

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