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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [two-op_add-b.v] - Blame information for rev 145

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Line No. Rev Author Line
1 2 olivier.gi 
/*===========================================================================*/
2 
/* Copyright (C) 2001 Authors                                                */
3 
/*                                                                           */
4 
/* This source file may be used and distributed without restriction provided */
5 
/* that this copyright statement is not removed from the file and that any   */
6 
/* derivative work contains the original copyright notice and the associated */
7 
/* disclaimer.                                                               */
8 
/*                                                                           */
9 
/* This source file is free software; you can redistribute it and/or modify  */
10 
/* it under the terms of the GNU Lesser General Public License as published  */
11 
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12 
/* (at your option) any later version.                                       */
13 
/*                                                                           */
14 
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15 
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16 
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17 
/* License for more details.                                                 */
18 
/*                                                                           */
19 
/* You should have received a copy of the GNU Lesser General Public License  */
20 
/* along with this source; if not, write to the Free Software Foundation,    */
21 
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22 
/*                                                                           */
23 
/*===========================================================================*/
24 
/*                   TWO-OPERAND ARITHMETIC: ADD.B INSTRUCTION               */
25 
/*---------------------------------------------------------------------------*/
26 
/* Test the ADD.B instruction with all addressing modes                      */
27 18 olivier.gi 
/*                                                                           */
28 
/* Author(s):                                                                */
29 
/*             - Olivier Girard,    olgirard@gmail.com                       */
30 
/*                                                                           */
31 
/*---------------------------------------------------------------------------*/
32 19 olivier.gi 
/* $Rev: 134 $                                                                */
33 
/* $LastChangedBy: olivier.girard $                                          */
34 
/* $LastChangedDate: 2012-03-22 21:31:06 +0100 (Thu, 22 Mar 2012) $          */
35 2 olivier.gi 
/*===========================================================================*/
36 
 
37 
initial
38 
   begin
39 
      $display(" ===============================================");
40 
      $display("|                 START SIMULATION              |");
41 
      $display(" ===============================================");
42 
      repeat(5) @(posedge mclk);
43 
      stimulus_done = 0;
44 
 
45 
      // Check reset values
46 
      //--------------------------------------------------------
47 
      if (r2 !==16'h0000) tb_error("R2  reset value");
48 
      if (r3 !==16'h0000) tb_error("R3  reset value");
49 
      if (r4 !==16'h0000) tb_error("R4  reset value");
50 
      if (r5 !==16'h0000) tb_error("R5  reset value");
51 
      if (r6 !==16'h0000) tb_error("R6  reset value");
52 
      if (r7 !==16'h0000) tb_error("R7  reset value");
53 
      if (r8 !==16'h0000) tb_error("R8  reset value");
54 
      if (r9 !==16'h0000) tb_error("R9  reset value");
55 
      if (r10!==16'h0000) tb_error("R10 reset value");
56 
      if (r11!==16'h0000) tb_error("R11 reset value");
57 
      if (r12!==16'h0000) tb_error("R12 reset value");
58 
      if (r13!==16'h0000) tb_error("R13 reset value");
59 
      if (r14!==16'h0000) tb_error("R14 reset value");
60 
      if (r15!==16'h0000) tb_error("R15 reset value");
61 
 
62 
 
63 
      // Make sure initialization worked fine
64 
      //--------------------------------------------------------
65 
      @(r15==16'h1000);
66 
 
67 134 olivier.gi 
      if (r2 !==16'h0002) tb_error("R2  initialization");
68 2 olivier.gi 
      if (r3 !==16'h3333) tb_error("R3  initialization");
69 
      if (r4 !==16'h4444) tb_error("R4  initialization");
70 
      if (r5 !==16'h5555) tb_error("R5  initialization");
71 
      if (r6 !==16'h6666) tb_error("R6  initialization");
72 
      if (r7 !==16'h7777) tb_error("R7  initialization");
73 
      if (r8 !==16'h8888) tb_error("R8  initialization");
74 
      if (r9 !==16'h9999) tb_error("R9  initialization");
75 
      if (r10!==16'haaaa) tb_error("R10 initialization");
76 
      if (r11!==16'hbbbb) tb_error("R11 initialization");
77 
      if (r12!==16'hcccc) tb_error("R12 initialization");
78 
      if (r13!==16'hdddd) tb_error("R13 initialization");
79 
      if (r14!==16'heeee) tb_error("R14 initialization");
80 
 
81 
 
82 
      // ADD.B: Check when source is Rn
83 
      //--------------------------------------------------------
84 
      @(r15==16'h2000);
85 
 
86 
      if (r4     !==16'h00cc) tb_error("====== ADD.B Rn Rm    =====");
87 
 
88 
      if (mem210 !==16'haaef) tb_error("====== ADD.B Rn x(Rm) =====");
89 
      if (mem212 !==16'hcd66) tb_error("====== ADD.B Rn x(Rm) =====");
90 
 
91 
      if (mem214 !==16'h11ef) tb_error("====== ADD.B Rn EDE   =====");
92 
      if (mem216 !==16'habaa) tb_error("====== ADD.B Rn EDE   =====");
93 
 
94 
      if (mem218 !==16'h77b6) tb_error("====== ADD.B Rn &EDE  =====");
95 
      if (mem21A !==16'h7f44) tb_error("====== ADD.B Rn &EDE  =====");
96 
 
97 
 
98 
      // ADD.B: Check when source is @Rn
99 
      //--------------------------------------------------------
100 
      @(r15==16'h3000);
101 
 
102 
      if (r5     !==16'h0032) tb_error("====== ADD.B @Rn Rm    =====");
103 
      if (r6     !==16'h0021) tb_error("====== ADD.B @Rn Rm    =====");
104 
 
105 
      if (mem210 !==16'h55cc) tb_error("====== ADD.B @Rn x(Rm) =====");
106 
      if (mem212 !==16'haabb) tb_error("====== ADD.B @Rn x(Rm) =====");
107 
      if (mem214 !==16'h5600) tb_error("====== ADD.B @Rn x(Rm) =====");
108 
      if (mem216 !==16'hdcba) tb_error("====== ADD.B @Rn x(Rm) =====");
109 
 
110 
      if (mem218 !==16'h1198) tb_error("====== ADD.B @Rn EDE =====");
111 
      if (mem21A !==16'heedd) tb_error("====== ADD.B @Rn EDE =====");
112 
      if (mem21C !==16'h1dbf) tb_error("====== ADD.B @Rn EDE =====");
113 
      if (mem21E !==16'hd02e) tb_error("====== ADD.B @Rn EDE =====");
114 
 
115 
      if (mem220 !==16'h2210) tb_error("====== ADD.B @Rn &EDE  =====");
116 
      if (mem222 !==16'h88cc) tb_error("====== ADD.B @Rn &EDE  =====");
117 
      if (mem224 !==16'h2c39) tb_error("====== ADD.B @Rn &EDE  =====");
118 
      if (mem226 !==16'h4a3d) tb_error("====== ADD.B @Rn &EDE  =====");
119 
 
120 
 
121 
      // ADD.B: Check when source is @Rn+
122 
      //--------------------------------------------------------
123 
      @(r15==16'h4000);
124 
 
125 111 olivier.gi 
      if (r4     !==(`PER_SIZE+16'h0011)) tb_error("====== ADD.B @Rn+ Rm    =====");
126 
      if (r5     !==16'h0052)             tb_error("====== ADD.B @Rn+ Rm    =====");
127 
      if (r6     !==(`PER_SIZE+16'h0014)) tb_error("====== ADD.B @Rn+ Rm    =====");
128 
      if (r7     !==16'h0035)             tb_error("====== ADD.B @Rn+ Rm    =====");
129 2 olivier.gi 
 
130 111 olivier.gi 
      if (mem210 !==16'haadd)             tb_error("====== ADD.B @Rn+ x(Rm) =====");
131 
      if (mem212 !==16'h9966)             tb_error("====== ADD.B @Rn+ x(Rm) =====");
132 
      if (mem214 !==16'h5ac0)             tb_error("====== ADD.B @Rn+ x(Rm) =====");
133 
      if (mem216 !==16'h1cb6)             tb_error("====== ADD.B @Rn+ x(Rm) =====");
134 
      if (r9     !==(`PER_SIZE+16'h0008)) tb_error("====== ADD.B @Rn+ x(Rm) =====");
135 2 olivier.gi 
 
136 111 olivier.gi 
      if (mem218 !==16'h11cc)             tb_error("====== ADD.B @Rn+ EDE 1=====");
137 
      if (mem21A !==16'hbaff)             tb_error("====== ADD.B @Rn+ EDE 2=====");
138 
      if (mem21C !==16'h1e0c)             tb_error("====== ADD.B @Rn+ EDE 3=====");
139 
      if (mem21E !==16'he0f2)             tb_error("====== ADD.B @Rn+ EDE 4=====");
140 
      if (r10    !==(`PER_SIZE+16'h0008)) tb_error("====== ADD.B @Rn+ EDE 5=====");
141 2 olivier.gi 
 
142 111 olivier.gi 
      if (mem220 !==16'h5599)             tb_error("====== ADD.B @Rn+ &EDE  =====");
143 
      if (mem222 !==16'h21dd)             tb_error("====== ADD.B @Rn+ &EDE  =====");
144 
      if (mem224 !==16'h5cd3)             tb_error("====== ADD.B @Rn+ &EDE  =====");
145 
      if (mem226 !==16'h4dd6)             tb_error("====== ADD.B @Rn+ &EDE  =====");
146 
      if (r11    !==(`PER_SIZE+16'h0008)) tb_error("====== ADD.B @Rn+ &EDE  =====");
147 2 olivier.gi 
 
148 
 
149 
      // ADD.B: Check when source is #N
150 
      //--------------------------------------------------------
151 
      @(r15==16'h5000);
152 
 
153 
      if (r4     !==16'h008a) tb_error("====== ADD.B #N  Rm    =====");
154 
 
155 
      if (mem210 !==16'haabb) tb_error("====== ADD.B #N  x(Rm) =====");
156 
      if (mem212 !==16'h9944) tb_error("====== ADD.B #N  x(Rm) =====");
157 
      if (mem214 !==16'ha9ba) tb_error("====== ADD.B #N  x(Rm) =====");
158 
      if (mem216 !==16'hd15a) tb_error("====== ADD.B #N  x(Rm) =====");
159 
 
160 
      if (mem218 !==16'h11cc) tb_error("====== ADD.B #N  EDE =====");
161 
      if (mem21A !==16'hbacc) tb_error("====== ADD.B #N  EDE =====");
162 
      if (mem21C !==16'h1e1a) tb_error("====== ADD.B #N  EDE =====");
163 
      if (mem21E !==16'hf2c2) tb_error("====== ADD.B #N  EDE =====");
164 
 
165 
      if (mem220 !==16'haabb) tb_error("====== ADD.B #N  &EDE  =====");
166 
      if (mem222 !==16'h77ee) tb_error("====== ADD.B #N  &EDE  =====");
167 
      if (mem224 !==16'ha205) tb_error("====== ADD.B #N  &EDE  =====");
168 
      if (mem226 !==16'hc3e8) tb_error("====== ADD.B #N  &EDE  =====");
169 
 
170 
 
171 
      // ADD.B: Check when source is x(Rn)
172 
      //--------------------------------------------------------
173 
      @(r15==16'h6000);
174 
 
175 
      if (r5     !==16'h00cb) tb_error("====== ADD.B x(Rn) Rm    =====");
176 
      if (r6     !==16'h0098) tb_error("====== ADD.B x(Rn) Rm    =====");
177 
 
178 
      if (mem210 !==16'haa33) tb_error("====== ADD.B x(Rn) x(Rm) =====");
179 
      if (mem212 !==16'h6655) tb_error("====== ADD.B x(Rn) x(Rm) =====");
180 
      if (mem214 !==16'ha26a) tb_error("====== ADD.B x(Rn) x(Rm) =====");
181 
      if (mem216 !==16'ha151) tb_error("====== ADD.B x(Rn) x(Rm) =====");
182 
 
183 
      if (mem218 !==16'h33ee) tb_error("====== ADD.B x(Rn) EDE =====");
184 
      if (mem21A !==16'h43cc) tb_error("====== ADD.B x(Rn) EDE =====");
185 
      if (mem21C !==16'h3729) tb_error("====== ADD.B x(Rn) EDE =====");
186 
      if (mem21E !==16'h72c4) tb_error("====== ADD.B x(Rn) EDE =====");
187 
 
188 
      if (mem220 !==16'h0044) tb_error("====== ADD.B x(Rn) &EDE  =====");
189 
      if (mem222 !==16'h32cc) tb_error("====== ADD.B x(Rn) &EDE  =====");
190 
      if (mem224 !==16'h0d82) tb_error("====== ADD.B x(Rn) &EDE  =====");
191 
      if (mem226 !==16'h58c1) tb_error("====== ADD.B x(Rn) &EDE  =====");
192 
 
193 
 
194 
      // ADD.B: Check when source is EDE
195 
      //--------------------------------------------------------
196 
      @(r15==16'h7000);
197 
 
198 
      if (r5     !==16'h0076) tb_error("====== ADD.B EDE  Rm    =====");
199 
      if (r6     !==16'h00e9) tb_error("====== ADD.B EDE  Rm    =====");
200 
 
201 
      if (mem210 !==16'haadd) tb_error("====== ADD.B EDE  x(Rm) =====");
202 
      if (mem212 !==16'haa55) tb_error("====== ADD.B EDE  x(Rm) =====");
203 
      if (mem214 !==16'ha60a) tb_error("====== ADD.B EDE  x(Rm) =====");
204 
      if (mem216 !==16'he15b) tb_error("====== ADD.B EDE  x(Rm) =====");
205 
 
206 
      if (mem218 !==16'h11cc) tb_error("====== ADD.B EDE  EDE =====");
207 
      if (mem21A !==16'hbaff) tb_error("====== ADD.B EDE  EDE =====");
208 
      if (mem21C !==16'h1e0c) tb_error("====== ADD.B EDE  EDE =====");
209 
      if (mem21E !==16'he0f2) tb_error("====== ADD.B EDE  EDE =====");
210 
 
211 
      if (mem220 !==16'h113a) tb_error("====== ADD.B EDE  &EDE  =====");
212 
      if (mem222 !==16'h21dd) tb_error("====== ADD.B EDE  &EDE  =====");
213 
      if (mem224 !==16'h2ca3) tb_error("====== ADD.B EDE  &EDE  =====");
214 
      if (mem226 !==16'h4ad3) tb_error("====== ADD.B EDE  &EDE  =====");
215 
 
216 
 
217 
      // ADD.B: Check when source is &EDE
218 
      //--------------------------------------------------------
219 
      @(r15==16'h8000);
220 
 
221 
      if (r5     !==16'h00aa) tb_error("====== ADD.B &EDE  Rm    =====");
222 
      if (r6     !==16'h00dd) tb_error("====== ADD.B &EDE  Rm    =====");
223 
 
224 
      if (mem210 !==16'haadd) tb_error("====== ADD.B &EDE  x(Rm) =====");
225 
      if (mem212 !==16'h10dd) tb_error("====== ADD.B &EDE  x(Rm) =====");
226 
      if (mem214 !==16'hac12) tb_error("====== ADD.B &EDE  x(Rm) =====");
227 
      if (mem216 !==16'h41db) tb_error("====== ADD.B &EDE  x(Rm) =====");
228 
 
229 
      if (mem218 !==16'h11cc) tb_error("====== ADD.B &EDE  EDE   =====");
230 
      if (mem21A !==16'h3277) tb_error("====== ADD.B &EDE  EDE   =====");
231 
      if (mem21C !==16'h1604) tb_error("====== ADD.B &EDE  EDE   =====");
232 
      if (mem21E !==16'h6072) tb_error("====== ADD.B &EDE  EDE   =====");
233 
 
234 
      if (mem220 !==16'haaee) tb_error("====== ADD.B &EDE  &EDE  =====");
235 
      if (mem222 !==16'h32ee) tb_error("====== ADD.B &EDE  &EDE  =====");
236 
      if (mem224 !==16'had24) tb_error("====== ADD.B &EDE  &EDE  =====");
237 
      if (mem226 !==16'h62eb) tb_error("====== ADD.B &EDE  &EDE  =====");
238 
 
239 
 
240 
      // ADD.B: Check when source is CONST
241 
      //--------------------------------------------------------
242 
      @(r15==16'h9000);
243 
 
244 
      if (r4     !==16'h0044) tb_error("====== ADD.B #+0 Rm    =====");
245 
      if (r5     !==16'h0056) tb_error("====== ADD.B #+1 Rm    =====");
246 
      if (r6     !==16'h0068) tb_error("====== ADD.B #+2 Rm    =====");
247 
      if (r7     !==16'h007b) tb_error("====== ADD.B #+4 Rm    =====");
248 
      if (r8     !==16'h0090) tb_error("====== ADD.B #+8 Rm    =====");
249 
      if (r9     !==16'h0098) tb_error("====== ADD.B #-1 Rm    =====");
250 
 
251 
      if (mem210 !==16'haa44) tb_error("====== ADD.B #+0 x(Rm) =====");
252 
      if (mem212 !==16'haa56) tb_error("====== ADD.B #+1 x(Rm) =====");
253 
      if (mem214 !==16'haa68) tb_error("====== ADD.B #+2 x(Rm) =====");
254 
      if (mem216 !==16'haa7b) tb_error("====== ADD.B #+4 x(Rm) =====");
255 
      if (mem218 !==16'haa3d) tb_error("====== ADD.B #+8 x(Rm) =====");
256 
      if (mem21A !==16'haa98) tb_error("====== ADD.B #-1 x(Rm) =====");
257 
      if (mem21C !==16'haa55) tb_error("====== ADD.B #+0 x(Rm) =====");
258 
      if (mem21E !==16'hbc55) tb_error("====== ADD.B #+1 x(Rm) =====");
259 
      if (mem220 !==16'hce55) tb_error("====== ADD.B #+2 x(Rm) =====");
260 
      if (mem222 !==16'he155) tb_error("====== ADD.B #+4 x(Rm) =====");
261 
      if (mem224 !==16'hf655) tb_error("====== ADD.B #+8 x(Rm) =====");
262 
      if (mem226 !==16'h3255) tb_error("====== ADD.B #-1 x(Rm) =====");
263 
 
264 
      if (mem230 !==16'haa44) tb_error("====== ADD.B #+0 EDE =====");
265 
      if (mem232 !==16'haa56) tb_error("====== ADD.B #+1 EDE =====");
266 
      if (mem234 !==16'haa68) tb_error("====== ADD.B #+2 EDE =====");
267 
      if (mem236 !==16'haa7b) tb_error("====== ADD.B #+4 EDE =====");
268 
      if (mem238 !==16'haa3d) tb_error("====== ADD.B #+8 EDE =====");
269 
      if (mem23A !==16'haa98) tb_error("====== ADD.B #-1 EDE =====");
270 
      if (mem23C !==16'haa55) tb_error("====== ADD.B #+0 EDE =====");
271 
      if (mem23E !==16'hbc55) tb_error("====== ADD.B #+1 EDE =====");
272 
      if (mem240 !==16'hce55) tb_error("====== ADD.B #+2 EDE =====");
273 
      if (mem242 !==16'he155) tb_error("====== ADD.B #+4 EDE =====");
274 
      if (mem244 !==16'hf655) tb_error("====== ADD.B #+8 EDE =====");
275 
      if (mem246 !==16'h3255) tb_error("====== ADD.B #-1 EDE =====");
276 
 
277 
//      #
278 
//      # NOTE: The following section would not fit in the smallest ROM
279 
//      #       configuration. Therefore, it is executed at the end of
280 
//      #       the "two-op_add.v" pattern.
281 
//      #
282 
 
283 
//      if (mem250 !==16'haa44) tb_error("====== ADD.B #+0 &EDE =====");
284 
//      if (mem252 !==16'haa56) tb_error("====== ADD.B #+1 &EDE =====");
285 
//      if (mem254 !==16'haa68) tb_error("====== ADD.B #+2 &EDE =====");
286 
//      if (mem256 !==16'haa7b) tb_error("====== ADD.B #+4 &EDE =====");
287 
//      if (mem258 !==16'haa3d) tb_error("====== ADD.B #+8 &EDE =====");
288 
//      if (mem25A !==16'haa98) tb_error("====== ADD.B #-1 &EDE =====");
289 
//      if (mem25C !==16'haa55) tb_error("====== ADD.B #+0 &EDE =====");
290 
//      if (mem25E !==16'hbc55) tb_error("====== ADD.B #+1 &EDE =====");
291 
//      if (mem260 !==16'hce55) tb_error("====== ADD.B #+2 &EDE =====");
292 
//      if (mem262 !==16'he155) tb_error("====== ADD.B #+4 &EDE =====");
293 
//      if (mem264 !==16'hf655) tb_error("====== ADD.B #+8 &EDE =====");
294 
//      if (mem266 !==16'h3255) tb_error("====== ADD.B #-1 &EDE =====");
295 
 
296 
      stimulus_done = 1;
297 
   end
298 
 

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