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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [two-op_add-b.v] - Blame information for rev 2

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1 2 olivier.gi 
/*===========================================================================*/
2 
/* Copyright (C) 2001 Authors                                                */
3 
/*                                                                           */
4 
/* This source file may be used and distributed without restriction provided */
5 
/* that this copyright statement is not removed from the file and that any   */
6 
/* derivative work contains the original copyright notice and the associated */
7 
/* disclaimer.                                                               */
8 
/*                                                                           */
9 
/* This source file is free software; you can redistribute it and/or modify  */
10 
/* it under the terms of the GNU Lesser General Public License as published  */
11 
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12 
/* (at your option) any later version.                                       */
13 
/*                                                                           */
14 
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15 
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16 
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17 
/* License for more details.                                                 */
18 
/*                                                                           */
19 
/* You should have received a copy of the GNU Lesser General Public License  */
20 
/* along with this source; if not, write to the Free Software Foundation,    */
21 
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22 
/*                                                                           */
23 
/*===========================================================================*/
24 
/*                   TWO-OPERAND ARITHMETIC: ADD.B INSTRUCTION               */
25 
/*---------------------------------------------------------------------------*/
26 
/* Test the ADD.B instruction with all addressing modes                      */
27 
/*===========================================================================*/
28 
 
29 
initial
30 
   begin
31 
      $display(" ===============================================");
32 
      $display("|                 START SIMULATION              |");
33 
      $display(" ===============================================");
34 
      repeat(5) @(posedge mclk);
35 
      stimulus_done = 0;
36 
 
37 
      // Check reset values
38 
      //--------------------------------------------------------
39 
      if (r2 !==16'h0000) tb_error("R2  reset value");
40 
      if (r3 !==16'h0000) tb_error("R3  reset value");
41 
      if (r4 !==16'h0000) tb_error("R4  reset value");
42 
      if (r5 !==16'h0000) tb_error("R5  reset value");
43 
      if (r6 !==16'h0000) tb_error("R6  reset value");
44 
      if (r7 !==16'h0000) tb_error("R7  reset value");
45 
      if (r8 !==16'h0000) tb_error("R8  reset value");
46 
      if (r9 !==16'h0000) tb_error("R9  reset value");
47 
      if (r10!==16'h0000) tb_error("R10 reset value");
48 
      if (r11!==16'h0000) tb_error("R11 reset value");
49 
      if (r12!==16'h0000) tb_error("R12 reset value");
50 
      if (r13!==16'h0000) tb_error("R13 reset value");
51 
      if (r14!==16'h0000) tb_error("R14 reset value");
52 
      if (r15!==16'h0000) tb_error("R15 reset value");
53 
 
54 
 
55 
      // Make sure initialization worked fine
56 
      //--------------------------------------------------------
57 
      @(r15==16'h1000);
58 
 
59 
      if (r2 !==16'h0022) tb_error("R2  initialization");
60 
      if (r3 !==16'h3333) tb_error("R3  initialization");
61 
      if (r4 !==16'h4444) tb_error("R4  initialization");
62 
      if (r5 !==16'h5555) tb_error("R5  initialization");
63 
      if (r6 !==16'h6666) tb_error("R6  initialization");
64 
      if (r7 !==16'h7777) tb_error("R7  initialization");
65 
      if (r8 !==16'h8888) tb_error("R8  initialization");
66 
      if (r9 !==16'h9999) tb_error("R9  initialization");
67 
      if (r10!==16'haaaa) tb_error("R10 initialization");
68 
      if (r11!==16'hbbbb) tb_error("R11 initialization");
69 
      if (r12!==16'hcccc) tb_error("R12 initialization");
70 
      if (r13!==16'hdddd) tb_error("R13 initialization");
71 
      if (r14!==16'heeee) tb_error("R14 initialization");
72 
 
73 
 
74 
      // ADD.B: Check when source is Rn
75 
      //--------------------------------------------------------
76 
      @(r15==16'h2000);
77 
 
78 
      if (r4     !==16'h00cc) tb_error("====== ADD.B Rn Rm    =====");
79 
 
80 
      if (mem210 !==16'haaef) tb_error("====== ADD.B Rn x(Rm) =====");
81 
      if (mem212 !==16'hcd66) tb_error("====== ADD.B Rn x(Rm) =====");
82 
 
83 
      if (mem214 !==16'h11ef) tb_error("====== ADD.B Rn EDE   =====");
84 
      if (mem216 !==16'habaa) tb_error("====== ADD.B Rn EDE   =====");
85 
 
86 
      if (mem218 !==16'h77b6) tb_error("====== ADD.B Rn &EDE  =====");
87 
      if (mem21A !==16'h7f44) tb_error("====== ADD.B Rn &EDE  =====");
88 
 
89 
 
90 
      // ADD.B: Check when source is @Rn
91 
      //--------------------------------------------------------
92 
      @(r15==16'h3000);
93 
 
94 
      if (r5     !==16'h0032) tb_error("====== ADD.B @Rn Rm    =====");
95 
      if (r6     !==16'h0021) tb_error("====== ADD.B @Rn Rm    =====");
96 
 
97 
      if (mem210 !==16'h55cc) tb_error("====== ADD.B @Rn x(Rm) =====");
98 
      if (mem212 !==16'haabb) tb_error("====== ADD.B @Rn x(Rm) =====");
99 
      if (mem214 !==16'h5600) tb_error("====== ADD.B @Rn x(Rm) =====");
100 
      if (mem216 !==16'hdcba) tb_error("====== ADD.B @Rn x(Rm) =====");
101 
 
102 
      if (mem218 !==16'h1198) tb_error("====== ADD.B @Rn EDE =====");
103 
      if (mem21A !==16'heedd) tb_error("====== ADD.B @Rn EDE =====");
104 
      if (mem21C !==16'h1dbf) tb_error("====== ADD.B @Rn EDE =====");
105 
      if (mem21E !==16'hd02e) tb_error("====== ADD.B @Rn EDE =====");
106 
 
107 
      if (mem220 !==16'h2210) tb_error("====== ADD.B @Rn &EDE  =====");
108 
      if (mem222 !==16'h88cc) tb_error("====== ADD.B @Rn &EDE  =====");
109 
      if (mem224 !==16'h2c39) tb_error("====== ADD.B @Rn &EDE  =====");
110 
      if (mem226 !==16'h4a3d) tb_error("====== ADD.B @Rn &EDE  =====");
111 
 
112 
 
113 
      // ADD.B: Check when source is @Rn+
114 
      //--------------------------------------------------------
115 
      @(r15==16'h4000);
116 
 
117 
      if (r4     !==16'h0211) tb_error("====== ADD.B @Rn+ Rm    =====");
118 
      if (r5     !==16'h0052) tb_error("====== ADD.B @Rn+ Rm    =====");
119 
      if (r6     !==16'h0214) tb_error("====== ADD.B @Rn+ Rm    =====");
120 
      if (r7     !==16'h0035) tb_error("====== ADD.B @Rn+ Rm    =====");
121 
 
122 
      if (mem210 !==16'haadd) tb_error("====== ADD.B @Rn+ x(Rm) =====");
123 
      if (mem212 !==16'h9966) tb_error("====== ADD.B @Rn+ x(Rm) =====");
124 
      if (mem214 !==16'h5ac0) tb_error("====== ADD.B @Rn+ x(Rm) =====");
125 
      if (mem216 !==16'h1cb6) tb_error("====== ADD.B @Rn+ x(Rm) =====");
126 
      if (r9     !==16'h0208) tb_error("====== ADD.B @Rn+ x(Rm) =====");
127 
 
128 
      if (mem218 !==16'h11cc) tb_error("====== ADD.B @Rn+ EDE =====");
129 
      if (mem21A !==16'hbaff) tb_error("====== ADD.B @Rn+ EDE =====");
130 
      if (mem21C !==16'h1e0c) tb_error("====== ADD.B @Rn+ EDE =====");
131 
      if (mem21E !==16'he0f2) tb_error("====== ADD.B @Rn+ EDE =====");
132 
      if (r10    !==16'h0208) tb_error("====== ADD.B @Rn+ EDE =====");
133 
 
134 
      if (mem220 !==16'h5599) tb_error("====== ADD.B @Rn+ &EDE  =====");
135 
      if (mem222 !==16'h21dd) tb_error("====== ADD.B @Rn+ &EDE  =====");
136 
      if (mem224 !==16'h5cd3) tb_error("====== ADD.B @Rn+ &EDE  =====");
137 
      if (mem226 !==16'h4dd6) tb_error("====== ADD.B @Rn+ &EDE  =====");
138 
      if (r11    !==16'h0208) tb_error("====== ADD.B @Rn+ &EDE  =====");
139 
 
140 
 
141 
      // ADD.B: Check when source is #N
142 
      //--------------------------------------------------------
143 
      @(r15==16'h5000);
144 
 
145 
      if (r4     !==16'h008a) tb_error("====== ADD.B #N  Rm    =====");
146 
 
147 
      if (mem210 !==16'haabb) tb_error("====== ADD.B #N  x(Rm) =====");
148 
      if (mem212 !==16'h9944) tb_error("====== ADD.B #N  x(Rm) =====");
149 
      if (mem214 !==16'ha9ba) tb_error("====== ADD.B #N  x(Rm) =====");
150 
      if (mem216 !==16'hd15a) tb_error("====== ADD.B #N  x(Rm) =====");
151 
 
152 
      if (mem218 !==16'h11cc) tb_error("====== ADD.B #N  EDE =====");
153 
      if (mem21A !==16'hbacc) tb_error("====== ADD.B #N  EDE =====");
154 
      if (mem21C !==16'h1e1a) tb_error("====== ADD.B #N  EDE =====");
155 
      if (mem21E !==16'hf2c2) tb_error("====== ADD.B #N  EDE =====");
156 
 
157 
      if (mem220 !==16'haabb) tb_error("====== ADD.B #N  &EDE  =====");
158 
      if (mem222 !==16'h77ee) tb_error("====== ADD.B #N  &EDE  =====");
159 
      if (mem224 !==16'ha205) tb_error("====== ADD.B #N  &EDE  =====");
160 
      if (mem226 !==16'hc3e8) tb_error("====== ADD.B #N  &EDE  =====");
161 
 
162 
 
163 
      // ADD.B: Check when source is x(Rn)
164 
      //--------------------------------------------------------
165 
      @(r15==16'h6000);
166 
 
167 
      if (r5     !==16'h00cb) tb_error("====== ADD.B x(Rn) Rm    =====");
168 
      if (r6     !==16'h0098) tb_error("====== ADD.B x(Rn) Rm    =====");
169 
 
170 
      if (mem210 !==16'haa33) tb_error("====== ADD.B x(Rn) x(Rm) =====");
171 
      if (mem212 !==16'h6655) tb_error("====== ADD.B x(Rn) x(Rm) =====");
172 
      if (mem214 !==16'ha26a) tb_error("====== ADD.B x(Rn) x(Rm) =====");
173 
      if (mem216 !==16'ha151) tb_error("====== ADD.B x(Rn) x(Rm) =====");
174 
 
175 
      if (mem218 !==16'h33ee) tb_error("====== ADD.B x(Rn) EDE =====");
176 
      if (mem21A !==16'h43cc) tb_error("====== ADD.B x(Rn) EDE =====");
177 
      if (mem21C !==16'h3729) tb_error("====== ADD.B x(Rn) EDE =====");
178 
      if (mem21E !==16'h72c4) tb_error("====== ADD.B x(Rn) EDE =====");
179 
 
180 
      if (mem220 !==16'h0044) tb_error("====== ADD.B x(Rn) &EDE  =====");
181 
      if (mem222 !==16'h32cc) tb_error("====== ADD.B x(Rn) &EDE  =====");
182 
      if (mem224 !==16'h0d82) tb_error("====== ADD.B x(Rn) &EDE  =====");
183 
      if (mem226 !==16'h58c1) tb_error("====== ADD.B x(Rn) &EDE  =====");
184 
 
185 
 
186 
      // ADD.B: Check when source is EDE
187 
      //--------------------------------------------------------
188 
      @(r15==16'h7000);
189 
 
190 
      if (r5     !==16'h0076) tb_error("====== ADD.B EDE  Rm    =====");
191 
      if (r6     !==16'h00e9) tb_error("====== ADD.B EDE  Rm    =====");
192 
 
193 
      if (mem210 !==16'haadd) tb_error("====== ADD.B EDE  x(Rm) =====");
194 
      if (mem212 !==16'haa55) tb_error("====== ADD.B EDE  x(Rm) =====");
195 
      if (mem214 !==16'ha60a) tb_error("====== ADD.B EDE  x(Rm) =====");
196 
      if (mem216 !==16'he15b) tb_error("====== ADD.B EDE  x(Rm) =====");
197 
 
198 
      if (mem218 !==16'h11cc) tb_error("====== ADD.B EDE  EDE =====");
199 
      if (mem21A !==16'hbaff) tb_error("====== ADD.B EDE  EDE =====");
200 
      if (mem21C !==16'h1e0c) tb_error("====== ADD.B EDE  EDE =====");
201 
      if (mem21E !==16'he0f2) tb_error("====== ADD.B EDE  EDE =====");
202 
 
203 
      if (mem220 !==16'h113a) tb_error("====== ADD.B EDE  &EDE  =====");
204 
      if (mem222 !==16'h21dd) tb_error("====== ADD.B EDE  &EDE  =====");
205 
      if (mem224 !==16'h2ca3) tb_error("====== ADD.B EDE  &EDE  =====");
206 
      if (mem226 !==16'h4ad3) tb_error("====== ADD.B EDE  &EDE  =====");
207 
 
208 
 
209 
      // ADD.B: Check when source is &EDE
210 
      //--------------------------------------------------------
211 
      @(r15==16'h8000);
212 
 
213 
      if (r5     !==16'h00aa) tb_error("====== ADD.B &EDE  Rm    =====");
214 
      if (r6     !==16'h00dd) tb_error("====== ADD.B &EDE  Rm    =====");
215 
 
216 
      if (mem210 !==16'haadd) tb_error("====== ADD.B &EDE  x(Rm) =====");
217 
      if (mem212 !==16'h10dd) tb_error("====== ADD.B &EDE  x(Rm) =====");
218 
      if (mem214 !==16'hac12) tb_error("====== ADD.B &EDE  x(Rm) =====");
219 
      if (mem216 !==16'h41db) tb_error("====== ADD.B &EDE  x(Rm) =====");
220 
 
221 
      if (mem218 !==16'h11cc) tb_error("====== ADD.B &EDE  EDE   =====");
222 
      if (mem21A !==16'h3277) tb_error("====== ADD.B &EDE  EDE   =====");
223 
      if (mem21C !==16'h1604) tb_error("====== ADD.B &EDE  EDE   =====");
224 
      if (mem21E !==16'h6072) tb_error("====== ADD.B &EDE  EDE   =====");
225 
 
226 
      if (mem220 !==16'haaee) tb_error("====== ADD.B &EDE  &EDE  =====");
227 
      if (mem222 !==16'h32ee) tb_error("====== ADD.B &EDE  &EDE  =====");
228 
      if (mem224 !==16'had24) tb_error("====== ADD.B &EDE  &EDE  =====");
229 
      if (mem226 !==16'h62eb) tb_error("====== ADD.B &EDE  &EDE  =====");
230 
 
231 
 
232 
      // ADD.B: Check when source is CONST
233 
      //--------------------------------------------------------
234 
      @(r15==16'h9000);
235 
 
236 
      if (r4     !==16'h0044) tb_error("====== ADD.B #+0 Rm    =====");
237 
      if (r5     !==16'h0056) tb_error("====== ADD.B #+1 Rm    =====");
238 
      if (r6     !==16'h0068) tb_error("====== ADD.B #+2 Rm    =====");
239 
      if (r7     !==16'h007b) tb_error("====== ADD.B #+4 Rm    =====");
240 
      if (r8     !==16'h0090) tb_error("====== ADD.B #+8 Rm    =====");
241 
      if (r9     !==16'h0098) tb_error("====== ADD.B #-1 Rm    =====");
242 
 
243 
      if (mem210 !==16'haa44) tb_error("====== ADD.B #+0 x(Rm) =====");
244 
      if (mem212 !==16'haa56) tb_error("====== ADD.B #+1 x(Rm) =====");
245 
      if (mem214 !==16'haa68) tb_error("====== ADD.B #+2 x(Rm) =====");
246 
      if (mem216 !==16'haa7b) tb_error("====== ADD.B #+4 x(Rm) =====");
247 
      if (mem218 !==16'haa3d) tb_error("====== ADD.B #+8 x(Rm) =====");
248 
      if (mem21A !==16'haa98) tb_error("====== ADD.B #-1 x(Rm) =====");
249 
      if (mem21C !==16'haa55) tb_error("====== ADD.B #+0 x(Rm) =====");
250 
      if (mem21E !==16'hbc55) tb_error("====== ADD.B #+1 x(Rm) =====");
251 
      if (mem220 !==16'hce55) tb_error("====== ADD.B #+2 x(Rm) =====");
252 
      if (mem222 !==16'he155) tb_error("====== ADD.B #+4 x(Rm) =====");
253 
      if (mem224 !==16'hf655) tb_error("====== ADD.B #+8 x(Rm) =====");
254 
      if (mem226 !==16'h3255) tb_error("====== ADD.B #-1 x(Rm) =====");
255 
 
256 
      if (mem230 !==16'haa44) tb_error("====== ADD.B #+0 EDE =====");
257 
      if (mem232 !==16'haa56) tb_error("====== ADD.B #+1 EDE =====");
258 
      if (mem234 !==16'haa68) tb_error("====== ADD.B #+2 EDE =====");
259 
      if (mem236 !==16'haa7b) tb_error("====== ADD.B #+4 EDE =====");
260 
      if (mem238 !==16'haa3d) tb_error("====== ADD.B #+8 EDE =====");
261 
      if (mem23A !==16'haa98) tb_error("====== ADD.B #-1 EDE =====");
262 
      if (mem23C !==16'haa55) tb_error("====== ADD.B #+0 EDE =====");
263 
      if (mem23E !==16'hbc55) tb_error("====== ADD.B #+1 EDE =====");
264 
      if (mem240 !==16'hce55) tb_error("====== ADD.B #+2 EDE =====");
265 
      if (mem242 !==16'he155) tb_error("====== ADD.B #+4 EDE =====");
266 
      if (mem244 !==16'hf655) tb_error("====== ADD.B #+8 EDE =====");
267 
      if (mem246 !==16'h3255) tb_error("====== ADD.B #-1 EDE =====");
268 
 
269 
//      #
270 
//      # NOTE: The following section would not fit in the smallest ROM
271 
//      #       configuration. Therefore, it is executed at the end of
272 
//      #       the "two-op_add.v" pattern.
273 
//      #
274 
 
275 
//      if (mem250 !==16'haa44) tb_error("====== ADD.B #+0 &EDE =====");
276 
//      if (mem252 !==16'haa56) tb_error("====== ADD.B #+1 &EDE =====");
277 
//      if (mem254 !==16'haa68) tb_error("====== ADD.B #+2 &EDE =====");
278 
//      if (mem256 !==16'haa7b) tb_error("====== ADD.B #+4 &EDE =====");
279 
//      if (mem258 !==16'haa3d) tb_error("====== ADD.B #+8 &EDE =====");
280 
//      if (mem25A !==16'haa98) tb_error("====== ADD.B #-1 &EDE =====");
281 
//      if (mem25C !==16'haa55) tb_error("====== ADD.B #+0 &EDE =====");
282 
//      if (mem25E !==16'hbc55) tb_error("====== ADD.B #+1 &EDE =====");
283 
//      if (mem260 !==16'hce55) tb_error("====== ADD.B #+2 &EDE =====");
284 
//      if (mem262 !==16'he155) tb_error("====== ADD.B #+4 &EDE =====");
285 
//      if (mem264 !==16'hf655) tb_error("====== ADD.B #+8 &EDE =====");
286 
//      if (mem266 !==16'h3255) tb_error("====== ADD.B #-1 &EDE =====");
287 
 
288 
      stimulus_done = 1;
289 
   end
290 
 

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