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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                            WATCHDOG TIMER                                 */
/*---------------------------------------------------------------------------*/
/* Test the Watdog timer:                                                    */
/*                        - Interval timer mode.                             */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
/*===========================================================================*/
/*                                                                           */
/* Low Power modes:                                                          */
/*                              - LPM0    <=>  CPUOFF                        */
/*                              - LPM1    <=>  CPUOFF + SCG0                 */
/*                              - LPM2    <=>  CPUOFF +        SCG1          */
/*                              - LPM3    <=>  CPUOFF + SCG0 + SCG1          */
/*                              - LPM4    <=>  CPUOFF + SCG0 + SCG1 + OSCOFF */
/*                                                                           */
/* Reminder:                                                                 */
/*                              - CPUOFF  <=>  turns off CPU.                */
/*                              - SCG0    <=>  turns off DCO.                */
/*                              - SCG1    <=>  turns off SMCLK.              */
/*                              - OSCOFF  <=>  turns off LFXT_CLK.           */
/*                                                                           */
/*---------------------------------------------------------------------------*/
 
.global main
 
.set   DMEM_BASE, (__data_start     )
.set   DMEM_200,  (__data_start+0x00)
.set   DMEM_250,  (__data_start+0x50)
 
.set   IE1,    0x0000
.set   IFG1,   0x0002
.set   WDTCTL, 0x0120
 
.macro LPM0
 bis    #0x0010, r2
.endm
.macro LPM1
 bis    #0x0050, r2
.endm
.macro LPM2
 bis    #0x0090, r2
.endm
.macro LPM3
 bis    #0x00D0, r2
.endm
.macro LPM4
 bis    #0x00F0, r2
.endm
 
.macro LPM0_exit
 bic    #0x0010, @r1
.endm
.macro LPM1_exit
 bic    #0x0050, @r1
.endm
.macro LPM2_exit
 bic    #0x0090, @r1
.endm
.macro LPM3_exit
 bic    #0x00D0, @r1
.endm
.macro LPM4_exit
 bic    #0x00F0, @r1
.endm
 
 
main:
 
        /* --------------   WATCHDOG TEST:  WAKE-UP INTERVAL MODE   ------------ */
 
        mov   &IFG1, r4
        cmp #0x0001, &IFG1        ;# Check if we come out of a watchdog reset
        jeq   end_of_test
 
        mov   #DMEM_250, r1       ;# Initialize stack & Enable interrupts
        eint
        bis.b #0x01,   &IE1
 
        mov   #0x0000, r6
 
        mov   #0x5a1f, &WDTCTL	  ;# Enable interval mode /64 and select ACLK
 
        mov   &WDTCTL, r5	  ;# If ACLK is selected, go to LPM3... otherwhise go to LPM0
        bit   #0x0004, r5
        jnz   lpm3_test
   lpm0_test:
        mov   #0x1000, r15
        LPM0
        jmp   lpm_test_done
   lpm3_test:
        mov   #0x1000, r15
        LPM3
   lpm_test_done:
 
        /* --------------   WATCHDOG TEST:  WAKE-UP RESET MODE   ------------ */
 
        mov   #0x5a0f, &WDTCTL	  ;# Enable reset mode /64 and select ACLK
        mov   #0x5555, r7
 
        mov   &WDTCTL, r5	  ;# If ACLK is selected, go to LPM3... otherwhise go to LPM0
        bit   #0x0004, r5
        jnz   lpm3_rst_test
   lpm0_rst_test:
        mov   #0x1000, r15
        LPM0
        jmp   lpm_rst_test_done
   lpm3_rst_test:
        mov   #0x1000, r15
        LPM3
   lpm_rst_test_done:
 
 
        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        mov   #0x5000, r15
        nop
        br #0xffff
 
 
        /* ----------------------      INTERRUPT ROUTINES    --------------- */
 
WDOG_VECTOR:
        inc    r6               ;# Increment counter variable
        cmp    #10, r6
        jl     end_of_irq
 
        mov   &WDTCTL, r5	;# If ACLK is selected, exit LPM3... otherwhise exit LPM0
        bit   #0x0004, r5
        jnz   lpm3_test_exit
   lpm0_test_exit:
        mov   #0x2000, r15
        LPM0_exit
        reti
   lpm3_test_exit:
        mov   #0x2000, r15
        LPM3_exit
 
   end_of_irq:
        mov   #0x6666, r7
        reti
 
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    
.word end_of_test  ; Interrupt  1                      
.word end_of_test  ; Interrupt  2                      
.word end_of_test  ; Interrupt  3                      
.word end_of_test  ; Interrupt  4                      
.word end_of_test  ; Interrupt  5                      
.word end_of_test  ; Interrupt  6                      
.word end_of_test  ; Interrupt  7                      
.word end_of_test  ; Interrupt  8                      
.word end_of_test  ; Interrupt  9                      
.word WDOG_VECTOR  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      
.word end_of_test  ; Interrupt 12                      
.word end_of_test  ; Interrupt 13                      
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET

Line No.	Rev	Author	Line
1	134	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24			`/* WATCHDOG TIMER */`
25			`/---------------------------------------------------------------------------/`
26			`/* Test the Watdog timer: */`
27			`/* - Interval timer mode. */`
28			`/* */`
29			`/* Author(s): */`
30			`/* - Olivier Girard, olgirard@gmail.com */`
31			`/* */`
32			`/---------------------------------------------------------------------------/`
33			`/* $Rev: 19 $ */`
34			`/* $LastChangedBy: olivier.girard $ */`
35			`/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */`
36			`/===========================================================================/`
37			`/* */`
38			`/* Low Power modes: */`
39			`/* - LPM0 <=> CPUOFF */`
40			`/* - LPM1 <=> CPUOFF + SCG0 */`
41			`/* - LPM2 <=> CPUOFF + SCG1 */`
42			`/* - LPM3 <=> CPUOFF + SCG0 + SCG1 */`
43			`/* - LPM4 <=> CPUOFF + SCG0 + SCG1 + OSCOFF */`
44			`/* */`
45			`/* Reminder: */`
46			`/* - CPUOFF <=> turns off CPU. */`
47			`/* - SCG0 <=> turns off DCO. */`
48			`/* - SCG1 <=> turns off SMCLK. */`
49			`/* - OSCOFF <=> turns off LFXT_CLK. */`
50			`/* */`
51			`/---------------------------------------------------------------------------/`
52
53			`.global main`
54
55			`.set DMEM_BASE, (__data_start )`
56			`.set DMEM_200, (__data_start+0x00)`
57			`.set DMEM_250, (__data_start+0x50)`
58
59			`.set IE1, 0x0000`
60			`.set IFG1, 0x0002`
61			`.set WDTCTL, 0x0120`
62
63			`.macro LPM0`
64			`bis #0x0010, r2`
65			`.endm`
66			`.macro LPM1`
67			`bis #0x0050, r2`
68			`.endm`
69			`.macro LPM2`
70			`bis #0x0090, r2`
71			`.endm`
72			`.macro LPM3`
73			`bis #0x00D0, r2`
74			`.endm`
75			`.macro LPM4`
76			`bis #0x00F0, r2`
77			`.endm`
78
79			`.macro LPM0_exit`
80			`bic #0x0010, @r1`
81			`.endm`
82			`.macro LPM1_exit`
83			`bic #0x0050, @r1`
84			`.endm`
85			`.macro LPM2_exit`
86			`bic #0x0090, @r1`
87			`.endm`
88			`.macro LPM3_exit`
89			`bic #0x00D0, @r1`
90			`.endm`
91			`.macro LPM4_exit`
92			`bic #0x00F0, @r1`
93			`.endm`
94
95
96			`main:`
97
98			`/* -------------- WATCHDOG TEST: WAKE-UP INTERVAL MODE ------------ */`
99
100			`mov &IFG1, r4`
101			`cmp #0x0001, &IFG1 ;# Check if we come out of a watchdog reset`
102			`jeq end_of_test`
103
104			`mov #DMEM_250, r1 ;# Initialize stack & Enable interrupts`
105			`eint`
106			`bis.b #0x01, &IE1`
107
108			`mov #0x0000, r6`
109
110			`mov #0x5a1f, &WDTCTL ;# Enable interval mode /64 and select ACLK`
111
112			`mov &WDTCTL, r5 ;# If ACLK is selected, go to LPM3... otherwhise go to LPM0`
113			`bit #0x0004, r5`
114			`jnz lpm3_test`
115			`lpm0_test:`
116			`mov #0x1000, r15`
117			`LPM0`
118			`jmp lpm_test_done`
119			`lpm3_test:`
120			`mov #0x1000, r15`
121			`LPM3`
122			`lpm_test_done:`
123
124			`/* -------------- WATCHDOG TEST: WAKE-UP RESET MODE ------------ */`
125
126			`mov #0x5a0f, &WDTCTL ;# Enable reset mode /64 and select ACLK`
127			`mov #0x5555, r7`
128
129			`mov &WDTCTL, r5 ;# If ACLK is selected, go to LPM3... otherwhise go to LPM0`
130			`bit #0x0004, r5`
131			`jnz lpm3_rst_test`
132			`lpm0_rst_test:`
133			`mov #0x1000, r15`
134			`LPM0`
135			`jmp lpm_rst_test_done`
136			`lpm3_rst_test:`
137			`mov #0x1000, r15`
138			`LPM3`
139			`lpm_rst_test_done:`
140
141
142			`/* ---------------------- END OF TEST --------------- */`
143			`end_of_test:`
144			`mov #0x5000, r15`
145			`nop`
146			`br #0xffff`
147
148
149			`/* ---------------------- INTERRUPT ROUTINES --------------- */`
150
151			`WDOG_VECTOR:`
152			`inc r6 ;# Increment counter variable`
153			`cmp #10, r6`
154			`jl end_of_irq`
155
156			`mov &WDTCTL, r5 ;# If ACLK is selected, exit LPM3... otherwhise exit LPM0`
157			`bit #0x0004, r5`
158			`jnz lpm3_test_exit`
159			`lpm0_test_exit:`
160			`mov #0x2000, r15`
161			`LPM0_exit`
162			`reti`
163			`lpm3_test_exit:`
164			`mov #0x2000, r15`
165			`LPM3_exit`
166
167			`end_of_irq:`
168			`mov #0x6666, r7`
169			`reti`
170
171
172
173			`/* ---------------------- INTERRUPT VECTORS --------------- */`
174
175			`.section .vectors, "a"`
176			`.word end_of_test ; Interrupt 0 (lowest priority)`
177			`.word end_of_test ; Interrupt 1`
178			`.word end_of_test ; Interrupt 2`
179			`.word end_of_test ; Interrupt 3`
180			`.word end_of_test ; Interrupt 4`
181			`.word end_of_test ; Interrupt 5`
182			`.word end_of_test ; Interrupt 6`
183			`.word end_of_test ; Interrupt 7`
184			`.word end_of_test ; Interrupt 8`
185			`.word end_of_test ; Interrupt 9`
186			`.word WDOG_VECTOR ; Interrupt 10 Watchdog timer`
187			`.word end_of_test ; Interrupt 11`
188			`.word end_of_test ; Interrupt 12`
189			`.word end_of_test ; Interrupt 13`
190			`.word end_of_test ; Interrupt 14 NMI`
191			`.word main ; Interrupt 15 (highest priority) RESET`

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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [wdt_wkup.s43] - Blame information for rev 134