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[/] [openmsp430/] [trunk/] [core/] [synthesis/] [xilinx/] [src/] [coregen/] [coregen.log] - Blame information for rev 100

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Line No. Rev Author Line
1 62 olivier.gi
Welcome to Xilinx CORE Generator.
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Help system initialised.
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Wrote project file
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/home/pitchu/Projects/verilog/openMSP430/core/synthesis/xilinx/src/coregen/virte
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x4lx.cgp
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Closed project file.
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New Project Cancelled.
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Wrote project file
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/home/pitchu/Projects/verilog/openMSP430/core/synthesis/xilinx/src/coregen/coreg
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en.cgp
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Closed project file.
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New Project Cancelled.

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