Subversion Repositories openmsp430

# Date: Sat Jan 30 20:56:56 2010

SET addpads = False

SET asysymbol = False

SET busformat = BusFormatAngleBracketNotRipped

SET createndf = False

SET designentry = Verilog

SET device = xc3s700a

SET devicefamily = spartan3a

SET flowvendor = Foundation_ISE

SET formalverification = False

SET foundationsym = False

SET implementationfiletype = Ngc

SET package = ft256

SET removerpms = False

SET simulationfiles = Behavioral

SET speedgrade = -4

SET verilogsim = True

SET vhdlsim = False

SET workingdirectory = ./tmp/

# CRC: d1925ca6