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[/] [openmsp430/] [trunk/] [core/] [synthesis/] [xilinx/] [xst_verilog_spartan6.opt] - Blame information for rev 178

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1 62 olivier.gi
FLOWTYPE = FPGA_SYNTHESIS;
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#########################################################
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## Filename: xst_verilog.opt
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##
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## Verilog Option File for XST targeted for speed
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## This works for FPGA devices.
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##
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## Version: 11.1
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## $Header: /devl/xcs/repo/env/Jobs/Xflow/data/optionfiles/spartan6_xst_verilog_speed.opt,v 1.1 2008/10/20 23:38:48 rvklair Exp $
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#########################################################
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#
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# Options for XST
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#
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#
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Program xst
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-ifn _xst.scr;            # input XST script file
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-ofn _xst.log;            # output XST log file
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-intstyle xflow;                  # Message Reporting Style: ise, xflow, or silent
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#
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# The options listed under ParamFile are the XST Properties that can be set by the
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# user. To turn on an option, uncomment by removing the '#' in front of the switch.
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#
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ParamFile: _xst.scr
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"run";
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#
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# Global Synthesis Options
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#
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"-ifn ";             # Input/Project File Name
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"-ifmt Verilog";                  # Input Format
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"-ofn ";                  # Output File Name
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"-ofmt ngc";                          # Output File Format
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"-p ";                  # Target Device
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"-opt_level 2";                   # Optimization Effort Criteria
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                                  # 1 (Normal) or 2 (High)
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"-opt_mode SPEED";                # Optimization Criteria
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                                  # AREA or SPEED
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"-vlgincdir ../src/";
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End ParamFile
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End Program xst
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#
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# See XST USER Guide Chapter 8 (Command Line Mode) for all XST options
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#
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