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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
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<html><head><title>openMSP430 Core</title></head>
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<body>
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<h3>Table of content</h3>
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<ul>
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<li><a href="#1.%20Introduction">                                               1. Introduction</a></li>
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<li><a href="#2.%20Core">                                                       2. Core</a>
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        <ul>
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        <li><a href="#2.1%20Design%20structure">                                2.1 Design structure</a></li>
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        <li><a href="#2.2%20Limitations">                                       2.2 Limitations</a></li>
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        <li><a href="#2.3%20Configuration">                                     2.3 Configuration</a>
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                <ul>
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                <li><a href="#2.3.1%20Basic%20System%20Configuration">          2.3.1 Basic System Configuration</a></li>
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                <li><a href="#2.3.2%20Advanced%20System%20Configuration">       2.3.2 Advanced System Configuration</a></li>
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                <li><a href="#2.3.3%20Expert%20System%20Configuration">         2.3.3 Expert System Configuration</a></li>
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                <li><a href="#2.3.4%20Parameters%20For%20Multi-Core%20Systems"> 2.3.4 Parameters For Multi-Core Systems</a></li>
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                </ul>
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        </li>
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        <li><a href="#2.4%20Memory%20mapping">                                  2.4 Memory mapping</a></li>
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        <li><a href="#2.5%20Interrupt%20mapping">                               2.5 Interrupt mapping</a></li>
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        <li><a href="#2.6%20Pinout">                                            2.6 Pinout</a></li>
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        <li><a href="#2.7%20Instruction%20Cycles%20and%20Lengths">              2.7 Instruction Cycles and Lengths</a></li>
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        <li><a href="#2.8%20Serial%20Debug%20Interface">                        2.8 Serial Debug Interface</a></li>
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        <li><a href="#2.9%20Benchmark%20results">                               2.9 Benchmark results</a>
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                <ul>
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                <li><a href="#2.9.1%20Dhrystone">                               2.9.1 Dhrystone</a></li>
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                <li><a href="#2.9.2%20CoreMark">                                2.9.2 CoreMark</a></li>
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                </ul>
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        </li>
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        </ul>
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</li>
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</ul>
33
 
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<a name="1. Introduction"></a>
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<h1>1. Introduction</h1>
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The openMSP430 is a 16-bit microcontroller core compatible with <b><a href="http://www.ti.com/litv/pdf/slau049f">TI's MSP430 family</a></b>
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(note that the extended version of the architecture, the MSP430X, isn't
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supported by this IP). It is based on a Von Neumann architecture, with
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a single address space for instructions and data.
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<br><br>Depending on the selected configuration, this design can either be:<br>
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<ul>
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  <ul>
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    <ul>
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      <li>&nbsp;<span style="font-weight: bold;">FPGA friendly</span>: the core doesn't contain any clock gate and has only a single clock
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domain. As a consequence, in this mode, the <span style="font-style: italic;">Basic Clock Module</span> peripheral has a few
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limitations.<br>
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        <br>
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      </li>
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      <li>&nbsp;<span style="font-weight: bold;">ASIC friendly</span>: the core contains up to all clock management
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options (clock muxes &amp; low-power modes, fine grained clock
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gating, ...) and is also ready for scan insertion. In this mode, the <span style="font-style: italic;">Basic Clock Module</span> offers all features listed in the official <a href="http://www.ti.com/litv/pdf/slau049f">documentation</a>.<br>
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      </li>
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    </ul>
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  </ul>
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</ul>
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<br>It is to be noted that this IP doesn't contain the instruction and
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data memory blocks internally (these are technology dependent hard
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macros which are connected to the IP during chip integration).
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However the core is fully configurable in regard to the supported RAM
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and/or ROM sizes.
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<br><br>
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<a name="2. Core"></a>
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<h1>2. Core</h1>
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<a name="2.1 Design structure"></a>
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<h2>2.1 Design structure</h2>
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The following diagram shows the openMSP430 design structure:
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<br><br>
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<img src="http://opencores.org/usercontent,img,1430426442" alt="CPU Structure" title="CPU Structure" width="80%">
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<br>
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<ul>
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        <li><b>Frontend</b>: This module performs the instruction Fetch and Decode tasks. It also contains the execution state machine.</li>
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        <li><b>Execution unit</b>:
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Containing the ALU and the register file, this module executes the
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current decoded instruction according to the execution state.</li>
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        <li><b>Serial Debug Interface</b>:
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Contains all the required logic for a Nexus class 3 debugging unit
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(without trace). Communication with the host is performed with a standard
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two-wire interface following either the UART 8N1 or I<sup>2</sup>C serial protocol.</li>
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   <li><b>Memory backbone</b>: This block
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performs a simple arbitration between frontend, execution-unit, DMA and Serial-Debug interfaces
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for program, data and peripheral memory accesses.</li>
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   <li><b>Basic Clock Module</b>: Generates MCLK, ACLK, SMCLK and manage the low power modes.</li>
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   <li><b>SFRs</b>: The <b>S</b>pecial <b>F</b>unction <b>R</b>egister<b>s</b> block contain diverse configuration registers (NMI, Watchdog, ...).</li>
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   <li><b>Watchdog</b>:
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Although it is a peripheral, the watchdog is directly included in
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the core because of its tight links with the NMI interrupts and PUC
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reset generation.</li>
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   <li><b>16x16 Multiplier</b>: The hardware
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multiplier peripheral is transparently supported by the GCC compiler
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and is therefore located in the core. It can be included or excluded at will
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through a Verilog define.</li>
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</ul>
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<a name="2.2 Limitations"></a>
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<h2>2.2 Limitations</h2>
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The known core limitations are the following:
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<br>
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<ul>
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        <li>Instructions can't be executed from the data memory.</li>
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        </ul>
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<a name="2.3 Configuration"></a>
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<h2>2.3 Configuration</h2>
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It is possible to configure the openMSP430 core through the <b><i>openMSP430_defines.v</i></b> file located in the <b><i>rtl</i></b> directory (see <a href="http://www.opencores.org/project,openmsp430,file%20and%20directory%20description">file and directory description</a>).<br>In
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this section, three sets of adjustabe user parameters are discussed in
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order to customize the core. A fourth set is available for ASIC
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specific options and will be discussed in the <a href="http://opencores.org/project,openmsp430,asic%20implementation">ASIC implementation</a>
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section.
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<a name="2.3.1 Basic System Configuration"></a>
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<h3>2.3.1 Basic System Configuration</h3>
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The basic system can be adjusted with the following set of defines in order to match the target system requirements.
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<br><br>
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<table border="0" cellpadding="0" cellspacing="4">
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<tbody><tr>
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<td width="35"><br>
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</td>
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<td bgcolor="#d0d0d0" width="3"><br>
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</td>
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<td width="15"><br>
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</td>
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<td>
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        <code>
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             //============================================================================<br>
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//============================================================================<br>
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// BASIC SYSTEM CONFIGURATION<br>
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//============================================================================<br>
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//============================================================================<br>
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//<br>
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// Note: the sum of program, data and peripheral memory spaces must not<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; exceed 64 kB<br>
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//<br>
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      <br>
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// Program Memory Size:<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
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Uncomment the required memory size<br>
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//-------------------------------------------------------<br>
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//`define PMEM_SIZE_CUSTOM<br>
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//`define PMEM_SIZE_59_KB<br>
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//`define PMEM_SIZE_55_KB<br>
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//`define PMEM_SIZE_54_KB<br>
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//`define PMEM_SIZE_51_KB<br>
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//`define PMEM_SIZE_48_KB<br>
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//`define PMEM_SIZE_41_KB<br>
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//`define PMEM_SIZE_32_KB<br>
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//`define PMEM_SIZE_24_KB<br>
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//`define PMEM_SIZE_16_KB<br>
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//`define PMEM_SIZE_12_KB<br>
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//`define PMEM_SIZE_8_KB<br>
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//`define PMEM_SIZE_4_KB<br>
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`define PMEM_SIZE_2_KB<br>
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//`define PMEM_SIZE_1_KB<br>
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      <br>
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      <br>
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// Data Memory Size:<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
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Uncomment the required memory size<br>
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//-------------------------------------------------------<br>
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//`define DMEM_SIZE_CUSTOM<br>
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//`define DMEM_SIZE_32_KB<br>
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//`define DMEM_SIZE_24_KB<br>
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//`define DMEM_SIZE_16_KB<br>
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//`define DMEM_SIZE_10_KB<br>
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//`define DMEM_SIZE_8_KB<br>
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//`define DMEM_SIZE_5_KB<br>
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//`define DMEM_SIZE_4_KB<br>
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//`define DMEM_SIZE_2p5_KB<br>
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//`define DMEM_SIZE_2_KB<br>
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//`define DMEM_SIZE_1_KB<br>
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//`define DMEM_SIZE_512_B<br>
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//`define DMEM_SIZE_256_B<br>
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`define DMEM_SIZE_128_B<br>
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      <br>
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      <br>
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// Include/Exclude Hardware Multiplier<br>
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`define MULTIPLIER<br>
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      <br>
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      <br>
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// Include/Exclude Serial Debug interface<br>
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`define DBG_EN<br>
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      </code></td></tr></tbody></table><br><br>
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The only design considerations at this stage are:
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<ul>
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        <li>Make sure that the program and data memories have the correct size :-P</li>
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        <li>The sum of program, data and peripheral memory space <b>MUST NOT</b> exceed 64 kB</li>
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</ul>
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<br>
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<b><u>Note:</u></b> when selected, full custom memory sizes can be specified in the "Expert System Configuration" section.
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<br>
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<br>
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<a name="2.3.2 Advanced System Configuration"></a>
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<h3>2.3.2 Advanced System Configuration</h3>
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In this section, some additional features are available in order to match the needs of more experienced users.
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<br><br>
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<table border="0" cellpadding="0" cellspacing="4">
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<tbody><tr>
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<td width="35"><br>
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</td>
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<td bgcolor="#d0d0d0" width="3"><br>
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</td>
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<td width="15"><br>
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</td>
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<td><code>//============================================================================<br>
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//============================================================================<br>
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// ADVANCED SYSTEM CONFIGURATION (FOR EXPERIENCED USERS)<br>
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//============================================================================<br>
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//============================================================================<br>
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      <br>
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//-------------------------------------------------------<br>
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// Custom user version number<br>
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//-------------------------------------------------------<br>
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// This 5 bit field can be freely used in order to allow<br>
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// custom identification of the system through the debug<br>
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// interface.<br>
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// (see CPU_ID.USER_VERSION field in the documentation)<br>
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//-------------------------------------------------------<br>
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`define USER_VERSION 5'b00000<br>
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      <br>
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      <br>
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//-------------------------------------------------------<br>
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// Include/Exclude Watchdog timer<br>
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//-------------------------------------------------------<br>
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// When excluded, the following functionality will be<br>
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// lost:<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - Watchog (both interval and watchdog modes)<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - NMI interrupt edge selection<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - Possibility to generate a software PUC reset<br>
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//-------------------------------------------------------<br>
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`define WATCHDOG<br>
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      <br>
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      <br>
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//-------------------------------------------------------<br>
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// Include/Exclude DMA interface support<br>
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//-------------------------------------------------------<br>
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//`define DMA_IF_EN<br>
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      <br>
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      <br>
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//-------------------------------------------------------<br>
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// Include/Exclude Non-Maskable-Interrupt support<br>
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//--------------------------------------------------------<br>
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`define NMI<br>
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      <br>
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      <br>
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//-------------------------------------------------------<br>
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// Number of available IRQs<br>
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//-------------------------------------------------------<br>
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// Indicates the number of interrupt vectors supported<br>
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// (16, 32 or 64).<br>
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//-------------------------------------------------------<br>
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`define IRQ_16<br>
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//`define IRQ_32<br>
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//`define IRQ_64<br>
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      <br>
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      <br>
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//-------------------------------------------------------<br>
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// Input synchronizers<br>
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//-------------------------------------------------------<br>
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// In some cases, the asynchronous input ports might<br>
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// already be synchronized externally.<br>
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// If an extensive CDC design review showed that this<br>
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// is really the case,&nbsp; the individual synchronizers<br>
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// can be disabled with the following defines.<br>
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//<br>
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// Notes:<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - all three signals are all sampled in the MCLK domain<br>
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//<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - the dbg_en signal reset the debug interface<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; when 0. Therefore make sure it is glitch free.<br>
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//<br>
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//-------------------------------------------------------<br>
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`define SYNC_NMI<br>
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//`define SYNC_CPU_EN<br>
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//`define SYNC_DBG_EN<br>
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</code><code><br>
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      <br>
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</code><code>//-------------------------------------------------------<br>
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// Peripheral Memory Space:<br>
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//-------------------------------------------------------<br>
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// The original MSP430 architecture map the peripherals<br>
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// from 0x0000 to 0x01FF (i.e. 512B of the memory space).<br>
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// The following defines allow you to expand this space<br>
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// up to 32 kB (i.e. from 0x0000 to 0x7fff).<br>
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// As a consequence, the data memory mapping will be<br>
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// shifted up and a custom linker script will therefore<br>
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// be required by the GCC compiler.<br>
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//-------------------------------------------------------<br>
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//`define PER_SIZE_CUSTOM<br>
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//`define PER_SIZE_32_KB<br>
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//`define PER_SIZE_16_KB<br>
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//`define PER_SIZE_8_KB<br>
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//`define PER_SIZE_4_KB<br>
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//`define PER_SIZE_2_KB<br>
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//`define PER_SIZE_1_KB<br>
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`define PER_SIZE_512_B<br>
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      <br>
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      <br></code><code>//-------------------------------------------------------<br>
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// Defines the debugger CPU_CTL.RST_BRK_EN reset value<br>
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// (CPU break on PUC reset)<br>
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//-------------------------------------------------------<br>
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// When defined, the CPU will automatically break after<br>
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// a PUC occurrence by default. This is typically useful<br>
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// when the program memory can only be initialized through<br>
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// the serial debug interface.<br>
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//-------------------------------------------------------<br>
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`define DBG_RST_BRK_EN</code><br>
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</td></tr></tbody></table><br><br>
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Design consideration at this stage are:
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<ul>
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        <li>Setting a peripheral memory space to something else than 512B
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will shift the data memory mapping up, which in turn will require the
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use of a custom linker script. If you don't know what a linker script
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is and if you don't want to know what it is, you should probably not
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modify this section.</li>
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        <li>The sum of program, data and peripheral memory space <b>MUST NOT</b> exceed 64 kB</li>
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</ul>
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<br>
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<b><u>Note:</u></b> when selected, full custom peripheral memory space can be specified in the "Expert System Configuration" section.
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<br>
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<br>
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<a name="2.3.3 Expert System Configuration"></a>
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<h3>2.3.3 Expert System Configuration</h3>
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In this section, you will find configuration options which are
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relevant for roughly 0.1% of the users (according to a highly
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reliable market analysis ;-) ).
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<br><br>
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<table border="0" cellpadding="0" cellspacing="4">
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<tbody><tr>
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<td width="35"><br>
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</td>
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<td bgcolor="#d0d0d0" width="3"><br>
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</td>
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<td width="15"><br>
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</td>
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<td>
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        <code> //============================================================================<br>
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//============================================================================<br>
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// EXPERT SYSTEM CONFIGURATION ( !!!! EXPERTS ONLY !!!! )<br>
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//============================================================================<br>
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//============================================================================<br>
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//<br>
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// IMPORTANT NOTE:&nbsp; Please update following configuration options ONLY if<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
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you have a good reason to do so... and if you know what<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; you are doing :-P<br>
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//<br>
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//============================================================================<br>
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      <br>
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//-------------------------------------------------------<br>
361
// Select serial debug interface protocol<br>
362
//-------------------------------------------------------<br>
363
//&nbsp;&nbsp;&nbsp; DBG_UART -&gt; Enable UART (8N1) debug interface<br>
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//&nbsp;&nbsp;&nbsp; DBG_I2C&nbsp; -&gt; Enable I2C debug interface<br>
365
//-------------------------------------------------------<br>
366
`define DBG_UART<br>
367
//`define DBG_I2C<br>
368
      <br>
369
      <br>
370
//-------------------------------------------------------<br>
371
// Enable the I2C broadcast address<br>
372
//-------------------------------------------------------<br>
373
// For multicore systems, a common I2C broadcast address<br>
374
// can be given to all oMSP cores in order to<br>
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// synchronously RESET, START, STOP, or STEP all CPUs<br>
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// at once with a single I2C command.<br>
377
// If you have a single openMSP430 in your system,<br>
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// this option can stay commented-out.<br>
379
//-------------------------------------------------------<br>
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//`define DBG_I2C_BROADCAST<br>
381
      <br>
382
<br>
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//-------------------------------------------------------<br>// Number of hardware breakpoint/watchpoint units<br>
384
// (each unit contains two hardware addresses available<br>
385
// for breakpoints or watchpoints):<br>
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//&nbsp;&nbsp; - DBG_HWBRK_0 -&gt; Include hardware breakpoints unit 0<br>
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//&nbsp;&nbsp; - DBG_HWBRK_1 -&gt; Include hardware breakpoints unit 1<br>
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//&nbsp;&nbsp; - DBG_HWBRK_2 -&gt; Include hardware breakpoints unit 2<br>
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//&nbsp;&nbsp; - DBG_HWBRK_3 -&gt; Include hardware breakpoints unit 3<br>
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//-------------------------------------------------------<br>
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// Please keep in mind that hardware breakpoints only<br>
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// make sense whenever the program memory is not an SRAM<br>
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// (i.e. Flash/OTP/ROM/...) or when you are interested<br>
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// in data breakpoints.<br>
395
//-------------------------------------------------------<br>
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//`define&nbsp; DBG_HWBRK_0<br>
397
//`define&nbsp; DBG_HWBRK_1<br>
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//`define&nbsp; DBG_HWBRK_2<br>
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//`define&nbsp; DBG_HWBRK_3<br>
400
      <br>
401
      <br>
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//-------------------------------------------------------<br>
403
// Enable/Disable the hardware breakpoint RANGE mode<br>
404
//-------------------------------------------------------<br>
405
// When enabled this feature allows the hardware breakpoint<br>
406
// units to stop the cpu whenever an instruction or data<br>
407
// access lays within an address range.<br>
408
// Note that this feature is not supported by GDB.<br>
409
//-------------------------------------------------------<br>
410
//`define DBG_HWBRK_RANGE<br>
411
      <br>
412
      <br>
413
//-------------------------------------------------------<br>
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// Custom Program/Data and Peripheral Memory Spaces<br>
415
//-------------------------------------------------------<br>
416
// The following values are valid only if the<br>
417
// corresponding *_SIZE_CUSTOM defines are uncommented:<br>
418
//<br>
419
//  - *_SIZE   : size of the section in bytes.<br>
420
//  - *_AWIDTH : address port width, this value must allow<br>
421
//               to address all WORDS of the section<br>
422
//               (i.e. the *_SIZE divided by 2)<br>
423
//-------------------------------------------------------<br>
424
<br>
425
// Custom Program memory (enabled with PMEM_SIZE_CUSTOM)<br>
426
`define PMEM_CUSTOM_AWIDTH      10<br>
427
`define PMEM_CUSTOM_SIZE      2048<br>
428
<br>
429
// Custom Data memory    (enabled with DMEM_SIZE_CUSTOM)<br>
430
`define DMEM_CUSTOM_AWIDTH       6<br>
431
`define DMEM_CUSTOM_SIZE       128<br>
432
<br>
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// Custom Peripheral memory  (enabled with PER_SIZE_CUSTOM)<br>
434
`define PER_CUSTOM_AWIDTH        8<br>
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`define PER_CUSTOM_SIZE        512<br>
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<br>
437
<br>
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//-------------------------------------------------------<br>
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// ASIC version<br>
440
//-------------------------------------------------------<br>
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// When uncommented, this define will enable the<br>
442
// ASIC system configuration section (see below) and<br>
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// will activate scan support for production test.<br>
444
//<br>
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// WARNING: if you target an FPGA, leave this define<br>
446
//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; commented.<br>
447
//-------------------------------------------------------<br>
448
//`define ASIC<br></code></td></tr></tbody></table><br><br>
449 116 olivier.gi
Design consideration at this stage are:
450
<ul>
451 195 olivier.gi
        <li>This is the expert section... so you know what your are doing anyway, right ;-)</li>
452 116 olivier.gi
</ul>
453 135 olivier.gi
<br>
454
All remaining defines located after the ASIC section in the <b><i>openMSP430_defines.v</i></b> file are system constants and <b>MUST NOT</b> be edited.
455 224 olivier.gi
<br>
456
<br>
457 166 olivier.gi
 
458 195 olivier.gi
<a name="2.3.4 Parameters For Multi-Core Systems"></a>
459
<h3>2.3.4 Parameters For Multi-Core Systems</h3>
460
 
461 224 olivier.gi
In addition to the define file, two Verilog parameters are available to facilitate software development on multi-core systems.<br>
462 166 olivier.gi
For example, in a dual-core openMSP430 system, the cores can be instantiated as following:
463
<br>
464
<br>
465
<table border="0" cellpadding="0" cellspacing="4">
466
<tbody><tr>
467
<td width="35"><br></td>
468
<td bgcolor="#d0d0d0" width="3"><br></td>
469
<td width="15"><br></td>
470
<td>
471
        <code>
472
                          openMSP430 #(.INST_NR (<strong>0</strong>), .TOTAL_NR(<strong>1</strong>)) openMSP430_core_0 (
473
                      <br>...
474
                      <br>);
475
                      <br>
476
                      <br>openMSP430 #(.INST_NR (<strong>1</strong>), .TOTAL_NR(<strong>1</strong>)) openMSP430_core_1 (
477
                      <br>...
478
                      <br>);
479
        </code>
480
</td>
481
</tr>
482
</tbody>
483
</table>
484
<br>
485 202 olivier.gi
The values of these parameters are then directly accessible by software through the CPU_NR register of the SFR peripheral.<br>
486 166 olivier.gi
For example, if both cores share the same program memory, the software can take advantage of this information as following:
487 135 olivier.gi
<br><br>
488 166 olivier.gi
<table border="0" cellpadding="0" cellspacing="4">
489
<tbody><tr>
490
<td width="35"><br></td>
491
<td bgcolor="#d0d0d0" width="3"><br></td>
492
<td width="15"><br></td>
493
<td>
494
        <code>
495
                           "...
496
                      <br>int main(void) {
497
                      <br>&nbsp;&nbsp;if (CPU_NR==<strong>0x0100</strong>) {
498
                      <br>&nbsp;&nbsp;&nbsp;&nbsp;main_core_0();&nbsp;// Main routine call for core 0
499
                      <br>&nbsp;&nbsp;}
500
                      <br>&nbsp;&nbsp;if (CPU_NR==<strong>0x0101</strong>) {
501
                      <br>&nbsp;&nbsp;&nbsp;&nbsp;main_core_1();&nbsp;// Main routine call for core 1
502
                      <br>&nbsp;&nbsp;}
503
                      <br>}
504
                      <br>..."
505
        </code>
506
</td>
507
</tr>
508
</tbody>
509
</table>
510
<br><br>
511 50 olivier.gi
 
512 195 olivier.gi
<a name="2.4 Memory mapping"></a>
513
<h2>2.4 Memory mapping</h2>
514 50 olivier.gi
 
515 135 olivier.gi
As discussed earlier, the openMSP430 memory mapping is fully configurable.<br>The
516
basic system configuration section allows to adjust program and data
517
memory sizes while keeping 100% compatibility with the pre-existing
518
linker scripts provided by MSPGCC (or any other toolchain for that
519
matter).<br>
520
However, an increasing number of users saw the 512B space available for
521
peripherals in the standard MSP430 architecture as a limitation.
522
Therefore, the advanced system configuration section gives the
523
possibility to up-scale the reserved peripheral address space anywhere
524
between 512B and 32kB. As a consequence, the data memory space will be
525
shifted up, which means that the linker script of your favorite
526
toolchain will have to be modified accordingly.<br>
527
The following schematic should hopefully illustrate this:<br>
528
<br><br>
529 202 olivier.gi
<img src="http://opencores.org/usercontent,img,1306066277" alt="Memory mapping" title="Memory mapping" width="80%">
530 135 olivier.gi
<br>
531 195 olivier.gi
<br><br>
532 116 olivier.gi
 
533 195 olivier.gi
<a name="2.5 Interrupt mapping"></a>
534
<h2>2.5 Interrupt mapping</h2>
535
 
536
The number of supported interrupts is configurable with the IRQ_xx macros.
537
The interrupt vectors are then mapped as following:
538 135 olivier.gi
<br><br>
539 195 olivier.gi
<img src="http://opencores.org/usercontent,img,1387146236" alt="Interrupt mapping" title="Interrupt mapping" width="70%">
540 116 olivier.gi
 
541 195 olivier.gi
<br><br>
542
<a name="2.6 Pinout"></a>
543
<h2>2.6 Pinout</h2>
544
 
545 50 olivier.gi
The full pinout of the openMSP430 core is provided in the following table:
546 135 olivier.gi
<br><br>
547 50 olivier.gi
<table border="1">
548 135 olivier.gi
        <tbody><tr> <td align="center"><b>Port Name</b></td> <td align="center"><b>Direction</b></td> <td align="center"><b>Width</b>    </td> <td style="vertical-align: top; text-align: center;"><span style="font-weight: bold;">Clock</span><br style="font-weight: bold;">
549
      <span style="font-weight: bold;">Domain</span><br>
550
      </td>
551
<td align="center"><b>Description</b></td> </tr>
552 224 olivier.gi
 
553 135 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Clocks &amp; Power-Managment</i></b>                         </td></tr>
554 50 olivier.gi
        <tr>
555 116 olivier.gi
             <td> cpu_en                                                           </td>
556
             <td> Input                                                            </td>
557
             <td> 1                                                                </td>
558 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
559
or mclk<b><sup><font color="#ff0000">4</font></sup></b></td>
560
<td> Enable CPU code execution (asynchronous and non-glitchy).<br>
561
 Set to 1 if unused.    </td>
562 224 olivier.gi
        </tr>
563 116 olivier.gi
        <tr>
564 50 olivier.gi
             <td> dco_clk                                                          </td>
565
             <td> Input                                                            </td>
566
             <td> 1                                                                </td>
567 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">-<br>
568
      </td>
569
<td> Fast oscillator (fast clock)                          </td>
570 224 olivier.gi
        </tr>
571 50 olivier.gi
        <tr>
572 135 olivier.gi
      <td style="vertical-align: top;"> lfxt_clk</td>
573
      <td style="vertical-align: top;">Input<br>
574
      </td>
575
      <td style="vertical-align: top;">1<br>
576
      </td>
577
      <td style="vertical-align: top; text-align: center;">-<br>
578
      </td>
579
<td style="vertical-align: top;"> Low frequency oscillator (typ. 32kHz)<br>
580
Set to 0 if unused.<br>
581
      </td>
582
    </tr>
583
    <tr>
584
      <td style="vertical-align: top;"> mclk</td>
585
      <td style="vertical-align: top;">Output<br>
586
      </td>
587
      <td style="vertical-align: top;">1<br>
588
      </td>
589
      <td style="vertical-align: top; text-align: center;">-<br>
590
      </td>
591
<td style="vertical-align: top;"> Main system clock</td>
592
    </tr>
593
    <tr>
594
      <td style="vertical-align: top;"> aclk_en</td>
595
      <td style="vertical-align: top;">Output</td>
596
      <td style="vertical-align: top;">1<br>
597
      </td>
598
      <td style="vertical-align: top; text-align: center;">mclk<br>
599
      </td>
600
<td style="vertical-align: top;">FPGA ONLY: ACLK enable</td>
601
    </tr>
602
    <tr>
603
      <td style="vertical-align: top;">smclk_en</td>
604
      <td style="vertical-align: top;">Output</td>
605
      <td style="vertical-align: top;">1<br>
606
      </td>
607
      <td style="vertical-align: top; text-align: center;">mclk<br>
608
      </td>
609
<td style="vertical-align: top;">FPGA ONLY: SMCLK enable</td>
610
    </tr>
611
    <tr>
612
      <td style="vertical-align: top;">dco_enable<br>
613
      </td>
614
      <td style="vertical-align: top;">Output<br>
615
      </td>
616
      <td style="vertical-align: top;">1<br>
617
      </td>
618
      <td style="vertical-align: top; text-align: center;">dco_clk<br>
619
      </td>
620
<td style="vertical-align: top;">ASIC ONLY: Fast oscillator enable<br>
621
      </td>
622
    </tr>
623
    <tr>
624
      <td style="vertical-align: top;">dco_wkup<br>
625
      </td>
626
      <td style="vertical-align: top;">Output<br>
627
      </td>
628
      <td style="vertical-align: top;">1<br>
629
      </td>
630
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
631
      </td>
632
<td style="vertical-align: top;">ASIC ONLY: Fast oscillator wakeup (asynchronous)<br>
633
      </td>
634
    </tr>
635
 
636 50 olivier.gi
        <tr>
637 135 olivier.gi
      <td style="vertical-align: top;">lfxt_enable<br>
638
      </td>
639
      <td style="vertical-align: top;">Output<br>
640
      </td>
641
      <td style="vertical-align: top;">1<br>
642
      </td>
643
      <td style="vertical-align: top; text-align: center;">lfxt_clk<br>
644
      </td>
645
<td style="vertical-align: top;">ASIC ONLY: Low frequency oscillator enable<br>
646
      </td>
647
    </tr>
648
    <tr>
649
      <td style="vertical-align: top;">lfxt_wkup<br>
650
      </td>
651
      <td style="vertical-align: top;">Output<br>
652
      </td>
653
      <td style="vertical-align: top;">1<br>
654
      </td>
655
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
656
      </td>
657
<td style="vertical-align: top;">ASIC ONLY: Low frequency oscillator wakeup (asynchronous)<br>
658
      </td>
659
    </tr>
660
 
661 50 olivier.gi
        <tr>
662 135 olivier.gi
      <td style="vertical-align: top;">aclk<br>
663
      </td>
664
      <td style="vertical-align: top;">Output<br>
665
      </td>
666
      <td style="vertical-align: top;">1<br>
667
      </td>
668
      <td style="vertical-align: top; text-align: center;">-<br>
669
      </td>
670
<td style="vertical-align: top;">ASIC ONLY: ACLK<br>
671
      </td>
672
    </tr>
673
 
674 50 olivier.gi
        <tr>
675 135 olivier.gi
      <td style="vertical-align: top;">smclk<br>
676
      </td>
677
      <td style="vertical-align: top;">Output<br>
678
      </td>
679
      <td style="vertical-align: top;">1<br>
680
      </td>
681
      <td style="vertical-align: top; text-align: center;">-<br>
682
      </td>
683
<td style="vertical-align: top;">ASIC ONLY: SMCLK<br>
684
      </td>
685
    </tr>
686 50 olivier.gi
 
687 135 olivier.gi
 
688 50 olivier.gi
        <tr>
689 135 olivier.gi
      <td style="vertical-align: top;">wkup<br>
690
      </td>
691
      <td style="vertical-align: top;">Input<br>
692
      </td>
693
      <td style="vertical-align: top;">1<br>
694
      </td>
695
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
696
      </td>
697
<td style="vertical-align: top;">ASIC ONLY: System Wake-up (asynchronous and non-glitchy)<br>
698
Set to 0 if unused.<br>
699
      </td>
700
    </tr>
701
<tr> <td colspan="5" align="center"> <b><i>Resets</i></b>                         </td></tr>
702
        <tr>
703 116 olivier.gi
             <td> puc_rst                                                          </td>
704 50 olivier.gi
             <td> Output                                                           </td>
705
             <td> 1                                                                </td>
706 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
707
      </td>
708
<td> Main system reset                                                </td>
709 50 olivier.gi
   </tr>
710
        <tr>
711
             <td> reset_n                                                          </td>
712
             <td> Input                                                            </td>
713
             <td> 1                                                                </td>
714 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
715
      </td>
716
<td> Reset Pin (active low, asynchronous and non-glitchy)                             </td>
717 50 olivier.gi
        </tr>
718
 
719 202 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Interrupts</i></b>                     </td></tr>
720
        <tr>
721
                  <td> irq                                                              </td>
722
                  <td> Input                                                            </td>
723
                  <td> `IRQ_NR-2<b><sup><font color="#ff0000">1</font></sup></b>        </td>
724
                  <td style="vertical-align: top; text-align: center;">mclk<br>
725
      </td>
726
<td> Maskable interrupts (one-hot signal)                             </td>
727
   </tr>
728 224 olivier.gi
        <tr>
729 202 olivier.gi
             <td> nmi                                                              </td>
730
             <td> Input                                                            </td>
731
             <td> 1                                                                </td>
732
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
733
or mclk<b><sup><font color="#ff0000">4</font></sup></b></td>
734
<td> Non-maskable interrupt (asynchronous and non-glitchy)<br>
735
Set to 0 if unused.<br>
736
                            </td>
737
        </tr>
738
        <tr>
739
             <td> irq_acc                                                          </td>
740
             <td> Output                                                           </td>
741
             <td> `IRQ_NR-2<b><sup><font color="#ff0000">1</font></sup></b>        </td>
742
             <td style="vertical-align: top; text-align: center;">mclk<br>
743
      </td>
744
<td> Interrupt request accepted (one-hot signal)                      </td>
745
        </tr>
746 50 olivier.gi
 
747 135 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Program Memory interface</i></b>       </td></tr>
748 224 olivier.gi
        <tr>
749 50 olivier.gi
             <td> pmem_addr                                                        </td>
750
             <td> Output                                                           </td>
751 135 olivier.gi
             <td><small> `PMEM_AWIDTH</small> <b><sup><font color="#ff0000">1</font></sup></b> </td>
752
             <td style="vertical-align: top; text-align: center;">mclk<br>
753
      </td>
754
<td> Program Memory address                                           </td>
755 50 olivier.gi
        </tr>
756 224 olivier.gi
        <tr>
757 50 olivier.gi
             <td> pmem_cen                                                         </td>
758
             <td> Output                                                           </td>
759
             <td> 1                                                                </td>
760 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
761
      </td>
762
<td> Program Memory chip enable (low active)                          </td>
763 50 olivier.gi
        </tr>
764 224 olivier.gi
        <tr>
765 50 olivier.gi
             <td> pmem_din                                                         </td>
766
             <td> Output                                                           </td>
767
             <td> 16                                                               </td>
768 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
769
      </td>
770
<td> Program Memory data input (optional <b><sup><font color="#ff0000">2</font></sup></b>)</td>
771 50 olivier.gi
        </tr>
772 224 olivier.gi
        <tr>
773 50 olivier.gi
             <td> pmem_dout                                                        </td>
774 224 olivier.gi
             <td> Input                                                            </td>
775 50 olivier.gi
             <td> 16                                                               </td>
776 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
777
      </td>
778
<td> Program Memory data output                                       </td>
779 50 olivier.gi
        </tr>
780 224 olivier.gi
        <tr>
781 50 olivier.gi
             <td> pmem_wen                                                         </td>
782
             <td> Output                                                           </td>
783
             <td> 2                                                                </td>
784 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
785
      </td>
786
<td> Program Memory write byte enable (low active) (optional <b><sup><font color="#ff0000">2</font></sup></b>) </td>
787 50 olivier.gi
        </tr>
788
 
789 135 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Data Memory interface</i></b>          </td></tr>
790 50 olivier.gi
        <tr>
791
             <td> dmem_addr                                                        </td>
792
             <td> Output                                                           </td>
793 135 olivier.gi
             <td><small> `DMEM_AWIDTH</small> <b><sup><font color="#ff0000">1</font></sup></b></td>
794
             <td style="vertical-align: top; text-align: center;">mclk<br>
795
      </td>
796
<td> Data Memory address                                              </td>
797 50 olivier.gi
        </tr>
798
        <tr>
799
             <td> dmem_cen                                                         </td>
800
             <td> Output                                                           </td>
801
             <td> 1                                                                </td>
802 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
803
      </td>
804
<td> Data Memory chip enable (low active)                             </td>
805 50 olivier.gi
        </tr>
806
        <tr>
807
             <td> dmem_din                                                         </td>
808
             <td> Output                                                           </td>
809
             <td> 16                                                               </td>
810 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
811
      </td>
812
<td> Data Memory data input                                           </td>
813 50 olivier.gi
        </tr>
814
        <tr>
815
             <td> dmem_dout                                                        </td>
816
             <td> Input                                                            </td>
817
             <td> 16                                                               </td>
818 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
819
      </td>
820
<td> Data Memory data output                                          </td>
821 50 olivier.gi
        </tr>
822
        <tr>
823
             <td> dmem_wen                                                         </td>
824
             <td> Output                                                           </td>
825
             <td> 2                                                                </td>
826 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
827
      </td>
828
<td> Data Memory write byte enable (low active)                       </td>
829 50 olivier.gi
        </tr>
830
 
831 135 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>External Peripherals interface</i></b> </td></tr>
832 50 olivier.gi
        <tr>
833
             <td> per_addr                                                         </td>
834
             <td> Output                                                           </td>
835 116 olivier.gi
             <td> 14                                                                </td>
836 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
837
      </td>
838
<td> Peripheral address                                               </td>
839 50 olivier.gi
        </tr>
840
        <tr>
841
             <td> per_din                                                          </td>
842
             <td> Output                                                           </td>
843
             <td> 16                                                               </td>
844 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
845
      </td>
846
<td> Peripheral data input                                            </td>
847 50 olivier.gi
   </tr>
848
        <tr>
849
             <td> per_dout                                                         </td>
850
             <td> Input                                                            </td>
851
             <td> 16                                                               </td>
852 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
853
      </td>
854
<td> Peripheral data output                                           </td>
855 50 olivier.gi
        </tr>
856
        <tr>
857
             <td> per_en                                                           </td>
858
             <td> Output                                                           </td>
859
             <td> 1                                                                </td>
860 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
861
      </td>
862
<td> Peripheral enable (high active)                                  </td>
863 50 olivier.gi
        </tr>
864
        <tr>
865 116 olivier.gi
             <td> per_we                                                           </td>
866 50 olivier.gi
             <td> Output                                                           </td>
867
             <td> 2                                                                </td>
868 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
869
      </td>
870
<td> Peripheral write enable (high active)                            </td>
871 50 olivier.gi
        </tr>
872 202 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Direct Memory Access interface</i></b> </td></tr>
873 50 olivier.gi
        <tr>
874 202 olivier.gi
             <td> dma_addr                                                         </td>
875
             <td> Input                                                            </td>
876
             <td> 15                                                               </td>
877
             <td style="vertical-align: top; text-align: center;">mclk<br>
878 135 olivier.gi
      </td>
879 202 olivier.gi
<td> Direct Memory Access address                                              </td>
880
        </tr>
881
        <tr>
882
             <td> dma_din                                                          </td>
883
             <td> Input                                                            </td>
884
             <td> 16                                                               </td>
885
             <td style="vertical-align: top; text-align: center;">mclk<br>
886
      </td>
887
<td> Direct Memory Access data input                                           </td>
888 50 olivier.gi
   </tr>
889 202 olivier.gi
        <tr>
890
             <td> dma_dout                                                         </td>
891
             <td> Output                                                           </td>
892
             <td> 16                                                               </td>
893
             <td style="vertical-align: top; text-align: center;">mclk<br>
894
      </td>
895
<td> Direct Memory Access data output                                          </td>
896
        </tr>
897
        <tr>
898
             <td> dma_en                                                           </td>
899 50 olivier.gi
             <td> Input                                                            </td>
900
             <td> 1                                                                </td>
901 202 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
902
      </td>
903
<td> Direct Memory Access enable (high active)                                 </td>
904 50 olivier.gi
        </tr>
905
        <tr>
906 202 olivier.gi
             <td> dma_priority                                                     </td>
907
             <td> Input                                                            </td>
908
             <td> 1                                                                </td>
909
             <td style="vertical-align: top; text-align: center;">mclk<br>
910
      </td>
911
<td> Direct Memory Access priority (0:low / 1:high)                            </td>
912
        </tr>
913
        <tr>
914
             <td> dma_ready                                                        </td>
915 50 olivier.gi
             <td> Output                                                           </td>
916 202 olivier.gi
             <td> 1                                                                </td>
917 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
918
      </td>
919 202 olivier.gi
<td> Direct Memory Access is complete                                          </td>
920 50 olivier.gi
        </tr>
921 202 olivier.gi
        <tr>
922
             <td> dma_resp                                                         </td>
923
             <td> Output                                                           </td>
924
             <td> 1                                                                </td>
925
             <td style="vertical-align: top; text-align: center;">mclk<br>
926
      </td>
927
<td> Direct Memory Access response (0:Okay / 1:Error)                          </td>
928
        </tr>
929
        <tr>
930
             <td> dma_we                                                           </td>
931
             <td> Input                                                            </td>
932
             <td> 2                                                                </td>
933
             <td style="vertical-align: top; text-align: center;">mclk<br>
934
      </td>
935
<td> Direct Memory Access write byte enable (high active)                      </td>
936
        </tr>
937
        <tr>
938
             <td> dma_wkup                                                         </td>
939
             <td> Input                                                            </td>
940
             <td> 1                                                                </td>
941
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
942
      </td>
943
<td> ASIC ONLY: DMA Wake-up (asynchronous and non-glitchy)                     </td>
944
        </tr>
945 50 olivier.gi
 
946 135 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Serial Debug interface</i></b>         </td></tr>
947 224 olivier.gi
        <tr>
948 116 olivier.gi
             <td> dbg_en                                                           </td>
949
             <td> Input                                                            </td>
950
             <td> 1                                                                </td>
951 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
952
 
953
or mclk<b><sup><font color="#ff0000">4</font></sup></b></td>
954
<td> Debug interface enable (asynchronous) <b><sup><font color="#ff0000">3</font></sup></b> </td>
955 116 olivier.gi
        </tr>
956 224 olivier.gi
        <tr>
957 50 olivier.gi
             <td> dbg_freeze                                                       </td>
958
             <td> Output                                                           </td>
959
             <td> 1                                                                </td>
960 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
961
      </td>
962
<td> Freeze peripherals                                               </td>
963 50 olivier.gi
        </tr>
964 224 olivier.gi
        <tr>
965 50 olivier.gi
             <td> dbg_uart_txd                                                     </td>
966
             <td> Output                                                           </td>
967
             <td> 1                                                                </td>
968 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk<br>
969
      </td>
970
<td> Debug interface: UART TXD                                        </td>
971 50 olivier.gi
        </tr>
972 224 olivier.gi
        <tr>
973 50 olivier.gi
             <td> dbg_uart_rxd                                                     </td>
974
             <td> Input                                                            </td>
975
             <td> 1                                                                </td>
976 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
977
      </td>
978
<td> Debug interface: UART RXD (asynchronous)                         </td>
979 166 olivier.gi
        </tr><tr>
980
      <td style="vertical-align: top;">dbg_i2c_addr<br>
981
      </td>
982
      <td style="vertical-align: top;"> Input</td>
983
      <td style="vertical-align: top;"> 7</td>
984
      <td style="vertical-align: top; text-align: center;">mclk</td>
985
      <td style="vertical-align: top;">Debug interface: I2C Address<br>
986
      </td>
987
    </tr>
988
    <tr>
989
      <td style="vertical-align: top;">dbg_i2c_broadcast<br>
990
      </td>
991
      <td style="vertical-align: top;"> Input</td>
992
      <td style="vertical-align: top;"> 7</td>
993
      <td style="vertical-align: top; text-align: center;">mclk</td>
994
      <td style="vertical-align: top;">Debug interface: I2C Broadcast Address (for multicore systems)<br>
995
      </td>
996
    </tr>
997
    <tr>
998
      <td style="vertical-align: top;">dbg_i2c_scl<br>
999
      </td>
1000
      <td style="vertical-align: top;"> Input</td>
1001
      <td style="vertical-align: top;"> 1</td>
1002
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;</td>
1003
      <td style="vertical-align: top;">Debug interface: I2C SCL (asynchronous)</td>
1004
    </tr>
1005
    <tr>
1006
      <td style="vertical-align: top;">dbg_i2c_sda_in<br>
1007
      </td>
1008
      <td style="vertical-align: top;"> Input</td>
1009
      <td style="vertical-align: top;"> 1</td>
1010
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;</td>
1011
      <td style="vertical-align: top;">Debug interface: I2C SDA IN (asynchronous)</td>
1012
    </tr>
1013
    <tr>
1014
      <td style="vertical-align: top;">dbg_i2c_sda_out<br>
1015
      </td>
1016
      <td style="vertical-align: top;"> Output</td>
1017
      <td style="vertical-align: top;"> 1</td>
1018
      <td style="vertical-align: top; text-align: center;">mclk</td>
1019
      <td style="vertical-align: top;">Debug interface: I2C SDA OUT<br>
1020
      </td>
1021
    </tr>
1022
<tr align="center">
1023 135 olivier.gi
      <td colspan="5" rowspan="1" style="vertical-align: top;"><b><i>Scan</i></b></td>
1024
    </tr>
1025
    <tr>
1026
      <td style="vertical-align: top;">scan_enable<br>
1027
      </td>
1028
      <td style="vertical-align: top;">Input<br>
1029
      </td>
1030
      <td style="vertical-align: top;">1<br>
1031
      </td>
1032
      <td style="vertical-align: top; text-align: center;">dco_clk<br>
1033
      </td>
1034
<td style="vertical-align: top;">ASIC ONLY: Scan enable (active during scan shifting)<br>
1035
      </td>
1036
    </tr>
1037
    <tr>
1038
      <td style="vertical-align: top;">scan_mode<br>
1039
      </td>
1040
      <td style="vertical-align: top;">Input<br>
1041
      </td>
1042
      <td style="vertical-align: top;">1<br>
1043
      </td>
1044
      <td style="vertical-align: top; text-align: center;">&lt;stable&gt;<br>
1045
      </td>
1046
<td style="vertical-align: top;">ASIC ONLY: Scan mode<br>
1047
      </td>
1048
    </tr>
1049 50 olivier.gi
 
1050 224 olivier.gi
</tbody></table>
1051 135 olivier.gi
<br>
1052 195 olivier.gi
<b><sup><font color="#ff0000">1</font></sup></b>: This parameter is declared in the "openMSP430_defines.v" file and defines the RAM/ROM size or the number of interrupts vectors (16, 32 or 64).<br>
1053 135 olivier.gi
<b><sup><font color="#ff0000">2</font></sup></b>: These two optional
1054
ports can be connected whenever the program memory is a RAM. This will
1055
allow the user to load a program through the serial debug interface and
1056
to use software breakpoints.<br>
1057
<b><sup><font color="#ff0000">3</font></sup></b>: When disabled, the debug interface is hold into reset (and clock gated in ASIC mode). As a consequence, the <b><i>dbg_en</i></b> port can be used to reset the debug interface without disrupting the CPU execution.<br>
1058
<b><sup><font color="#ff0000">4</font></sup></b>: Clock domain is selectable through configuration in the "openMSP430_defines.v" file (see Advanced System Configuration).<br>
1059
<br>
1060
<span style="text-decoration: underline; font-weight: bold;">Note:</span> in the FPGA configuration, the <span style="font-style: italic;">ASIC ONLY</span> signals must be left unconnected (for the outputs) and tied low (for the inputs).<br>
1061
 
1062 195 olivier.gi
<a name="2.7 Instruction Cycles and Lengths"></a>
1063
<h2>2.7 Instruction Cycles and Lengths</h2>
1064 50 olivier.gi
 
1065 135 olivier.gi
Please note that a detailed description of the instruction and addressing modes can be found in the <b><a href="http://www.ti.com/litv/pdf/slau049f">MSP430x1xx Family User's Guide</a></b> (Chapter 3).<br><br>
1066
The number of CPU clock cycles required for an instruction depends on
1067
the instruction format and the addressing modes used, not the
1068
instruction itself.<br>
1069 116 olivier.gi
In the following tables, the number of clock cycles refers to the main clock (<i>MCLK</i>).
1070 50 olivier.gi
Differences with the original MSP430 are highlighted in green (the original value being red).
1071
<ul>
1072
        <li><b>Interrupt and Reset Cycles</b></li>
1073
</ul>
1074
<table border="1">
1075 135 olivier.gi
        <tbody><tr> <td align="center"><b>Action</b>  </td> <td align="center"><b>No. of Cycles</b></td> <td align="center"><b>Length of Instruction</b></td> </tr>
1076 50 olivier.gi
        <tr> <td> Return from interrupt (RETI) </td> <td align="center">       5            </td> <td align="center">           1                </td> </tr>
1077
        <tr> <td> Interrupt accepted           </td> <td align="center">       6            </td> <td align="center">           -                </td> </tr>
1078
        <tr> <td> WDT reset                    </td> <td align="center">       4            </td> <td align="center">           -                </td> </tr>
1079
        <tr> <td> Reset (!RST/NMI)             </td> <td align="center">       4            </td> <td align="center">           -                </td> </tr>
1080 135 olivier.gi
</tbody></table>
1081 50 olivier.gi
 
1082
<ul>
1083
        <li><b>Format-II (Single Operand) Instruction Cycles and Lengths</b></li>
1084
</ul>
1085
<table border="1">
1086 135 olivier.gi
        <tbody><tr> <td rowspan="2" align="center"><b>Addressing Mode</b>  </td> <td colspan="3" align="center"><b>No. of Cycles</b></td> <td rowspan="2" align="center"><b>Length of Instruction</b></td> </tr>
1087 50 olivier.gi
        <tr>                                                              <td><b>RRA, RRC, SWPB, SXT</b></td> <td><b>PUSH</b></td> <td><b>CALL</b></td> </tr>
1088
 
1089
        <tr> <td align="center"> Rn    </td> <td align="center"> 1   </td> <td align="center"> 3 </td> <td align="center"><b><font color="green">3 </font><font color="red"> (4)</font></b></td> <td align="center"> 1 </td> </tr>
1090
        <tr> <td align="center"> @Rn   </td> <td align="center"> 3   </td> <td align="center"> 4 </td> <td align="center"> 4 </td> <td align="center"> 1 </td> </tr>
1091
        <tr> <td align="center"> @Rn+  </td> <td align="center"> 3   </td> <td align="center"><b><font color="green">4 </font><font color="red"> (5)</font></b></td> <td align="center"><b><font color="green">4 </font><font color="red"> (5)</font></b></td> <td align="center"> 1 </td> </tr>
1092
        <tr> <td align="center"> #N    </td> <td align="center"> N/A </td> <td align="center"> 4 </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1093
        <tr> <td align="center"> X(Rn) </td> <td align="center"> 4   </td> <td align="center"> 5 </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1094
        <tr> <td align="center"> EDE   </td> <td align="center"> 4   </td> <td align="center"> 5 </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1095 135 olivier.gi
        <tr> <td align="center"> &amp;EDE  </td> <td align="center"> 4   </td> <td align="center"> 5 </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1096
</tbody></table>
1097 50 olivier.gi
 
1098
<ul>
1099
        <li><b>Format-III (Jump) Instruction Cycles and Lengths</b></li>
1100
</ul>
1101
All jump instructions require one code word, and take two CPU cycles to execute, regardless of whether the jump is taken or not.
1102
 
1103
<ul>
1104
        <li><b>Format-I (Double Operand) Instruction Cycles and Lengths</b></li>
1105
</ul>
1106
<table border="1">
1107 135 olivier.gi
        <tbody><tr> <td colspan="2" align="center"><b>Addressing Mode</b>  </td> <td rowspan="2" align="center"><b>No. of Cycles</b></td> <td rowspan="2" align="center"><b>Length of Instruction</b></td> </tr>
1108 50 olivier.gi
        <tr> <td align="center"><b>Src</b></td> <td align="center"><b>Dst</b></td> </tr>
1109
 
1110
        <tr> <td rowspan="5" align="center"> Rn    </td> <td align="center"> Rm    </td> <td align="center"> 1 </td> <td align="center"> 1 </td> </tr>
1111
        <tr>                                             <td align="center"> PC    </td> <td align="center"> 2 </td> <td align="center"> 1 </td> </tr>
1112
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 4 </td> <td align="center"> 2 </td> </tr>
1113
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 4 </td> <td align="center"> 2 </td> </tr>
1114 135 olivier.gi
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 4 </td> <td align="center"> 2 </td> </tr>
1115 50 olivier.gi
        <tr> <td rowspan="5" align="center"> @Rn   </td> <td align="center"> Rm    </td> <td align="center"> 2 </td> <td align="center"> 1 </td> </tr>
1116
        <tr>                                             <td align="center"> PC    </td> <td align="center"><b><font color="green">3 </font><font color="red"> (2)</font></b></td> <td align="center"> 1 </td> </tr>
1117
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1118
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1119 135 olivier.gi
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1120 50 olivier.gi
        <tr> <td rowspan="5" align="center"> @Rn+  </td> <td align="center"> Rm    </td> <td align="center"> 2 </td> <td align="center"> 1 </td> </tr>
1121
        <tr>                                             <td align="center"> PC    </td> <td align="center"> 3 </td> <td align="center"> 1 </td> </tr>
1122
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1123
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1124 135 olivier.gi
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1125 50 olivier.gi
        <tr> <td rowspan="5" align="center"> #N    </td> <td align="center"> Rm    </td> <td align="center"> 2 </td> <td align="center"> 2 </td> </tr>
1126
        <tr>                                             <td align="center"> PC    </td> <td align="center"> 3 </td> <td align="center"> 2 </td> </tr>
1127
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 5 </td> <td align="center"> 3 </td> </tr>
1128
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 5 </td> <td align="center"> 3 </td> </tr>
1129 135 olivier.gi
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 5 </td> <td align="center"> 3 </td> </tr>
1130 50 olivier.gi
        <tr> <td rowspan="5" align="center"> x(Rn) </td> <td align="center"> Rm    </td> <td align="center"> 3 </td> <td align="center"> 2 </td> </tr>
1131 224 olivier.gi
        <tr>                                             <td align="center"> PC    </td> <td align="center"><b><font color="green">4 </font><font color="red"> (3)</font></b></td> <td align="center"> 2 </td> </tr>
1132 50 olivier.gi
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1133
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1134 135 olivier.gi
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1135 50 olivier.gi
        <tr> <td rowspan="5" align="center"> EDE   </td> <td align="center"> Rm    </td> <td align="center"> 3 </td> <td align="center"> 2 </td> </tr>
1136 224 olivier.gi
        <tr>                                             <td align="center"> PC    </td> <td align="center"><b><font color="green">4 </font><font color="red"> (3)</font></b></td> <td align="center"> 2 </td> </tr>
1137 50 olivier.gi
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1138
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1139 135 olivier.gi
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1140
        <tr> <td rowspan="5" align="center"> &amp;EDE  </td> <td align="center"> Rm    </td> <td align="center"> 3 </td> <td align="center"> 2 </td> </tr>
1141 224 olivier.gi
        <tr>                                             <td align="center"> PC    </td> <td align="center"><b><font color="green">4 </font><font color="red"> (3)</font></b></td> <td align="center"> 2 </td> </tr>
1142 50 olivier.gi
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1143
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1144 135 olivier.gi
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1145
</tbody></table>
1146 50 olivier.gi
 
1147 195 olivier.gi
<a name="2.8 Serial Debug Interface"></a>
1148
<h2>2.8 Serial Debug Interface</h2>
1149 50 olivier.gi
 
1150 135 olivier.gi
All the details about the Serial Debug Interface are located <a href="http://opencores.org/project,openmsp430,serial%20debug%20interface">here</a>.<br>
1151
<br>
1152 166 olivier.gi
 
1153 195 olivier.gi
<a name="2.9 Benchmark results"></a>
1154
<h2>2.9 Benchmark results</h2>
1155 166 olivier.gi
 
1156 195 olivier.gi
<a name="2.9.1 Dhrystone"></a>
1157
<h3>2.9.1 Dhrystone (DMIPS/MHz)</h3>
1158 166 olivier.gi
Dhrystone is known for being susceptible to compiler optimizations (among other issues).<br>However,
1159
as it is still quite a popular metric, some results are provided here
1160
(ranging from 0.30 to 0.45 DMIPS/MHz depending on the compiler version
1161
and options).<br>
1162
Note that the used C-code is available in the repository <a href="http://opencores.org/websvn,listing?repname=openmsp430&amp;path=%2Fopenmsp430%2Ftrunk%2Fcore%2Fsim%2Frtl_sim%2Fsrc-c%2Fdhrystone_v2.1%2F#path_openmsp430_trunk_core_sim_rtl_sim_src-c_dhrystone_v2.1_">here</a> and <a href="http://opencores.org/websvn,listing?repname=openmsp430&amp;path=%2Fopenmsp430%2Ftrunk%2Fcore%2Fsim%2Frtl_sim%2Fsrc-c%2Fdhrystone_4mcu%2F#path_openmsp430_trunk_core_sim_rtl_sim_src-c_dhrystone_4mcu_">here</a>.<br>
1163
<br>
1164
 
1165
<table style="text-align: left; width: 40%;" border="1" cellpadding="2" cellspacing="2">
1166
  <tbody>
1167
    <tr>
1168
      <td style="text-align: center;" colspan="1" rowspan="2"><span style="font-weight: bold;">Dhrystone flavor</span></td>
1169 224 olivier.gi
      <td style="font-weight: bold; text-align: right;">Compiler options</td>
1170 166 olivier.gi
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-Os</td>
1171
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-O2</td>
1172
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-O3</td>
1173
    </tr>
1174
    <tr align="left">
1175
      <td style="font-weight: bold;">Compiler version
1176
      </td>
1177
    </tr>
1178
    <tr>
1179
      <td style="text-align: center;" colspan="1" rowspan="2">Dhrystone v2.1<br>
1180
                     (<a href="http://ftp.unicamp.br/pub/unix-c/benchmark/system/">common version</a>)</td>
1181
      <td style="text-align: left;">mspgcc v4.4.5</td>
1182
      <td style="text-align: center;">0.30</td>
1183
      <td style="text-align: center;">0.32</td>
1184
      <td style="text-align: center;">0.33</td>
1185
    </tr>
1186
    <tr>
1187
      <td style="text-align: left;">mspgcc v4.6.3</td>
1188
      <td style="text-align: center;">0.37</td>
1189
      <td style="text-align: center;">0.39</td>
1190
      <td style="text-align: center;">0.40</td>
1191
    </tr>
1192
    <tr>
1193
      <td style="text-align: center;" colspan="1" rowspan="2">Dhrystone v2.1<br>
1194
                     (<a href="http://www.ecrostech.com/Other/Resources/Dhrystone.htm">MCU adapted</a>)</td>
1195
      <td style="text-align: left;">mspgcc v4.4.5</td>
1196
      <td style="text-align: center;">0.30</td>
1197
      <td style="text-align: center;">0.30</td>
1198
      <td style="text-align: center;">0.31</td>
1199
    </tr>
1200
    <tr>
1201
      <td style="text-align: left;">mspgcc v4.6.3</td>
1202
      <td style="text-align: center;">0.37</td>
1203
      <td style="text-align: center;">0.44</td>
1204
      <td style="text-align: center;">0.45</td>
1205
    </tr>
1206
  </tbody>
1207
</table>
1208
 
1209 195 olivier.gi
<a name="2.9.2 CoreMark"></a>
1210
<h3>2.9.2 CoreMark (CoreMark/MHz)</h3>
1211 166 olivier.gi
CoreMark tries to address most of Dhrystone's pitfall by preventing the
1212
compiler to optimize some code away and using "real-life" algorithm.<br>
1213
Note that the used C-code is available in the repository <a href="http://opencores.org/websvn,listing?repname=openmsp430&amp;path=%2Fopenmsp430%2Ftrunk%2Fcore%2Fsim%2Frtl_sim%2Fsrc-c%2Fcoremark_v1.0%2F#path_openmsp430_trunk_core_sim_rtl_sim_src-c_coremark_v1.0_">here</a>.<br>
1214
<br>
1215
 
1216
<table style="text-align: left; width: 40%;" border="1" cellpadding="2" cellspacing="2">
1217
  <tbody>
1218
    <tr>
1219
      <td style="text-align: center;" colspan="1" rowspan="2"><br>
1220
</td>
1221
      <td style="font-weight: bold; text-align: right;">Compiler options</td>
1222
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-Os</td>
1223
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-O2</td>
1224
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-O3</td>
1225
    </tr>
1226
    <tr align="left">
1227
      <td style="font-weight: bold;">Compiler version</td>
1228
    </tr>
1229
    <tr>
1230
      <td style="text-align: center;" colspan="1" rowspan="2">CoreMark v1.0<br>
1231
                     (<a href="http://www.coremark.org/">official version</a>)</td>
1232
      <td style="text-align: left;">mspgcc v4.4.5</td>
1233
      <td style="text-align: center;">0.78</td>
1234
      <td style="text-align: center;">0.85</td>
1235
      <td style="text-align: center;">0.83</td>
1236
    </tr>
1237
    <tr>
1238
      <td style="text-align: left;">mspgcc v4.6.3</td>
1239
      <td style="text-align: center;">0.74</td>
1240
      <td style="text-align: center;">0.91</td>
1241
      <td style="text-align: center;">0.87</td>
1242
    </tr>
1243
  </tbody>
1244
</table>
1245 135 olivier.gi
<br><br>
1246 224 olivier.gi
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