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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
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<html><head><title>openMSP430 Core</title></head>
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<body>
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<h3>Table of content</h3>
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<ul>
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<li><a href="#1.%20Introduction">                                               1. Introduction</a></li>
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<li><a href="#2.%20Core">                                                       2. Core</a>
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        <ul>
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        <li><a href="#2.1%20Design%20structure">                                2.1 Design structure</a></li>
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        <li><a href="#2.2%20Limitations">                                       2.2 Limitations</a></li>
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        <li><a href="#2.3%20Configuration">                                     2.3 Configuration</a>
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                <ul>
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                <li><a href="#2.3.1%20Basic%20System%20Configuration">          2.3.1 Basic System Configuration</a></li>
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                <li><a href="#2.3.2%20Advanced%20System%20Configuration">       2.3.2 Advanced System Configuration</a></li>
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                <li><a href="#2.3.3%20Expert%20System%20Configuration">         2.3.3 Expert System Configuration</a></li>
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                <li><a href="#2.3.4%20Parameters%20For%20Multi-Core%20Systems"> 2.3.4 Parameters For Multi-Core Systems</a></li>
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                </ul>
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        </li>
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        <li><a href="#2.4%20Memory%20mapping">                                  2.4 Memory mapping</a></li>
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        <li><a href="#2.5%20Interrupt%20mapping">                               2.5 Interrupt mapping</a></li>
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        <li><a href="#2.6%20Pinout">                                            2.6 Pinout</a></li>
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        <li><a href="#2.7%20Instruction%20Cycles%20and%20Lengths">              2.7 Instruction Cycles and Lengths</a></li>
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        <li><a href="#2.8%20Serial%20Debug%20Interface">                        2.8 Serial Debug Interface</a></li>
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        <li><a href="#2.9%20Benchmark%20results">                               2.9 Benchmark results</a>
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                <ul>
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                <li><a href="#2.9.1%20Dhrystone">                               2.9.1 Dhrystone</a></li>
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                <li><a href="#2.9.2%20CoreMark">                                2.9.2 CoreMark</a></li>
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                </ul>
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        </li>
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        </ul>
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</li>
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</ul>
33 
 
34 
<a name="1. Introduction"></a>
35 
<h1>1. Introduction</h1>
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The openMSP430 is a 16-bit microcontroller core compatible with <b><a href="http://www.ti.com/litv/pdf/slau049f">TI's MSP430 family</a></b>
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(note that the extended version of the architecture, the MSP430X, isn't
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supported by this IP). It is based on a Von Neumann architecture, with
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a single address space for instructions and data.
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<br><br>Depending on the selected configuration, this design can either be:<br>
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<ul>
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  <ul>
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    <ul>
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      <li>&nbsp;<span style="font-weight: bold;">FPGA friendly</span>: the core doesn't contain any clock gate and has only a single clock
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domain. As a consequence, in this mode, the <span style="font-style: italic;">Basic Clock Module</span> peripheral has a few
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limitations.<br>
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        <br>
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      </li>
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      <li>&nbsp;<span style="font-weight: bold;">ASIC friendly</span>: the core contains up to all clock management
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options (clock muxes &amp; low-power modes, fine grained clock
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gating, ...) and is also ready for scan insertion. In this mode, the <span style="font-style: italic;">Basic Clock Module</span> offers all features listed in the official <a href="http://www.ti.com/litv/pdf/slau049f">documentation</a>.<br>
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      </li>
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    </ul>
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  </ul>
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</ul>
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<br>It is to be noted that this IP doesn't contain the instruction and
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data memory blocks internally (these are technology dependent hard
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macros which are connected to the IP during chip integration).
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However the core is fully configurable in regard to the supported RAM
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and/or ROM sizes.
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<br><br>
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<a name="2. Core"></a>
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<h1>2. Core</h1>
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<a name="2.1 Design structure"></a>
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<h2>2.1 Design structure</h2>
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The following diagram shows the openMSP430 design structure:
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<br><br>
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<img src="http://opencores.org/usercontent,img,1354053264" alt="CPU Structure" title="CPU Structure" width="80%">
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<br>
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<ul>
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        <li><b>Frontend</b>: This module performs the instruction Fetch and Decode tasks. It also contains the execution state machine.</li>
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        <li><b>Execution unit</b>:
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Containing the ALU and the register file, this module executes the
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current decoded instruction according to the execution state.</li>
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        <li><b>Serial Debug Interface</b>:
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Contains all the required logic for a Nexus class 3 debugging unit
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(without trace). Communication with the host is performed with a standard
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two-wire interface following either the UART 8N1 or I<sup>2</sup>C serial protocol.</li>
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   <li><b>Memory backbone</b>: This block
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performs a simple arbitration between the frontend and execution-unit
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for program, data and peripheral memory access.</li>
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   <li><b>Basic Clock Module</b>: Generates MCLK, ACLK, SMCLK and manage the low power modes.</li>
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   <li><b>SFRs</b>: The <b>S</b>pecial <b>F</b>unction <b>R</b>egister<b>s</b> block contain diverse configuration registers (NMI, Watchdog, ...).</li>
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   <li><b>Watchdog</b>:
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Although it is a peripheral, the watchdog is directly included in
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the core because of its tight links with the NMI interrupts and PUC
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reset generation.</li>
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   <li><b>16x16 Multiplier</b>: The hardware
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multiplier peripheral is transparently supported by the GCC compiler
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and is therefore located in the core. It can be included or excluded at will
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through a Verilog define.</li>
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</ul>
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<a name="2.2 Limitations"></a>
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<h2>2.2 Limitations</h2>
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102 
The known core limitations are the following:
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<br>
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<ul>
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        <li>Instructions can't be executed from the data memory.</li>
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        </ul>
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<a name="2.3 Configuration"></a>
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<h2>2.3 Configuration</h2>
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It is possible to configure the openMSP430 core through the <b><i>openMSP430_defines.v</i></b> file located in the <b><i>rtl</i></b> directory (see <a href="http://www.opencores.org/project,openmsp430,file%20and%20directory%20description">file and directory description</a>).<br>In
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this section, three sets of adjustabe user parameters are discussed in
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order to customize the core. A fourth set is available for ASIC
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specific options and will be discussed in the <a href="http://opencores.org/project,openmsp430,asic%20implementation">ASIC implementation</a>
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section.
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<a name="2.3.1 Basic System Configuration"></a>
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<h3>2.3.1 Basic System Configuration</h3>
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The basic system can be adjusted with the following set of defines in order to match the target system requirements.
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<br><br>
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<table border="0" cellpadding="0" cellspacing="4">
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<tbody><tr>
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<td width="35"><br>
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</td>
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<td bgcolor="#d0d0d0" width="3"><br>
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</td>
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<td width="15"><br>
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</td>
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<td>
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        <code>
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             //============================================================================<br>
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//============================================================================<br>
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// BASIC SYSTEM CONFIGURATION<br>
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//============================================================================<br>
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//============================================================================<br>
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//<br>
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// Note: the sum of program, data and peripheral memory spaces must not<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; exceed 64 kB<br>
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//<br>
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      <br>
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// Program Memory Size:<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
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Uncomment the required memory size<br>
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//-------------------------------------------------------<br>
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//`define PMEM_SIZE_CUSTOM<br>
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//`define PMEM_SIZE_59_KB<br>
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//`define PMEM_SIZE_55_KB<br>
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//`define PMEM_SIZE_54_KB<br>
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//`define PMEM_SIZE_51_KB<br>
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//`define PMEM_SIZE_48_KB<br>
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//`define PMEM_SIZE_41_KB<br>
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//`define PMEM_SIZE_32_KB<br>
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//`define PMEM_SIZE_24_KB<br>
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//`define PMEM_SIZE_16_KB<br>
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//`define PMEM_SIZE_12_KB<br>
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//`define PMEM_SIZE_8_KB<br>
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//`define PMEM_SIZE_4_KB<br>
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`define PMEM_SIZE_2_KB<br>
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//`define PMEM_SIZE_1_KB<br>
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      <br>
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      <br>
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// Data Memory Size:<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
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Uncomment the required memory size<br>
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//-------------------------------------------------------<br>
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//`define DMEM_SIZE_CUSTOM<br>
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//`define DMEM_SIZE_32_KB<br>
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//`define DMEM_SIZE_24_KB<br>
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//`define DMEM_SIZE_16_KB<br>
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//`define DMEM_SIZE_10_KB<br>
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//`define DMEM_SIZE_8_KB<br>
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//`define DMEM_SIZE_5_KB<br>
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//`define DMEM_SIZE_4_KB<br>
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//`define DMEM_SIZE_2p5_KB<br>
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//`define DMEM_SIZE_2_KB<br>
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//`define DMEM_SIZE_1_KB<br>
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//`define DMEM_SIZE_512_B<br>
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//`define DMEM_SIZE_256_B<br>
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`define DMEM_SIZE_128_B<br>
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      <br>
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      <br>
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// Include/Exclude Hardware Multiplier<br>
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`define MULTIPLIER<br>
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      <br>
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      <br>
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// Include/Exclude Serial Debug interface<br>
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`define DBG_EN<br>
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      </code></td></tr></tbody></table><br><br>
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The only design considerations at this stage are:
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<ul>
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        <li>Make sure that the program and data memories have the correct size :-P</li>
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        <li>The sum of program, data and peripheral memory space <b>MUST NOT</b> exceed 64 kB</li>
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</ul>
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<br>
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<b><u>Note:</u></b> when selected, full custom memory sizes can be specified in the "Expert System Configuration" section.
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<br>
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<br>
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<a name="2.3.2 Advanced System Configuration"></a>
201 
<h3>2.3.2 Advanced System Configuration</h3>
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203 
In this section, some additional features are available in order to match the needs of more experienced users.
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<br><br>
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<table border="0" cellpadding="0" cellspacing="4">
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<tbody><tr>
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<td width="35"><br>
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</td>
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<td bgcolor="#d0d0d0" width="3"><br>
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</td>
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<td width="15"><br>
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</td>
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<td><code>//============================================================================<br>
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//============================================================================<br>
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// ADVANCED SYSTEM CONFIGURATION (FOR EXPERIENCED USERS)<br>
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//============================================================================<br>
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//============================================================================<br>
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      <br>
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//-------------------------------------------------------<br>
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// Custom user version number<br>
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//-------------------------------------------------------<br>
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// This 5 bit field can be freely used in order to allow<br>
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// custom identification of the system through the debug<br>
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// interface.<br>
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// (see CPU_ID.USER_VERSION field in the documentation)<br>
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//-------------------------------------------------------<br>
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`define USER_VERSION 5'b00000<br>
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      <br>
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      <br>
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//-------------------------------------------------------<br>
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// Include/Exclude Watchdog timer<br>
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//-------------------------------------------------------<br>
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// When excluded, the following functionality will be<br>
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// lost:<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - Watchog (both interval and watchdog modes)<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - NMI interrupt edge selection<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - Possibility to generate a software PUC reset<br>
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//-------------------------------------------------------<br>
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`define WATCHDOG<br>
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      <br>
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      <br>
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///-------------------------------------------------------<br>
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// Include/Exclude Non-Maskable-Interrupt support<br>
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//--------------------------------------------------------<br>
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`define NMI<br>
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      <br>
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      <br>
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//-------------------------------------------------------<br>
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// Number of available IRQs<br>
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//-------------------------------------------------------<br>
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// Indicates the number of interrupt vectors supported<br>
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// (16, 32 or 64).<br>
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//-------------------------------------------------------<br>
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`define IRQ_16<br>
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//`define IRQ_32<br>
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//`define IRQ_64<br>
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      <br>
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      <br>
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//-------------------------------------------------------<br>
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// Input synchronizers<br>
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//-------------------------------------------------------<br>
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// In some cases, the asynchronous input ports might<br>
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// already be synchronized externally.<br>
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// If an extensive CDC design review showed that this<br>
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// is really the case,&nbsp; the individual synchronizers<br>
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// can be disabled with the following defines.<br>
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//<br>
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// Notes:<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - all three signals are all sampled in the MCLK domain<br>
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//<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - the dbg_en signal reset the debug interface<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; when 0. Therefore make sure it is glitch free.<br>
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//<br>
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//-------------------------------------------------------<br>
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`define SYNC_NMI<br>
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//`define SYNC_CPU_EN<br>
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//`define SYNC_DBG_EN<br>
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</code><code><br>
279 
      <br>
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</code><code>//-------------------------------------------------------<br>
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// Peripheral Memory Space:<br>
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//-------------------------------------------------------<br>
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// The original MSP430 architecture map the peripherals<br>
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// from 0x0000 to 0x01FF (i.e. 512B of the memory space).<br>
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// The following defines allow you to expand this space<br>
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// up to 32 kB (i.e. from 0x0000 to 0x7fff).<br>
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// As a consequence, the data memory mapping will be<br>
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// shifted up and a custom linker script will therefore<br>
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// be required by the GCC compiler.<br>
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//-------------------------------------------------------<br>
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//`define PER_SIZE_CUSTOM<br>
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//`define PER_SIZE_32_KB<br>
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//`define PER_SIZE_16_KB<br>
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//`define PER_SIZE_8_KB<br>
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//`define PER_SIZE_4_KB<br>
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//`define PER_SIZE_2_KB<br>
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//`define PER_SIZE_1_KB<br>
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`define PER_SIZE_512_B<br>
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      <br>
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      <br></code><code>//-------------------------------------------------------<br>
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// Defines the debugger CPU_CTL.RST_BRK_EN reset value<br>
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// (CPU break on PUC reset)<br>
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//-------------------------------------------------------<br>
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// When defined, the CPU will automatically break after<br>
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// a PUC occurrence by default. This is typically useful<br>
306 
// when the program memory can only be initialized through<br>
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// the serial debug interface.<br>
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//-------------------------------------------------------<br>
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`define DBG_RST_BRK_EN</code><br>
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</td></tr></tbody></table><br><br>
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Design consideration at this stage are:
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<ul>
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        <li>Setting a peripheral memory space to something else than 512B
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will shift the data memory mapping up, which in turn will require the
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use of a custom linker script. If you don't know what a linker script
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is and if you don't want to know what it is, you should probably not
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modify this section.</li>
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        <li>The sum of program, data and peripheral memory space <b>MUST NOT</b> exceed 64 kB</li>
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</ul>
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<br>
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<b><u>Note:</u></b> when selected, full custom peripheral memory space can be specified in the "Expert System Configuration" section.
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<br>
323 
<br>
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325 
<a name="2.3.3 Expert System Configuration"></a>
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<h3>2.3.3 Expert System Configuration</h3>
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In this section, you will find configuration options which are
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relevant for roughly 0.1% of the users (according to a highly
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reliable market analysis ;-) ).
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<br><br>
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<table border="0" cellpadding="0" cellspacing="4">
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<tbody><tr>
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<td width="35"><br>
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</td>
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<td bgcolor="#d0d0d0" width="3"><br>
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</td>
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<td width="15"><br>
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</td>
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<td>
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        <code> //============================================================================<br>
342 
//============================================================================<br>
343 
// EXPERT SYSTEM CONFIGURATION ( !!!! EXPERTS ONLY !!!! )<br>
344 
//============================================================================<br>
345 
//============================================================================<br>
346 
//<br>
347 
// IMPORTANT NOTE:&nbsp; Please update following configuration options ONLY if<br>
348 
//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
349 
you have a good reason to do so... and if you know what<br>
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//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; you are doing :-P<br>
351 
//<br>
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//============================================================================<br>
353 
      <br>
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//-------------------------------------------------------<br>
355 
// Select serial debug interface protocol<br>
356 
//-------------------------------------------------------<br>
357 
//&nbsp;&nbsp;&nbsp; DBG_UART -&gt; Enable UART (8N1) debug interface<br>
358 
//&nbsp;&nbsp;&nbsp; DBG_I2C&nbsp; -&gt; Enable I2C debug interface<br>
359 
//-------------------------------------------------------<br>
360 
`define DBG_UART<br>
361 
//`define DBG_I2C<br>
362 
      <br>
363 
      <br>
364 
//-------------------------------------------------------<br>
365 
// Enable the I2C broadcast address<br>
366 
//-------------------------------------------------------<br>
367 
// For multicore systems, a common I2C broadcast address<br>
368 
// can be given to all oMSP cores in order to<br>
369 
// synchronously RESET, START, STOP, or STEP all CPUs<br>
370 
// at once with a single I2C command.<br>
371 
// If you have a single openMSP430 in your system,<br>
372 
// this option can stay commented-out.<br>
373 
//-------------------------------------------------------<br>
374 
//`define DBG_I2C_BROADCAST<br>
375 
      <br>
376 
<br>
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//-------------------------------------------------------<br>// Number of hardware breakpoint/watchpoint units<br>
378 
// (each unit contains two hardware addresses available<br>
379 
// for breakpoints or watchpoints):<br>
380 
//&nbsp;&nbsp; - DBG_HWBRK_0 -&gt; Include hardware breakpoints unit 0<br>
381 
//&nbsp;&nbsp; - DBG_HWBRK_1 -&gt; Include hardware breakpoints unit 1<br>
382 
//&nbsp;&nbsp; - DBG_HWBRK_2 -&gt; Include hardware breakpoints unit 2<br>
383 
//&nbsp;&nbsp; - DBG_HWBRK_3 -&gt; Include hardware breakpoints unit 3<br>
384 
//-------------------------------------------------------<br>
385 
// Please keep in mind that hardware breakpoints only<br>
386 
// make sense whenever the program memory is not an SRAM<br>
387 
// (i.e. Flash/OTP/ROM/...) or when you are interested<br>
388 
// in data breakpoints.<br>
389 
//-------------------------------------------------------<br>
390 
//`define&nbsp; DBG_HWBRK_0<br>
391 
//`define&nbsp; DBG_HWBRK_1<br>
392 
//`define&nbsp; DBG_HWBRK_2<br>
393 
//`define&nbsp; DBG_HWBRK_3<br>
394 
      <br>
395 
      <br>
396 
//-------------------------------------------------------<br>
397 
// Enable/Disable the hardware breakpoint RANGE mode<br>
398 
//-------------------------------------------------------<br>
399 
// When enabled this feature allows the hardware breakpoint<br>
400 
// units to stop the cpu whenever an instruction or data<br>
401 
// access lays within an address range.<br>
402 
// Note that this feature is not supported by GDB.<br>
403 
//-------------------------------------------------------<br>
404 
//`define DBG_HWBRK_RANGE<br>
405 
      <br>
406 
      <br>
407 
//-------------------------------------------------------<br>
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// Custom Program/Data and Peripheral Memory Spaces<br>
409 
//-------------------------------------------------------<br>
410 
// The following values are valid only if the<br>
411 
// corresponding *_SIZE_CUSTOM defines are uncommented:<br>
412 
//<br>
413 
//  - *_SIZE   : size of the section in bytes.<br>
414 
//  - *_AWIDTH : address port width, this value must allow<br>
415 
//               to address all WORDS of the section<br>
416 
//               (i.e. the *_SIZE divided by 2)<br>
417 
//-------------------------------------------------------<br>
418 
<br>
419 
// Custom Program memory (enabled with PMEM_SIZE_CUSTOM)<br>
420 
`define PMEM_CUSTOM_AWIDTH      10<br>
421 
`define PMEM_CUSTOM_SIZE      2048<br>
422 
<br>
423 
// Custom Data memory    (enabled with DMEM_SIZE_CUSTOM)<br>
424 
`define DMEM_CUSTOM_AWIDTH       6<br>
425 
`define DMEM_CUSTOM_SIZE       128<br>
426 
<br>
427 
// Custom Peripheral memory  (enabled with PER_SIZE_CUSTOM)<br>
428 
`define PER_CUSTOM_AWIDTH        8<br>
429 
`define PER_CUSTOM_SIZE        512<br>
430 
<br>
431 
<br>
432 
//-------------------------------------------------------<br>
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// ASIC version<br>
434 
//-------------------------------------------------------<br>
435 
// When uncommented, this define will enable the<br>
436 
// ASIC system configuration section (see below) and<br>
437 
// will activate scan support for production test.<br>
438 
//<br>
439 
// WARNING: if you target an FPGA, leave this define<br>
440 
//&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; commented.<br>
441 
//-------------------------------------------------------<br>
442 
//`define ASIC<br></code></td></tr></tbody></table><br><br>
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Design consideration at this stage are:
444 
<ul>
445 195 olivier.gi 
        <li>This is the expert section... so you know what your are doing anyway, right ;-)</li>
446 116 olivier.gi 
</ul>
447 135 olivier.gi 
<br>
448 
All remaining defines located after the ASIC section in the <b><i>openMSP430_defines.v</i></b> file are system constants and <b>MUST NOT</b> be edited.
449 166 olivier.gi 
<br>
450 
<br>
451 
 
452 195 olivier.gi 
<a name="2.3.4 Parameters For Multi-Core Systems"></a>
453 
<h3>2.3.4 Parameters For Multi-Core Systems</h3>
454 
 
455 166 olivier.gi 
In addition to the define file, two Verilog parameters are available to facilitate software development on multi-core systems.<br>
456 
For example, in a dual-core openMSP430 system, the cores can be instantiated as following:
457 
<br>
458 
<br>
459 
<table border="0" cellpadding="0" cellspacing="4">
460 
<tbody><tr>
461 
<td width="35"><br></td>
462 
<td bgcolor="#d0d0d0" width="3"><br></td>
463 
<td width="15"><br></td>
464 
<td>
465 
        <code>
466 
                          openMSP430 #(.INST_NR (<strong>0</strong>), .TOTAL_NR(<strong>1</strong>)) openMSP430_core_0 (
467 
                      <br>...
468 
                      <br>);
469 
                      <br>
470 
                      <br>openMSP430 #(.INST_NR (<strong>1</strong>), .TOTAL_NR(<strong>1</strong>)) openMSP430_core_1 (
471 
                      <br>...
472 
                      <br>);
473 
        </code>
474 
</td>
475 
</tr>
476 
</tbody>
477 
</table>
478 
<br>
479 
The values of these parameters are then directly accessible through the CPU_NR register of the SFR peripheral.<br>
480 
For example, if both cores share the same program memory, the software can take advantage of this information as following:
481 135 olivier.gi 
<br><br>
482 166 olivier.gi 
<table border="0" cellpadding="0" cellspacing="4">
483 
<tbody><tr>
484 
<td width="35"><br></td>
485 
<td bgcolor="#d0d0d0" width="3"><br></td>
486 
<td width="15"><br></td>
487 
<td>
488 
        <code>
489 
                           "...
490 
                      <br>int main(void) {
491 
                      <br>&nbsp;&nbsp;if (CPU_NR==<strong>0x0100</strong>) {
492 
                      <br>&nbsp;&nbsp;&nbsp;&nbsp;main_core_0();&nbsp;// Main routine call for core 0
493 
                      <br>&nbsp;&nbsp;}
494 
                      <br>&nbsp;&nbsp;if (CPU_NR==<strong>0x0101</strong>) {
495 
                      <br>&nbsp;&nbsp;&nbsp;&nbsp;main_core_1();&nbsp;// Main routine call for core 1
496 
                      <br>&nbsp;&nbsp;}
497 
                      <br>}
498 
                      <br>..."
499 
        </code>
500 
</td>
501 
</tr>
502 
</tbody>
503 
</table>
504 
<br><br>
505 50 olivier.gi 
 
506 195 olivier.gi 
<a name="2.4 Memory mapping"></a>
507 
<h2>2.4 Memory mapping</h2>
508 50 olivier.gi 
 
509 135 olivier.gi 
As discussed earlier, the openMSP430 memory mapping is fully configurable.<br>The
510 
basic system configuration section allows to adjust program and data
511 
memory sizes while keeping 100% compatibility with the pre-existing
512 
linker scripts provided by MSPGCC (or any other toolchain for that
513 
matter).<br>
514 
However, an increasing number of users saw the 512B space available for
515 
peripherals in the standard MSP430 architecture as a limitation.
516 
Therefore, the advanced system configuration section gives the
517 
possibility to up-scale the reserved peripheral address space anywhere
518 
between 512B and 32kB. As a consequence, the data memory space will be
519 
shifted up, which means that the linker script of your favorite
520 
toolchain will have to be modified accordingly.<br>
521 
The following schematic should hopefully illustrate this:<br>
522 
<br><br>
523 
<img src="usercontent,img,1306066277" alt="Memory mapping" title="Memory mapping" width="80%">
524 
<br>
525 195 olivier.gi 
<br><br>
526 116 olivier.gi 
 
527 195 olivier.gi 
<a name="2.5 Interrupt mapping"></a>
528 
<h2>2.5 Interrupt mapping</h2>
529 
 
530 
The number of supported interrupts is configurable with the IRQ_xx macros.
531 
The interrupt vectors are then mapped as following:
532 135 olivier.gi 
<br><br>
533 195 olivier.gi 
<img src="http://opencores.org/usercontent,img,1387146236" alt="Interrupt mapping" title="Interrupt mapping" width="70%">
534 116 olivier.gi 
 
535 195 olivier.gi 
<br><br>
536 
<a name="2.6 Pinout"></a>
537 
<h2>2.6 Pinout</h2>
538 
 
539 50 olivier.gi 
The full pinout of the openMSP430 core is provided in the following table:
540 135 olivier.gi 
<br><br>
541 50 olivier.gi 
<table border="1">
542 135 olivier.gi 
        <tbody><tr> <td align="center"><b>Port Name</b></td> <td align="center"><b>Direction</b></td> <td align="center"><b>Width</b>    </td> <td style="vertical-align: top; text-align: center;"><span style="font-weight: bold;">Clock</span><br style="font-weight: bold;">
543 
      <span style="font-weight: bold;">Domain</span><br>
544 
      </td>
545 
<td align="center"><b>Description</b></td> </tr>
546 50 olivier.gi 
 
547 135 olivier.gi 
        <tr> <td colspan="5" align="center"> <b><i>Clocks &amp; Power-Managment</i></b>                         </td></tr>
548 50 olivier.gi 
        <tr>
549 116 olivier.gi 
             <td> cpu_en                                                           </td>
550 
             <td> Input                                                            </td>
551 
             <td> 1                                                                </td>
552 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
553 
or mclk<b><sup><font color="#ff0000">4</font></sup></b></td>
554 
<td> Enable CPU code execution (asynchronous and non-glitchy).<br>
555 
 Set to 1 if unused.    </td>
556 116 olivier.gi 
        </tr>
557 
        <tr>
558 50 olivier.gi 
             <td> dco_clk                                                          </td>
559 
             <td> Input                                                            </td>
560 
             <td> 1                                                                </td>
561 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">-<br>
562 
      </td>
563 
<td> Fast oscillator (fast clock)                          </td>
564 50 olivier.gi 
        </tr>
565 
        <tr>
566 135 olivier.gi 
      <td style="vertical-align: top;"> lfxt_clk</td>
567 
      <td style="vertical-align: top;">Input<br>
568 
      </td>
569 
      <td style="vertical-align: top;">1<br>
570 
      </td>
571 
      <td style="vertical-align: top; text-align: center;">-<br>
572 
      </td>
573 
<td style="vertical-align: top;"> Low frequency oscillator (typ. 32kHz)<br>
574 
Set to 0 if unused.<br>
575 
      </td>
576 
    </tr>
577 
    <tr>
578 
      <td style="vertical-align: top;"> mclk</td>
579 
      <td style="vertical-align: top;">Output<br>
580 
      </td>
581 
      <td style="vertical-align: top;">1<br>
582 
      </td>
583 
      <td style="vertical-align: top; text-align: center;">-<br>
584 
      </td>
585 
<td style="vertical-align: top;"> Main system clock</td>
586 
    </tr>
587 
    <tr>
588 
      <td style="vertical-align: top;"> aclk_en</td>
589 
      <td style="vertical-align: top;">Output</td>
590 
      <td style="vertical-align: top;">1<br>
591 
      </td>
592 
      <td style="vertical-align: top; text-align: center;">mclk<br>
593 
      </td>
594 
<td style="vertical-align: top;">FPGA ONLY: ACLK enable</td>
595 
    </tr>
596 
    <tr>
597 
      <td style="vertical-align: top;">smclk_en</td>
598 
      <td style="vertical-align: top;">Output</td>
599 
      <td style="vertical-align: top;">1<br>
600 
      </td>
601 
      <td style="vertical-align: top; text-align: center;">mclk<br>
602 
      </td>
603 
<td style="vertical-align: top;">FPGA ONLY: SMCLK enable</td>
604 
    </tr>
605 
    <tr>
606 
      <td style="vertical-align: top;">dco_enable<br>
607 
      </td>
608 
      <td style="vertical-align: top;">Output<br>
609 
      </td>
610 
      <td style="vertical-align: top;">1<br>
611 
      </td>
612 
      <td style="vertical-align: top; text-align: center;">dco_clk<br>
613 
      </td>
614 
<td style="vertical-align: top;">ASIC ONLY: Fast oscillator enable<br>
615 
      </td>
616 
    </tr>
617 
    <tr>
618 
      <td style="vertical-align: top;">dco_wkup<br>
619 
      </td>
620 
      <td style="vertical-align: top;">Output<br>
621 
      </td>
622 
      <td style="vertical-align: top;">1<br>
623 
      </td>
624 
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
625 
      </td>
626 
<td style="vertical-align: top;">ASIC ONLY: Fast oscillator wakeup (asynchronous)<br>
627 
      </td>
628 
    </tr>
629 
 
630 50 olivier.gi 
        <tr>
631 135 olivier.gi 
      <td style="vertical-align: top;">lfxt_enable<br>
632 
      </td>
633 
      <td style="vertical-align: top;">Output<br>
634 
      </td>
635 
      <td style="vertical-align: top;">1<br>
636 
      </td>
637 
      <td style="vertical-align: top; text-align: center;">lfxt_clk<br>
638 
      </td>
639 
<td style="vertical-align: top;">ASIC ONLY: Low frequency oscillator enable<br>
640 
      </td>
641 
    </tr>
642 
    <tr>
643 
      <td style="vertical-align: top;">lfxt_wkup<br>
644 
      </td>
645 
      <td style="vertical-align: top;">Output<br>
646 
      </td>
647 
      <td style="vertical-align: top;">1<br>
648 
      </td>
649 
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
650 
      </td>
651 
<td style="vertical-align: top;">ASIC ONLY: Low frequency oscillator wakeup (asynchronous)<br>
652 
      </td>
653 
    </tr>
654 
 
655 50 olivier.gi 
        <tr>
656 135 olivier.gi 
      <td style="vertical-align: top;">aclk<br>
657 
      </td>
658 
      <td style="vertical-align: top;">Output<br>
659 
      </td>
660 
      <td style="vertical-align: top;">1<br>
661 
      </td>
662 
      <td style="vertical-align: top; text-align: center;">-<br>
663 
      </td>
664 
<td style="vertical-align: top;">ASIC ONLY: ACLK<br>
665 
      </td>
666 
    </tr>
667 
 
668 50 olivier.gi 
        <tr>
669 135 olivier.gi 
      <td style="vertical-align: top;">smclk<br>
670 
      </td>
671 
      <td style="vertical-align: top;">Output<br>
672 
      </td>
673 
      <td style="vertical-align: top;">1<br>
674 
      </td>
675 
      <td style="vertical-align: top; text-align: center;">-<br>
676 
      </td>
677 
<td style="vertical-align: top;">ASIC ONLY: SMCLK<br>
678 
      </td>
679 
    </tr>
680 50 olivier.gi 
 
681 135 olivier.gi 
 
682 50 olivier.gi 
        <tr>
683 135 olivier.gi 
      <td style="vertical-align: top;">wkup<br>
684 
      </td>
685 
      <td style="vertical-align: top;">Input<br>
686 
      </td>
687 
      <td style="vertical-align: top;">1<br>
688 
      </td>
689 
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
690 
      </td>
691 
<td style="vertical-align: top;">ASIC ONLY: System Wake-up (asynchronous and non-glitchy)<br>
692 
Set to 0 if unused.<br>
693 
      </td>
694 
    </tr>
695 
<tr> <td colspan="5" align="center"> <b><i>Resets</i></b>                         </td></tr>
696 
        <tr>
697 116 olivier.gi 
             <td> puc_rst                                                          </td>
698 50 olivier.gi 
             <td> Output                                                           </td>
699 
             <td> 1                                                                </td>
700 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
701 
      </td>
702 
<td> Main system reset                                                </td>
703 50 olivier.gi 
   </tr>
704 
        <tr>
705 
             <td> reset_n                                                          </td>
706 
             <td> Input                                                            </td>
707 
             <td> 1                                                                </td>
708 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
709 
      </td>
710 
<td> Reset Pin (active low, asynchronous and non-glitchy)                             </td>
711 50 olivier.gi 
        </tr>
712 
 
713 
 
714 135 olivier.gi 
        <tr> <td colspan="5" align="center"> <b><i>Program Memory interface</i></b>       </td></tr>
715 50 olivier.gi 
        <tr>
716 
             <td> pmem_addr                                                        </td>
717 
             <td> Output                                                           </td>
718 135 olivier.gi 
             <td><small> `PMEM_AWIDTH</small> <b><sup><font color="#ff0000">1</font></sup></b> </td>
719 
             <td style="vertical-align: top; text-align: center;">mclk<br>
720 
      </td>
721 
<td> Program Memory address                                           </td>
722 50 olivier.gi 
        </tr>
723 
        <tr>
724 
             <td> pmem_cen                                                         </td>
725 
             <td> Output                                                           </td>
726 
             <td> 1                                                                </td>
727 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
728 
      </td>
729 
<td> Program Memory chip enable (low active)                          </td>
730 50 olivier.gi 
        </tr>
731 
        <tr>
732 
             <td> pmem_din                                                         </td>
733 
             <td> Output                                                           </td>
734 
             <td> 16                                                               </td>
735 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
736 
      </td>
737 
<td> Program Memory data input (optional <b><sup><font color="#ff0000">2</font></sup></b>)</td>
738 50 olivier.gi 
        </tr>
739 
        <tr>
740 
             <td> pmem_dout                                                        </td>
741 
             <td> Input                                                            </td>
742 
             <td> 16                                                               </td>
743 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
744 
      </td>
745 
<td> Program Memory data output                                       </td>
746 50 olivier.gi 
        </tr>
747 
        <tr>
748 
             <td> pmem_wen                                                         </td>
749 
             <td> Output                                                           </td>
750 
             <td> 2                                                                </td>
751 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
752 
      </td>
753 
<td> Program Memory write byte enable (low active) (optional <b><sup><font color="#ff0000">2</font></sup></b>) </td>
754 50 olivier.gi 
        </tr>
755 
 
756 135 olivier.gi 
        <tr> <td colspan="5" align="center"> <b><i>Data Memory interface</i></b>          </td></tr>
757 50 olivier.gi 
        <tr>
758 
             <td> dmem_addr                                                        </td>
759 
             <td> Output                                                           </td>
760 135 olivier.gi 
             <td><small> `DMEM_AWIDTH</small> <b><sup><font color="#ff0000">1</font></sup></b></td>
761 
             <td style="vertical-align: top; text-align: center;">mclk<br>
762 
      </td>
763 
<td> Data Memory address                                              </td>
764 50 olivier.gi 
        </tr>
765 
        <tr>
766 
             <td> dmem_cen                                                         </td>
767 
             <td> Output                                                           </td>
768 
             <td> 1                                                                </td>
769 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
770 
      </td>
771 
<td> Data Memory chip enable (low active)                             </td>
772 50 olivier.gi 
        </tr>
773 
        <tr>
774 
             <td> dmem_din                                                         </td>
775 
             <td> Output                                                           </td>
776 
             <td> 16                                                               </td>
777 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
778 
      </td>
779 
<td> Data Memory data input                                           </td>
780 50 olivier.gi 
        </tr>
781 
        <tr>
782 
             <td> dmem_dout                                                        </td>
783 
             <td> Input                                                            </td>
784 
             <td> 16                                                               </td>
785 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
786 
      </td>
787 
<td> Data Memory data output                                          </td>
788 50 olivier.gi 
        </tr>
789 
        <tr>
790 
             <td> dmem_wen                                                         </td>
791 
             <td> Output                                                           </td>
792 
             <td> 2                                                                </td>
793 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
794 
      </td>
795 
<td> Data Memory write byte enable (low active)                       </td>
796 50 olivier.gi 
        </tr>
797 
 
798 135 olivier.gi 
        <tr> <td colspan="5" align="center"> <b><i>External Peripherals interface</i></b> </td></tr>
799 50 olivier.gi 
        <tr>
800 
             <td> per_addr                                                         </td>
801 
             <td> Output                                                           </td>
802 116 olivier.gi 
             <td> 14                                                                </td>
803 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
804 
      </td>
805 
<td> Peripheral address                                               </td>
806 50 olivier.gi 
        </tr>
807 
        <tr>
808 
             <td> per_din                                                          </td>
809 
             <td> Output                                                           </td>
810 
             <td> 16                                                               </td>
811 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
812 
      </td>
813 
<td> Peripheral data input                                            </td>
814 50 olivier.gi 
   </tr>
815 
        <tr>
816 
             <td> per_dout                                                         </td>
817 
             <td> Input                                                            </td>
818 
             <td> 16                                                               </td>
819 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
820 
      </td>
821 
<td> Peripheral data output                                           </td>
822 50 olivier.gi 
        </tr>
823 
        <tr>
824 
             <td> per_en                                                           </td>
825 
             <td> Output                                                           </td>
826 
             <td> 1                                                                </td>
827 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
828 
      </td>
829 
<td> Peripheral enable (high active)                                  </td>
830 50 olivier.gi 
        </tr>
831 
        <tr>
832 116 olivier.gi 
             <td> per_we                                                           </td>
833 50 olivier.gi 
             <td> Output                                                           </td>
834 
             <td> 2                                                                </td>
835 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
836 
      </td>
837 
<td> Peripheral write enable (high active)                            </td>
838 50 olivier.gi 
        </tr>
839 
 
840 135 olivier.gi 
        <tr> <td colspan="5" align="center"> <b><i>Interrupts</i></b>                     </td></tr>
841 50 olivier.gi 
        <tr>
842 
                  <td> irq                                                              </td>
843 
                  <td> Input                                                            </td>
844 195 olivier.gi 
                  <td> `IRQ_NR-2<b><sup><font color="#ff0000">1</font></sup></b>        </td>
845 135 olivier.gi 
                  <td style="vertical-align: top; text-align: center;">mclk<br>
846 
      </td>
847 
<td> Maskable interrupts (one-hot signal)                             </td>
848 50 olivier.gi 
   </tr>
849 
        <tr>
850 
             <td> nmi                                                              </td>
851 
             <td> Input                                                            </td>
852 
             <td> 1                                                                </td>
853 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
854 
or mclk<b><sup><font color="#ff0000">4</font></sup></b></td>
855 
<td> Non-maskable interrupt (asynchronous and non-glitchy)<br>
856 
Set to 0 if unused.<br>
857 
                            </td>
858 50 olivier.gi 
        </tr>
859 
        <tr>
860 
             <td> irq_acc                                                          </td>
861 
             <td> Output                                                           </td>
862 195 olivier.gi 
             <td> `IRQ_NR-2<b><sup><font color="#ff0000">1</font></sup></b>        </td>
863 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
864 
      </td>
865 
<td> Interrupt request accepted (one-hot signal)                      </td>
866 50 olivier.gi 
        </tr>
867 
 
868 135 olivier.gi 
        <tr> <td colspan="5" align="center"> <b><i>Serial Debug interface</i></b>         </td></tr>
869 50 olivier.gi 
        <tr>
870 116 olivier.gi 
             <td> dbg_en                                                           </td>
871 
             <td> Input                                                            </td>
872 
             <td> 1                                                                </td>
873 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
874 
 
875 
or mclk<b><sup><font color="#ff0000">4</font></sup></b></td>
876 
<td> Debug interface enable (asynchronous) <b><sup><font color="#ff0000">3</font></sup></b> </td>
877 116 olivier.gi 
        </tr>
878 
        <tr>
879 50 olivier.gi 
             <td> dbg_freeze                                                       </td>
880 
             <td> Output                                                           </td>
881 
             <td> 1                                                                </td>
882 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
883 
      </td>
884 
<td> Freeze peripherals                                               </td>
885 50 olivier.gi 
        </tr>
886 
        <tr>
887 
             <td> dbg_uart_txd                                                     </td>
888 
             <td> Output                                                           </td>
889 
             <td> 1                                                                </td>
890 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">mclk<br>
891 
      </td>
892 
<td> Debug interface: UART TXD                                        </td>
893 50 olivier.gi 
        </tr>
894 
        <tr>
895 
             <td> dbg_uart_rxd                                                     </td>
896 
             <td> Input                                                            </td>
897 
             <td> 1                                                                </td>
898 135 olivier.gi 
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
899 
      </td>
900 
<td> Debug interface: UART RXD (asynchronous)                         </td>
901 166 olivier.gi 
        </tr><tr>
902 
      <td style="vertical-align: top;">dbg_i2c_addr<br>
903 
      </td>
904 
      <td style="vertical-align: top;"> Input</td>
905 
      <td style="vertical-align: top;"> 7</td>
906 
      <td style="vertical-align: top; text-align: center;">mclk</td>
907 
      <td style="vertical-align: top;">Debug interface: I2C Address<br>
908 
      </td>
909 
    </tr>
910 
    <tr>
911 
      <td style="vertical-align: top;">dbg_i2c_broadcast<br>
912 
      </td>
913 
      <td style="vertical-align: top;"> Input</td>
914 
      <td style="vertical-align: top;"> 7</td>
915 
      <td style="vertical-align: top; text-align: center;">mclk</td>
916 
      <td style="vertical-align: top;">Debug interface: I2C Broadcast Address (for multicore systems)<br>
917 
      </td>
918 
    </tr>
919 
    <tr>
920 
      <td style="vertical-align: top;">dbg_i2c_scl<br>
921 
      </td>
922 
      <td style="vertical-align: top;"> Input</td>
923 
      <td style="vertical-align: top;"> 1</td>
924 
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;</td>
925 
      <td style="vertical-align: top;">Debug interface: I2C SCL (asynchronous)</td>
926 
    </tr>
927 
    <tr>
928 
      <td style="vertical-align: top;">dbg_i2c_sda_in<br>
929 
      </td>
930 
      <td style="vertical-align: top;"> Input</td>
931 
      <td style="vertical-align: top;"> 1</td>
932 
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;</td>
933 
      <td style="vertical-align: top;">Debug interface: I2C SDA IN (asynchronous)</td>
934 
    </tr>
935 
    <tr>
936 
      <td style="vertical-align: top;">dbg_i2c_sda_out<br>
937 
      </td>
938 
      <td style="vertical-align: top;"> Output</td>
939 
      <td style="vertical-align: top;"> 1</td>
940 
      <td style="vertical-align: top; text-align: center;">mclk</td>
941 
      <td style="vertical-align: top;">Debug interface: I2C SDA OUT<br>
942 
      </td>
943 
    </tr>
944 
<tr align="center">
945 135 olivier.gi 
      <td colspan="5" rowspan="1" style="vertical-align: top;"><b><i>Scan</i></b></td>
946 
    </tr>
947 
    <tr>
948 
      <td style="vertical-align: top;">scan_enable<br>
949 
      </td>
950 
      <td style="vertical-align: top;">Input<br>
951 
      </td>
952 
      <td style="vertical-align: top;">1<br>
953 
      </td>
954 
      <td style="vertical-align: top; text-align: center;">dco_clk<br>
955 
      </td>
956 
<td style="vertical-align: top;">ASIC ONLY: Scan enable (active during scan shifting)<br>
957 
      </td>
958 
    </tr>
959 
    <tr>
960 
      <td style="vertical-align: top;">scan_mode<br>
961 
      </td>
962 
      <td style="vertical-align: top;">Input<br>
963 
      </td>
964 
      <td style="vertical-align: top;">1<br>
965 
      </td>
966 
      <td style="vertical-align: top; text-align: center;">&lt;stable&gt;<br>
967 
      </td>
968 
<td style="vertical-align: top;">ASIC ONLY: Scan mode<br>
969 
      </td>
970 
    </tr>
971 50 olivier.gi 
 
972 135 olivier.gi 
</tbody></table>
973 
<br>
974 195 olivier.gi 
<b><sup><font color="#ff0000">1</font></sup></b>: This parameter is declared in the "openMSP430_defines.v" file and defines the RAM/ROM size or the number of interrupts vectors (16, 32 or 64).<br>
975 135 olivier.gi 
<b><sup><font color="#ff0000">2</font></sup></b>: These two optional
976 
ports can be connected whenever the program memory is a RAM. This will
977 
allow the user to load a program through the serial debug interface and
978 
to use software breakpoints.<br>
979 
<b><sup><font color="#ff0000">3</font></sup></b>: When disabled, the debug interface is hold into reset (and clock gated in ASIC mode). As a consequence, the <b><i>dbg_en</i></b> port can be used to reset the debug interface without disrupting the CPU execution.<br>
980 
<b><sup><font color="#ff0000">4</font></sup></b>: Clock domain is selectable through configuration in the "openMSP430_defines.v" file (see Advanced System Configuration).<br>
981 
<br>
982 
<span style="text-decoration: underline; font-weight: bold;">Note:</span> in the FPGA configuration, the <span style="font-style: italic;">ASIC ONLY</span> signals must be left unconnected (for the outputs) and tied low (for the inputs).<br>
983 
 
984 195 olivier.gi 
<a name="2.7 Instruction Cycles and Lengths"></a>
985 
<h2>2.7 Instruction Cycles and Lengths</h2>
986 50 olivier.gi 
 
987 135 olivier.gi 
Please note that a detailed description of the instruction and addressing modes can be found in the <b><a href="http://www.ti.com/litv/pdf/slau049f">MSP430x1xx Family User's Guide</a></b> (Chapter 3).<br><br>
988 
The number of CPU clock cycles required for an instruction depends on
989 
the instruction format and the addressing modes used, not the
990 
instruction itself.<br>
991 116 olivier.gi 
In the following tables, the number of clock cycles refers to the main clock (<i>MCLK</i>).
992 50 olivier.gi 
Differences with the original MSP430 are highlighted in green (the original value being red).
993 
<ul>
994 
        <li><b>Interrupt and Reset Cycles</b></li>
995 
</ul>
996 
<table border="1">
997 135 olivier.gi 
        <tbody><tr> <td align="center"><b>Action</b>  </td> <td align="center"><b>No. of Cycles</b></td> <td align="center"><b>Length of Instruction</b></td> </tr>
998 50 olivier.gi 
        <tr> <td> Return from interrupt (RETI) </td> <td align="center">       5            </td> <td align="center">           1                </td> </tr>
999 
        <tr> <td> Interrupt accepted           </td> <td align="center">       6            </td> <td align="center">           -                </td> </tr>
1000 
        <tr> <td> WDT reset                    </td> <td align="center">       4            </td> <td align="center">           -                </td> </tr>
1001 
        <tr> <td> Reset (!RST/NMI)             </td> <td align="center">       4            </td> <td align="center">           -                </td> </tr>
1002 135 olivier.gi 
</tbody></table>
1003 50 olivier.gi 
 
1004 
<ul>
1005 
        <li><b>Format-II (Single Operand) Instruction Cycles and Lengths</b></li>
1006 
</ul>
1007 
<table border="1">
1008 135 olivier.gi 
        <tbody><tr> <td rowspan="2" align="center"><b>Addressing Mode</b>  </td> <td colspan="3" align="center"><b>No. of Cycles</b></td> <td rowspan="2" align="center"><b>Length of Instruction</b></td> </tr>
1009 50 olivier.gi 
        <tr>                                                              <td><b>RRA, RRC, SWPB, SXT</b></td> <td><b>PUSH</b></td> <td><b>CALL</b></td> </tr>
1010 
 
1011 
        <tr> <td align="center"> Rn    </td> <td align="center"> 1   </td> <td align="center"> 3 </td> <td align="center"><b><font color="green">3 </font><font color="red"> (4)</font></b></td> <td align="center"> 1 </td> </tr>
1012 
        <tr> <td align="center"> @Rn   </td> <td align="center"> 3   </td> <td align="center"> 4 </td> <td align="center"> 4 </td> <td align="center"> 1 </td> </tr>
1013 
        <tr> <td align="center"> @Rn+  </td> <td align="center"> 3   </td> <td align="center"><b><font color="green">4 </font><font color="red"> (5)</font></b></td> <td align="center"><b><font color="green">4 </font><font color="red"> (5)</font></b></td> <td align="center"> 1 </td> </tr>
1014 
        <tr> <td align="center"> #N    </td> <td align="center"> N/A </td> <td align="center"> 4 </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1015 
        <tr> <td align="center"> X(Rn) </td> <td align="center"> 4   </td> <td align="center"> 5 </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1016 
        <tr> <td align="center"> EDE   </td> <td align="center"> 4   </td> <td align="center"> 5 </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1017 135 olivier.gi 
        <tr> <td align="center"> &amp;EDE  </td> <td align="center"> 4   </td> <td align="center"> 5 </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1018 
</tbody></table>
1019 50 olivier.gi 
 
1020 
<ul>
1021 
        <li><b>Format-III (Jump) Instruction Cycles and Lengths</b></li>
1022 
</ul>
1023 
All jump instructions require one code word, and take two CPU cycles to execute, regardless of whether the jump is taken or not.
1024 
 
1025 
<ul>
1026 
        <li><b>Format-I (Double Operand) Instruction Cycles and Lengths</b></li>
1027 
</ul>
1028 
<table border="1">
1029 135 olivier.gi 
        <tbody><tr> <td colspan="2" align="center"><b>Addressing Mode</b>  </td> <td rowspan="2" align="center"><b>No. of Cycles</b></td> <td rowspan="2" align="center"><b>Length of Instruction</b></td> </tr>
1030 50 olivier.gi 
        <tr> <td align="center"><b>Src</b></td> <td align="center"><b>Dst</b></td> </tr>
1031 
 
1032 
        <tr> <td rowspan="5" align="center"> Rn    </td> <td align="center"> Rm    </td> <td align="center"> 1 </td> <td align="center"> 1 </td> </tr>
1033 
        <tr>                                             <td align="center"> PC    </td> <td align="center"> 2 </td> <td align="center"> 1 </td> </tr>
1034 
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 4 </td> <td align="center"> 2 </td> </tr>
1035 
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 4 </td> <td align="center"> 2 </td> </tr>
1036 135 olivier.gi 
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 4 </td> <td align="center"> 2 </td> </tr>
1037 50 olivier.gi 
        <tr> <td rowspan="5" align="center"> @Rn   </td> <td align="center"> Rm    </td> <td align="center"> 2 </td> <td align="center"> 1 </td> </tr>
1038 
        <tr>                                             <td align="center"> PC    </td> <td align="center"><b><font color="green">3 </font><font color="red"> (2)</font></b></td> <td align="center"> 1 </td> </tr>
1039 
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1040 
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1041 135 olivier.gi 
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1042 50 olivier.gi 
        <tr> <td rowspan="5" align="center"> @Rn+  </td> <td align="center"> Rm    </td> <td align="center"> 2 </td> <td align="center"> 1 </td> </tr>
1043 
        <tr>                                             <td align="center"> PC    </td> <td align="center"> 3 </td> <td align="center"> 1 </td> </tr>
1044 
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1045 
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1046 135 olivier.gi 
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 5 </td> <td align="center"> 2 </td> </tr>
1047 50 olivier.gi 
        <tr> <td rowspan="5" align="center"> #N    </td> <td align="center"> Rm    </td> <td align="center"> 2 </td> <td align="center"> 2 </td> </tr>
1048 
        <tr>                                             <td align="center"> PC    </td> <td align="center"> 3 </td> <td align="center"> 2 </td> </tr>
1049 
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 5 </td> <td align="center"> 3 </td> </tr>
1050 
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 5 </td> <td align="center"> 3 </td> </tr>
1051 135 olivier.gi 
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 5 </td> <td align="center"> 3 </td> </tr>
1052 50 olivier.gi 
        <tr> <td rowspan="5" align="center"> x(Rn) </td> <td align="center"> Rm    </td> <td align="center"> 3 </td> <td align="center"> 2 </td> </tr>
1053 
        <tr>                                             <td align="center"> PC    </td> <td align="center"><b><font color="green">3 </font><font color="red"> (4)</font></b></td> <td align="center"> 2 </td> </tr>
1054 
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1055 
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1056 135 olivier.gi 
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1057 50 olivier.gi 
        <tr> <td rowspan="5" align="center"> EDE   </td> <td align="center"> Rm    </td> <td align="center"> 3 </td> <td align="center"> 2 </td> </tr>
1058 
        <tr>                                             <td align="center"> PC    </td> <td align="center"><b><font color="green">3 </font><font color="red"> (4)</font></b></td> <td align="center"> 2 </td> </tr>
1059 
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1060 
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1061 135 olivier.gi 
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1062 
        <tr> <td rowspan="5" align="center"> &amp;EDE  </td> <td align="center"> Rm    </td> <td align="center"> 3 </td> <td align="center"> 2 </td> </tr>
1063 50 olivier.gi 
        <tr>                                             <td align="center"> PC    </td> <td align="center"> 3 </td> <td align="center"> 2 </td> </tr>
1064 
        <tr>                                             <td align="center"> x(Rm) </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1065 
        <tr>                                             <td align="center"> EDE   </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1066 135 olivier.gi 
        <tr>                                             <td align="center"> &amp;EDE  </td> <td align="center"> 6 </td> <td align="center"> 3 </td> </tr>
1067 
</tbody></table>
1068 50 olivier.gi 
 
1069 195 olivier.gi 
<a name="2.8 Serial Debug Interface"></a>
1070 
<h2>2.8 Serial Debug Interface</h2>
1071 50 olivier.gi 
 
1072 135 olivier.gi 
All the details about the Serial Debug Interface are located <a href="http://opencores.org/project,openmsp430,serial%20debug%20interface">here</a>.<br>
1073 
<br>
1074 166 olivier.gi 
 
1075 195 olivier.gi 
<a name="2.9 Benchmark results"></a>
1076 
<h2>2.9 Benchmark results</h2>
1077 166 olivier.gi 
 
1078 195 olivier.gi 
<a name="2.9.1 Dhrystone"></a>
1079 
<h3>2.9.1 Dhrystone (DMIPS/MHz)</h3>
1080 166 olivier.gi 
Dhrystone is known for being susceptible to compiler optimizations (among other issues).<br>However,
1081 
as it is still quite a popular metric, some results are provided here
1082 
(ranging from 0.30 to 0.45 DMIPS/MHz depending on the compiler version
1083 
and options).<br>
1084 
Note that the used C-code is available in the repository <a href="http://opencores.org/websvn,listing?repname=openmsp430&amp;path=%2Fopenmsp430%2Ftrunk%2Fcore%2Fsim%2Frtl_sim%2Fsrc-c%2Fdhrystone_v2.1%2F#path_openmsp430_trunk_core_sim_rtl_sim_src-c_dhrystone_v2.1_">here</a> and <a href="http://opencores.org/websvn,listing?repname=openmsp430&amp;path=%2Fopenmsp430%2Ftrunk%2Fcore%2Fsim%2Frtl_sim%2Fsrc-c%2Fdhrystone_4mcu%2F#path_openmsp430_trunk_core_sim_rtl_sim_src-c_dhrystone_4mcu_">here</a>.<br>
1085 
<br>
1086 
 
1087 
<table style="text-align: left; width: 40%;" border="1" cellpadding="2" cellspacing="2">
1088 
  <tbody>
1089 
    <tr>
1090 
      <td style="text-align: center;" colspan="1" rowspan="2"><span style="font-weight: bold;">Dhrystone flavor</span></td>
1091 
      <td style="font-weight: bold; text-align: right;">Compiler options</td>
1092 
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-Os</td>
1093 
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-O2</td>
1094 
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-O3</td>
1095 
    </tr>
1096 
    <tr align="left">
1097 
      <td style="font-weight: bold;">Compiler version
1098 
      </td>
1099 
    </tr>
1100 
    <tr>
1101 
      <td style="text-align: center;" colspan="1" rowspan="2">Dhrystone v2.1<br>
1102 
                     (<a href="http://ftp.unicamp.br/pub/unix-c/benchmark/system/">common version</a>)</td>
1103 
      <td style="text-align: left;">mspgcc v4.4.5</td>
1104 
      <td style="text-align: center;">0.30</td>
1105 
      <td style="text-align: center;">0.32</td>
1106 
      <td style="text-align: center;">0.33</td>
1107 
    </tr>
1108 
    <tr>
1109 
      <td style="text-align: left;">mspgcc v4.6.3</td>
1110 
      <td style="text-align: center;">0.37</td>
1111 
      <td style="text-align: center;">0.39</td>
1112 
      <td style="text-align: center;">0.40</td>
1113 
    </tr>
1114 
    <tr>
1115 
      <td style="text-align: center;" colspan="1" rowspan="2">Dhrystone v2.1<br>
1116 
                     (<a href="http://www.ecrostech.com/Other/Resources/Dhrystone.htm">MCU adapted</a>)</td>
1117 
      <td style="text-align: left;">mspgcc v4.4.5</td>
1118 
      <td style="text-align: center;">0.30</td>
1119 
      <td style="text-align: center;">0.30</td>
1120 
      <td style="text-align: center;">0.31</td>
1121 
    </tr>
1122 
    <tr>
1123 
      <td style="text-align: left;">mspgcc v4.6.3</td>
1124 
      <td style="text-align: center;">0.37</td>
1125 
      <td style="text-align: center;">0.44</td>
1126 
      <td style="text-align: center;">0.45</td>
1127 
    </tr>
1128 
  </tbody>
1129 
</table>
1130 
 
1131 195 olivier.gi 
<a name="2.9.2 CoreMark"></a>
1132 
<h3>2.9.2 CoreMark (CoreMark/MHz)</h3>
1133 166 olivier.gi 
CoreMark tries to address most of Dhrystone's pitfall by preventing the
1134 
compiler to optimize some code away and using "real-life" algorithm.<br>
1135 
Note that the used C-code is available in the repository <a href="http://opencores.org/websvn,listing?repname=openmsp430&amp;path=%2Fopenmsp430%2Ftrunk%2Fcore%2Fsim%2Frtl_sim%2Fsrc-c%2Fcoremark_v1.0%2F#path_openmsp430_trunk_core_sim_rtl_sim_src-c_coremark_v1.0_">here</a>.<br>
1136 
<br>
1137 
 
1138 
<table style="text-align: left; width: 40%;" border="1" cellpadding="2" cellspacing="2">
1139 
  <tbody>
1140 
    <tr>
1141 
      <td style="text-align: center;" colspan="1" rowspan="2"><br>
1142 
</td>
1143 
      <td style="font-weight: bold; text-align: right;">Compiler options</td>
1144 
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-Os</td>
1145 
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-O2</td>
1146 
      <td colspan="1" rowspan="2" style="vertical-align: top; text-align: center; font-weight: bold;">-O3</td>
1147 
    </tr>
1148 
    <tr align="left">
1149 
      <td style="font-weight: bold;">Compiler version</td>
1150 
    </tr>
1151 
    <tr>
1152 
      <td style="text-align: center;" colspan="1" rowspan="2">CoreMark v1.0<br>
1153 
                     (<a href="http://www.coremark.org/">official version</a>)</td>
1154 
      <td style="text-align: left;">mspgcc v4.4.5</td>
1155 
      <td style="text-align: center;">0.78</td>
1156 
      <td style="text-align: center;">0.85</td>
1157 
      <td style="text-align: center;">0.83</td>
1158 
    </tr>
1159 
    <tr>
1160 
      <td style="text-align: left;">mspgcc v4.6.3</td>
1161 
      <td style="text-align: center;">0.74</td>
1162 
      <td style="text-align: center;">0.91</td>
1163 
      <td style="text-align: center;">0.87</td>
1164 
    </tr>
1165 
  </tbody>
1166 
</table>
1167 135 olivier.gi 
<br><br>
1168 
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