OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [doc/] [html/] [integration.html] - Blame information for rev 216

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 50 olivier.gi
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
2 166 olivier.gi
<html><head><title>openMSP430 Integration and Connectivity</title></head><body><br>
3 50 olivier.gi
<a name="TOC"></a>
4
<h3>Table of content</h3>
5
<ul>
6 135 olivier.gi
        <li><a href="#1.%20Overview">              1. Overview</a></li>
7
        <li><a href="#2.%20Clocks">                2. Clocks</a></li>
8
        <li><a href="#3.%20Resets">                3. Resets</a></li>
9 166 olivier.gi
        <li><a href="#4.%20Program%20Memory">      4. Program Memory</a></li>
10
        <li><a href="#5.%20Data%20Memory">         5. Data Memory</a></li>
11 135 olivier.gi
        <li><a href="#6.%20Peripherals">           6. Peripherals</a></li>
12 202 olivier.gi
        <li><a href="#7.%20DMA%20Interface">       7. Direct Memory Access Interface</a></li>
13
        <li><a href="#8.%20Interrupts">            8. Interrupts</a></li>
14
        <li><a href="#9.%20Serial%20Debug%20Interface">9. Serial Debug Interface</a></li>
15 166 olivier.gi
        <ul>
16 202 olivier.gi
           <li><a href="#9.1%20UART">                  9.1 UART Configuration</a></li>
17
       <li><a href="#9.2%20I2C">                   9.2 I2C Configuration</a></li>
18 166 olivier.gi
        </ul>
19 50 olivier.gi
</ul>
20
 
21
<a name="1. Overview"></a>
22
<h1>1. Overview</h1>
23 135 olivier.gi
This chapter aims to give a comprehensive description of all openMSP430
24
core interfaces in order to facilitate its integration within an ASIC
25
or FPGA.<br><br>The
26
following diagram shows an overview of the openMSP430 core connectivity
27
in an FPGA system (i.e. all ASIC specific pins are left unused):<br><br>
28 202 olivier.gi
<img src="http://opencores.org/usercontent,img,1430948924" alt="Core Integration" title="Core Integration" width="100%">
29 135 olivier.gi
<br><br>
30
The full pinout of the core is summarized in the following table.<br>
31
<br>
32 50 olivier.gi
<table border="1">
33 135 olivier.gi
        <tbody><tr> <td align="center"><b>Port Name</b></td> <td align="center"><b>Direction</b></td> <td align="center"><b>Width</b>    </td> <td style="vertical-align: top; text-align: center;"><span style="font-weight: bold;">Clock</span><br style="font-weight: bold;">
34
      <span style="font-weight: bold;">Domain</span><br>
35
      </td>
36
<td align="center"><b>Description</b></td> </tr>
37 50 olivier.gi
 
38 135 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Clocks</i></b>                         </td></tr>
39 116 olivier.gi
        <tr>
40 135 olivier.gi
             <td> <a href="#2.%20Clocks">cpu_en</a>                                 </td>
41
             <td style="text-align: center;"> Input                                                            </td>
42
             <td style="text-align: center;"> 1                                                                </td>
43
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
44
 
45
or mclk<b><sup><font color="#ff0000">4</font></sup></b></td>
46
<td><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">Enable CPU code execution (asynchronous and non-glitchy).<br>Set to 1 if unused.</span>                         </td>
47 116 olivier.gi
        </tr>
48 50 olivier.gi
        <tr>
49 135 olivier.gi
             <td> <a href="#2.%20Clocks">dco_clk</a>                                </td>
50
             <td style="text-align: center;"> Input                                                            </td>
51
             <td style="text-align: center;"> 1                                                                </td>
52
             <td style="vertical-align: top; text-align: center;">-<br>
53
      </td>
54
<td><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">Fast oscillator (fast clock)</span>                          </td>
55 50 olivier.gi
        </tr>
56
        <tr>
57 135 olivier.gi
             <td> <a href="#2.%20Clocks">lfxt_clk</a>                               </td>
58
             <td style="text-align: center;"> Input                                                            </td>
59
             <td style="text-align: center;"> 1                                                                </td>
60
             <td style="vertical-align: top; text-align: center;">-<br>
61
      </td>
62
<td><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">Low frequency oscillator (typ. 32kHz)<br>Set to 0 if unused.</span></td>
63 50 olivier.gi
   </tr>
64
        <tr>
65 135 olivier.gi
             <td> <a href="#2.%20Clocks">mclk</a>                                   </td>
66
             <td style="text-align: center;"> Output                                                           </td>
67
             <td style="text-align: center;"> 1                                                                </td>
68
             <td style="vertical-align: top; text-align: center;">-<br>
69
      </td>
70
<td> Main system clock                                                </td>
71 50 olivier.gi
        </tr>
72
        <tr>
73 135 olivier.gi
             <td> <a href="#2.%20Clocks">aclk_en</a>                                </td>
74
             <td style="text-align: center;"> Output                                                           </td>
75
             <td style="text-align: center;"> 1                                                                </td>
76
             <td style="vertical-align: top; text-align: center;">mclk<br>
77
      </td>
78
<td><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">FPGA ONLY: ACLK enable</span>                                                      </td>
79 50 olivier.gi
   </tr>
80
        <tr>
81 135 olivier.gi
             <td> <a href="#2.%20Clocks">smclk_en</a>                               </td>
82
             <td style="text-align: center;"> Output                                                           </td>
83
             <td style="text-align: center;"> 1                                                                </td>
84
             <td style="vertical-align: top; text-align: center;">mclk<br>
85
      </td>
86
<td> <span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">FPGA ONLY: SMCLK enable</span>                                                     </td>
87 50 olivier.gi
   </tr>
88
 
89
        <tr>
90 135 olivier.gi
      <td style="vertical-align: top;"><a href="integration.html#2.%20Clocks">dco_enable</a></td>
91
      <td style="vertical-align: top; text-align: center;">Output<br>
92
      </td>
93
      <td style="vertical-align: top; text-align: center;">1<br>
94
      </td>
95
      <td style="vertical-align: top; text-align: center;">dco_clk<br>
96
      </td>
97
      <td style="vertical-align: top;"><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">ASIC ONLY: Fast oscillator enable</span></td>
98
    </tr>
99
    <tr>
100
      <td style="vertical-align: top;"><a href="integration.html#2.%20Clocks">dco_wkup</a></td>
101
      <td style="vertical-align: top; text-align: center;">Output</td>
102
      <td style="vertical-align: top; text-align: center;">1<br>
103
      </td>
104
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
105
      </td>
106
      <td style="vertical-align: top;"><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">ASIC ONLY: Fast oscillator wakeup (asynchronous)</span></td>
107
    </tr>
108
    <tr>
109
      <td style="vertical-align: top;"><a href="integration.html#2.%20Clocks">lfxt_enable</a></td>
110
      <td style="vertical-align: top; text-align: center;">Output</td>
111
      <td style="vertical-align: top; text-align: center;">1<br>
112
      </td>
113
      <td style="vertical-align: top; text-align: center;">lfxt_clk<br>
114
      </td>
115
      <td style="vertical-align: top;"><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">ASIC ONLY: Low frequency oscillator enable</span></td>
116
    </tr>
117
    <tr>
118
      <td style="vertical-align: top;"><a href="integration.html#2.%20Clocks">lfxt_wkup</a></td>
119
      <td style="vertical-align: top; text-align: center;">Output</td>
120
      <td style="vertical-align: top; text-align: center;">1<br>
121
      </td>
122
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
123
      </td>
124
      <td style="vertical-align: top;"><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">ASIC ONLY: Low frequency oscillator wakeup (asynchronous)</span></td>
125
    </tr>
126
    <tr>
127
      <td style="vertical-align: top;"><a href="integration.html#2.%20Clocks">aclk</a></td>
128
      <td style="vertical-align: top; text-align: center;">Output</td>
129
      <td style="vertical-align: top; text-align: center;">1<br>
130
      </td>
131
      <td style="vertical-align: top; text-align: center;">-<br>
132
      </td>
133
      <td style="vertical-align: top;"><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">ASIC ONLY: ACLK</span></td>
134
    </tr>
135
    <tr>
136
      <td style="vertical-align: top;"><a href="integration.html#2.%20Clocks">smclk</a></td>
137
      <td style="vertical-align: top; text-align: center;">Output</td>
138
      <td style="vertical-align: top; text-align: center;">1<br>
139
      </td>
140
      <td style="vertical-align: top; text-align: center;">-<br>
141
      </td>
142
      <td style="vertical-align: top;"><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">ASIC ONLY: SMCLK</span></td>
143
    </tr>
144
    <tr>
145
      <td style="vertical-align: top;"><a href="integration.html#2.%20Clocks">wkup</a></td>
146
      <td style="vertical-align: top; text-align: center;">Input<br>
147
      </td>
148
      <td style="vertical-align: top; text-align: center;">1<br>
149
      </td>
150
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
151
      </td>
152
      <td style="vertical-align: top;"><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">ASIC ONLY: System Wake-up (asynchronous and non-glitchy)<br>Set to 0 if unused.</span></td>
153
    </tr>
154
<tr> <td colspan="5" align="center"> <b><i>Resets</i></b>                         </td></tr>
155
        <tr>
156
             <td> <a href="#3.%20Resets">puc_rst</a>                                </td>
157
             <td style="text-align: center;"> Output                                                           </td>
158
             <td style="text-align: center;"> 1                                                                </td>
159
             <td style="vertical-align: top; text-align: center;">mclk<br>
160
      </td>
161
<td> Main system reset                                                </td>
162 50 olivier.gi
   </tr>
163
        <tr>
164 135 olivier.gi
             <td> <a href="#3.%20Resets">reset_n</a>                                </td>
165
             <td style="text-align: center;"> Input                                                            </td>
166
             <td style="text-align: center;"> 1                                                                </td>
167
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
168
      </td>
169
<td><span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">Reset Pin (active low, asynchronous and non-glitchy)</span>                             </td>
170 50 olivier.gi
        </tr>
171
 
172
 
173 135 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Program Memory interface</i></b>       </td></tr>
174 50 olivier.gi
        <tr>
175 135 olivier.gi
             <td> <a href="#4.%20Program%20Memory">pmem_addr</a>                      </td>
176
             <td style="text-align: center;"> Output                                                           </td>
177
             <td style="text-align: center;"><small> `PMEM_AWIDTH</small><sup style="color: red; font-weight: bold;">1</sup>                                        </td>
178
             <td style="vertical-align: top; text-align: center;">mclk<br>
179
      </td>
180
<td> Program Memory address                                           </td>
181 50 olivier.gi
        </tr>
182
        <tr>
183 135 olivier.gi
             <td> <a href="#4.%20Program%20Memory">pmem_cen</a>                       </td>
184
             <td style="text-align: center;"> Output                                                           </td>
185
             <td style="text-align: center;"> 1                                                                </td>
186
             <td style="vertical-align: top; text-align: center;">mclk</td>
187
<td> Program Memory chip enable (low active)                          </td>
188 50 olivier.gi
        </tr>
189
        <tr>
190 135 olivier.gi
             <td> <a href="#4.%20Program%20Memory">pmem_din</a>                       </td>
191
             <td style="text-align: center;"> Output                                                           </td>
192
             <td style="text-align: center;"> 16                                                               </td>
193
             <td style="vertical-align: top; text-align: center;">mclk</td>
194
<td> Program Memory data input<span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;"> (optional<span class="Apple-converted-space">&nbsp;</span><b><sup><font color="#ff0000">2</font></sup></b>)</span>                                        </td>
195 50 olivier.gi
        </tr>
196
        <tr>
197 135 olivier.gi
             <td> <a href="#4.%20Program%20Memory">pmem_dout</a>                      </td>
198
             <td style="text-align: center;"> Input                                                            </td>
199
             <td style="text-align: center;"> 16                                                               </td>
200
             <td style="vertical-align: top; text-align: center;">mclk</td>
201
<td> Program Memory data output                                       </td>
202 50 olivier.gi
        </tr>
203
        <tr>
204 135 olivier.gi
             <td> <a href="#4.%20Program%20Memory">pmem_wen</a>                       </td>
205
             <td style="text-align: center;"> Output                                                           </td>
206
             <td style="text-align: center;"> 2                                                                </td>
207
             <td style="vertical-align: top; text-align: center;">mclk</td>
208
<td> Program Memory write byte enable (low active) <span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;">(optional<span class="Apple-converted-space">&nbsp;</span><b><sup><font color="#ff0000">2</font></sup></b>)</span>                    </td>
209 50 olivier.gi
        </tr>
210
 
211 135 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Data Memory interface</i></b>          </td></tr>
212 50 olivier.gi
        <tr>
213 135 olivier.gi
             <td> <a href="#5.%20Data%20Memory">dmem_addr</a>                         </td>
214
             <td style="text-align: center;"> Output                                                           </td>
215
             <td style="text-align: center;"><small> `DMEM_AWIDTH</small><sup style="font-weight: bold; color: red;">1</sup>                                        </td>
216
             <td style="vertical-align: top; text-align: center;">mclk</td>
217
<td> Data Memory address                                              </td>
218 50 olivier.gi
        </tr>
219
        <tr>
220 135 olivier.gi
             <td> <a href="#5.%20Data%20Memory">dmem_cen</a>                          </td>
221
             <td style="text-align: center;"> Output                                                           </td>
222
             <td style="text-align: center;"> 1                                                                </td>
223
             <td style="vertical-align: top; text-align: center;">mclk</td>
224
<td> Data Memory chip enable (low active)                             </td>
225 50 olivier.gi
        </tr>
226
        <tr>
227 135 olivier.gi
             <td> <a href="#5.%20Data%20Memory">dmem_din</a>                          </td>
228
             <td style="text-align: center;"> Output                                                           </td>
229
             <td style="text-align: center;"> 16                                                               </td>
230
             <td style="vertical-align: top; text-align: center;">mclk</td>
231
<td> Data Memory data input                                           </td>
232 50 olivier.gi
        </tr>
233
        <tr>
234 135 olivier.gi
             <td> <a href="#5.%20Data%20Memory">dmem_dout</a>                         </td>
235
             <td style="text-align: center;"> Input                                                            </td>
236
             <td style="text-align: center;"> 16                                                               </td>
237
             <td style="vertical-align: top; text-align: center;">mclk</td>
238
<td> Data Memory data output                                          </td>
239 50 olivier.gi
        </tr>
240
        <tr>
241 135 olivier.gi
             <td> <a href="#5.%20Data%20Memory">dmem_wen</a>                          </td>
242
             <td style="text-align: center;"> Output                                                           </td>
243
             <td style="text-align: center;"> 2                                                                </td>
244
             <td style="vertical-align: top; text-align: center;">mclk</td>
245
<td> Data Memory write byte enable (low active)                       </td>
246 50 olivier.gi
        </tr>
247
 
248 135 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>External Peripherals interface</i></b> </td></tr>
249 50 olivier.gi
        <tr>
250 135 olivier.gi
             <td> <a href="#6.%20Peripherals">per_addr</a>                          </td>
251
             <td style="text-align: center;"> Output                                                           </td>
252
             <td style="text-align: center;"> 14                                                               </td>
253
             <td style="vertical-align: top; text-align: center;">mclk</td>
254
<td> Peripheral address                                               </td>
255 50 olivier.gi
        </tr>
256
        <tr>
257 135 olivier.gi
             <td> <a href="#6.%20Peripherals">per_din</a>                           </td>
258
             <td style="text-align: center;"> Output                                                           </td>
259
             <td style="text-align: center;"> 16                                                               </td>
260
             <td style="vertical-align: top; text-align: center;">mclk</td>
261
<td> Peripheral data input                                            </td>
262 50 olivier.gi
   </tr>
263
        <tr>
264 135 olivier.gi
             <td> <a href="#6.%20Peripherals">per_dout</a>                          </td>
265
             <td style="text-align: center;"> Input                                                            </td>
266
             <td style="text-align: center;"> 16                                                               </td>
267
             <td style="vertical-align: top; text-align: center;">mclk</td>
268
<td> Peripheral data output                                           </td>
269 50 olivier.gi
        </tr>
270
        <tr>
271 135 olivier.gi
             <td> <a href="#6.%20Peripherals">per_en</a>                            </td>
272
             <td style="text-align: center;"> Output                                                           </td>
273
             <td style="text-align: center;"> 1                                                                </td>
274
             <td style="vertical-align: top; text-align: center;">mclk</td>
275
<td> Peripheral enable (high active)                                  </td>
276 50 olivier.gi
        </tr>
277
        <tr>
278 135 olivier.gi
             <td> <a href="#6.%20Peripherals">per_we</a>                            </td>
279
             <td style="text-align: center;"> Output                                                           </td>
280
             <td style="text-align: center;"> 2                                                                </td>
281
             <td style="vertical-align: top; text-align: center;">mclk</td>
282
<td> Peripheral write byte enable (high active)                       </td>
283 50 olivier.gi
        </tr>
284 202 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Direct Memory Access interface</i></b> </td></tr>
285
        <tr>
286
             <td> <a href="#7.%20DMA%20Interface">dma_addr</a>                                                         </td>
287
             <td style="text-align: center;"> Input                                                            </td>
288
             <td style="text-align: center;"> 15                                                               </td>
289
             <td style="vertical-align: top; text-align: center;">mclk<br>
290
      </td>
291
<td> Direct Memory Access address                                              </td>
292
        </tr>
293
        <tr>
294
             <td> <a href="#7.%20DMA%20Interface">dma_din</a>                                                          </td>
295
             <td style="text-align: center;"> Input                                                            </td>
296
             <td style="text-align: center;"> 16                                                               </td>
297
             <td style="vertical-align: top; text-align: center;">mclk<br>
298
      </td>
299
<td> Direct Memory Access data input                                           </td>
300
   </tr>
301
        <tr>
302
             <td> <a href="#7.%20DMA%20Interface">dma_dout</a>                                                         </td>
303
             <td style="text-align: center;"> Output                                                           </td>
304
             <td style="text-align: center;"> 16                                                               </td>
305
             <td style="vertical-align: top; text-align: center;">mclk<br>
306
      </td>
307
<td> Direct Memory Access data output                                          </td>
308
        </tr>
309
        <tr>
310
             <td> <a href="#7.%20DMA%20Interface">dma_en</a>                                                           </td>
311
             <td style="text-align: center;"> Input                                                            </td>
312
             <td style="text-align: center;"> 1                                                                </td>
313
             <td style="vertical-align: top; text-align: center;">mclk<br>
314
      </td>
315
<td> Direct Memory Access enable (high active)                                 </td>
316
        </tr>
317
        <tr>
318
             <td> <a href="#7.%20DMA%20Interface">dma_priority</a>                                                     </td>
319
             <td style="text-align: center;"> Input                                                            </td>
320
             <td style="text-align: center;"> 1                                                                </td>
321
             <td style="vertical-align: top; text-align: center;">mclk<br>
322
      </td>
323
<td> Direct Memory Access priority (0:low / 1:high)                            </td>
324
        </tr>
325
        <tr>
326
             <td> <a href="#7.%20DMA%20Interface">dma_ready</a>                                                        </td>
327
             <td style="text-align: center;"> Output                                                           </td>
328
             <td style="text-align: center;"> 1                                                                </td>
329
             <td style="vertical-align: top; text-align: center;">mclk<br>
330
      </td>
331
<td> Direct Memory Access is complete                                          </td>
332
        </tr>
333
        <tr>
334
             <td> <a href="#7.%20DMA%20Interface">dma_resp</a>                                                         </td>
335
             <td style="text-align: center;"> Output                                                           </td>
336
             <td style="text-align: center;"> 1                                                                </td>
337
             <td style="vertical-align: top; text-align: center;">mclk<br>
338
      </td>
339
<td> Direct Memory Access response (0:Okay / 1:Error)                          </td>
340
        </tr>
341
        <tr>
342
             <td> <a href="#7.%20DMA%20Interface">dma_we</a>                                                           </td>
343
             <td style="text-align: center;"> Input                                                            </td>
344
             <td style="text-align: center;"> 2                                                                </td>
345
             <td style="vertical-align: top; text-align: center;">mclk<br>
346
      </td>
347
<td> Direct Memory Access write byte enable (high active)                      </td>
348
        </tr>
349
        <tr>
350
             <td> <a href="#7.%20DMA%20Interface">dma_wkup</a>                                                         </td>
351
             <td style="text-align: center;"> Input                                                            </td>
352
             <td style="text-align: center;"> 1                                                                </td>
353
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
354
      </td>
355
<td> ASIC ONLY: DMA Wake-up (asynchronous and non-glitchy)                     </td>
356
        </tr>
357 50 olivier.gi
 
358 135 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Interrupts</i></b>                     </td></tr>
359 50 olivier.gi
        <tr>
360 202 olivier.gi
                  <td> <a href="#8.%20Interrupts">irq</a>                                </td>
361 135 olivier.gi
                  <td style="text-align: center;"> Input                                                            </td>
362 195 olivier.gi
                  <td style="text-align: center;"> <small>`IRQ_NR-2</small><sup style="font-weight: bold; color: red;">1</sup></td>
363 135 olivier.gi
                  <td style="vertical-align: top; text-align: center;">mclk</td>
364
<td> Maskable interrupts (one-hot signal)                             </td>
365 50 olivier.gi
   </tr>
366
        <tr>
367 202 olivier.gi
             <td> <a href="#8.%20Interrupts">nmi</a>                                </td>
368 135 olivier.gi
             <td style="text-align: center;"> Input                                                            </td>
369
             <td style="text-align: center;"> 1                                                                </td>
370
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
371
 
372
or mclk<b><sup><font color="#ff0000">4</font></sup></b></td>
373
<td> Non-maskable interrupt (asynchronous)                            </td>
374 50 olivier.gi
        </tr>
375
        <tr>
376 202 olivier.gi
             <td> <a href="#8.%20Interrupts">irq_acc</a>                            </td>
377 135 olivier.gi
             <td style="text-align: center;"> Output                                                           </td>
378 195 olivier.gi
             <td style="text-align: center;"> <small>`IRQ_NR-2</small><sup style="font-weight: bold; color: red;">1</sup></td>
379 135 olivier.gi
             <td style="vertical-align: top; text-align: center;">mclk</td>
380
<td> Interrupt request accepted (one-hot signal)                      </td>
381 50 olivier.gi
        </tr>
382
 
383 135 olivier.gi
        <tr> <td colspan="5" align="center"> <b><i>Serial Debug interface</i></b>         </td></tr>
384 50 olivier.gi
        <tr>
385 202 olivier.gi
             <td> <a href="#9.%20Serial%20Debug%20Interface">dbg_en</a>                 </td>
386 135 olivier.gi
             <td style="text-align: center;"> Input                                                            </td>
387
             <td style="text-align: center;"> 1                                                                </td>
388
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
389
 
390
or mclk<b><sup><font color="#ff0000">4</font></sup></b></td>
391
<td> Debug interface enable (asynchronous)<span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;"><span class="Apple-converted-space">&nbsp;</span><b><sup><font color="#ff0000">3</font></sup></b></span>                            </td>
392 116 olivier.gi
        </tr>
393
        <tr>
394 202 olivier.gi
             <td> <a href="#9.%20Serial%20Debug%20Interface">dbg_freeze</a>             </td>
395 135 olivier.gi
             <td style="text-align: center;"> Output                                                           </td>
396
             <td style="text-align: center;"> 1                                                                </td>
397
             <td style="vertical-align: top; text-align: center;">mclk</td>
398
<td> Freeze peripherals                                               </td>
399 50 olivier.gi
        </tr>
400
        <tr>
401 202 olivier.gi
             <td> <a href="#9.1%20UART">dbg_uart_txd</a>           </td>
402 135 olivier.gi
             <td style="text-align: center;"> Output                                                           </td>
403
             <td style="text-align: center;"> 1                                                                </td>
404
             <td style="vertical-align: top; text-align: center;">mclk</td>
405
<td> Debug interface: UART TXD                                        </td>
406 50 olivier.gi
        </tr>
407
        <tr>
408 202 olivier.gi
             <td> <a href="#9.1%20UART">dbg_uart_rxd</a>           </td>
409 135 olivier.gi
             <td style="text-align: center;"> Input                                                            </td>
410
             <td style="text-align: center;"> 1                                                                </td>
411
             <td style="vertical-align: top; text-align: center;">&lt;async&gt;<br>
412
      </td>
413
<td> Debug interface: UART RXD (asynchronous)                         </td>
414 166 olivier.gi
        </tr><tr>
415 202 olivier.gi
      <td><a href="#9.2%20I2C">dbg_i2c_addr</a></td>
416 166 olivier.gi
      <td style="text-align: center;">Input</td>
417
      <td style="text-align: center;"> 1</td>
418
      <td style="vertical-align: top; text-align: center;">mclk<br>
419
      </td>
420
 <td> Debug interface: I2C Address </td>
421
    </tr>
422
    <tr>
423 202 olivier.gi
      <td><a href="#9.2%20I2C">dbg_i2c_broadcast</a></td>
424 166 olivier.gi
      <td style="text-align: center;">Input</td>
425
      <td style="text-align: center;"> 1</td>
426
      <td style="vertical-align: top; text-align: center;">mclk<br>
427
      </td>
428
 <td> Debug interface: I2C Broadcast Address (for multicore only) </td>
429
    </tr>
430
    <tr>
431 202 olivier.gi
      <td><a href="#9.2%20I2C">dbg_i2c_scl</a></td>
432 166 olivier.gi
      <td style="text-align: center;">Input</td>
433
      <td style="text-align: center;"> 1</td>
434
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;</td>
435
 <td> Debug interface: I2C SCL </td>
436
    </tr>
437
    <tr>
438 202 olivier.gi
      <td><a href="#9.2%20I2C">dbg_i2c_sda_in</a></td>
439 166 olivier.gi
      <td style="text-align: center;">Input</td>
440
      <td style="text-align: center;"> 1</td>
441
      <td style="vertical-align: top; text-align: center;">&lt;async&gt;</td>
442
<td> Debug interface: I2C SDA input </td>
443
    </tr>
444
    <tr>
445 202 olivier.gi
      <td><a href="#9.2%20I2C">dbg_i2c_sda_out</a></td>
446 166 olivier.gi
      <td style="text-align: center;">Output</td>
447
      <td style="text-align: center;"> 1</td>
448
      <td style="vertical-align: top; text-align: center;">mclk<br>
449
      </td>
450
 <td> Debug interface: I2C SDA output </td>
451
    </tr>
452
<tr align="center">
453 135 olivier.gi
      <td colspan="5" rowspan="1" style="vertical-align: top;"><b><i>Scan</i></b></td>
454
    </tr>
455
    <tr>
456
      <td style="vertical-align: top;">scan_enable<br>
457
      </td>
458
      <td style="vertical-align: top; text-align: center;">Input<br>
459
      </td>
460
      <td style="vertical-align: top; text-align: center;">1<br>
461
      </td>
462
      <td style="vertical-align: top; text-align: center;">dco_clk<br>
463
      </td>
464
      <td style="vertical-align: top;">ASIC ONLY: Scan enable (active during scan shifting)</td>
465
    </tr>
466
    <tr>
467
      <td style="vertical-align: top;">scan_mode<br>
468
      </td>
469
      <td style="vertical-align: top; text-align: center;">Input<br>
470
      </td>
471
      <td style="vertical-align: top; text-align: center;">1<br>
472
      </td>
473
      <td style="vertical-align: top; text-align: center;">&lt;stable&gt;<br>
474
      </td>
475
      <td style="vertical-align: top;">ASIC ONLY: Scan mode</td>
476
    </tr>
477 50 olivier.gi
 
478 135 olivier.gi
</tbody></table>
479
<br>
480 195 olivier.gi
<span class="Apple-style-span" style="color: rgb(0, 0, 0); font-family: 'Times New Roman'; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; font-size: medium;"><b><sup><font color="#ff0000">1</font></sup></b>: This parameter is declared in the "openMSP430_defines.v" file and defines the RAM/ROM size or the number of interrupts vectors (16, 32 or 64).<br><b><sup><font color="#ff0000">2</font></sup></b>:
481 135 olivier.gi
These two optional ports can be connected whenever the program memory
482
is a RAM. This will allow the user to load a program through the serial
483
debug interface and to use software breakpoints.<br><b><sup><font color="#ff0000">3</font></sup></b>: When disabled, the debug interface is hold into reset (and clock gated in ASIC mode). As a consequence, the<span class="Apple-converted-space">&nbsp;</span><b><i>dbg_en</i></b><span class="Apple-converted-space">&nbsp;</span>port can be used to reset the debug interface without disrupting the CPU execution.<br><b><sup><font color="#ff0000">4</font></sup></b>: Clock domain is selectable through configuration in the "openMSP430_defines.v" file (see Advanced System Configuration).</span><sup></sup><br>
484
<br>
485 50 olivier.gi
 
486 135 olivier.gi
 
487 50 olivier.gi
<a name="2. Clocks"></a>
488 135 olivier.gi
<div style="text-align: right;"><a href="#TOC">Top</a></div>
489 50 olivier.gi
<h1>2. Clocks</h1>
490
 
491 135 olivier.gi
The different clocks in the design are managed by the Basic Clock Module as following in the FPGA configuration:
492
<br><br>
493 166 olivier.gi
<img src="http://opencores.org/usercontent,img,1319831724" alt="Clock structure diagram" title="Clock structure diagram" width="75%">
494 135 olivier.gi
<br>
495
<br>
496
or as following in the ASIC configuration:<br>
497
<br>
498 166 olivier.gi
<img src="http://opencores.org/usercontent,img,1319832480" alt="Clock structure diagram" title="Clock structure diagram" width="75%">
499 135 olivier.gi
<br>
500 50 olivier.gi
<ul>
501 116 olivier.gi
        <li>
502 135 olivier.gi
             <b><font color="#0000b0">CPU_EN</font></b>: this input port provides a hardware mean to stop or resume CPU execution. When unused, this port should be set to 1.
503
             <br><br>
504 116 olivier.gi
        </li>
505
        <li>
506 135 olivier.gi
             <b><font color="#0000b0">DCO_CLK</font></b>: this input port is typically connected to a PLL, RC oscillator or any clock resource the target FPGA/ASIC might provide.<br>For the FPGA configuration, from a synthesis tool perspective (ISE, Quartus, Libero, Design
507
Compiler...), this the only port where a clock needs to be declared. <br><br>
508 50 olivier.gi
        </li>
509 135 olivier.gi
 
510
  <li>
511
             <b><font color="#0000b0">LFXT_CLK</font></b>:
512
in an FPGA system, if ACLK_EN or SMCLK_EN are going to be used in the project (for example
513
through the Watchdog or TimerA peripherals), then this port needs to be
514
connected to a clock running at least two time slower as DCO_CLK
515
(typically 32kHz). It can be connected to 0 or 1 otherwise.<br>
516 166 olivier.gi
 
517 135 olivier.gi
In an ASIC, if ACLK or SMCLK are used and if the clock muxes are
518
included, then this port can be connected to any kind of clock source
519
(it doesn't need to be low-frequency. The name was just
520
kept to be consistent with TI's documentation).<br><br>
521 50 olivier.gi
        </li>
522 135 olivier.gi
 
523 50 olivier.gi
        <li>
524 135 olivier.gi
        <b><font color="#00b000">MCLK</font></b>:
525
the main system clock drives the complete openMSP430 clock domain,
526
including program/data memories and the peripheral interfaces. <br><br>
527 50 olivier.gi
        </li>
528
        <li>
529 135 olivier.gi
             <b><font color="#00b000">ACLK_EN / SMCLK_EN</font></b>:
530
these two clock enable signals can be used in order to emulate the
531
original ACLK and SMCLK from the MSP430 specification when the core is
532
targeting an FPGA.<br>
533
            An example of this can be found in the Watchdog and TimerA modules, where it is implemented as following:<br><br>
534 166 olivier.gi
<img src="http://opencores.org/usercontent,img,1246434793" alt="Clock implementation example" title="Clock implementation example"><br>
535 135 olivier.gi
</li>
536 50 olivier.gi
</ul>
537 135 olivier.gi
<ul>
538
  <li>
539
             <b><font color="#00b000">ACLK / SMCLK</font></b>: ACLK and MCLK are available through these two ports when targeting an ASIC.<br>&nbsp;</li>
540
  <li>
541
             <b><font color="#00b000">DCO_ENABLE / DCO_WKUP</font></b>: ASIC specific signals controlling the fast clock generator for low power mode support (SCG0 bit in the status register).<br><br></li>
542
  <li>
543
             <b><font color="#00b000">LFXT_ENABLE / LFXT_WKUP</font></b>:
544
ASIC specific signals controlling the low frequency clock generator for
545
low power mode support (OSCOFF bit in the status register).<br>&nbsp;</li>
546
  <li><b><font color="#0000b0">WKUP</font></b>:
547
When activated, this signal allows a peripheral to restore all CPU
548
clocks (i.e. wakeup the cpu) prior IRQ generation.&nbsp; Note that IRQs
549
MUST always be generated from the MCLK clock domain. </li>
550
</ul>
551 50 olivier.gi
 
552 135 olivier.gi
As an FPGA system illustration, the following waveform shows the different
553
clocks where the software running on the openMSP430 configures the
554
BCSCTL1 and BCSCTL2 registers so that <i>ACLK_EN</i> and <i>SMCLK_EN</i> are respectively running at <i>LFXT_CLK/2</i> and <i>DCO_CLK/4</i>.<br><br>
555 166 olivier.gi
<img src="http://opencores.org/usercontent,img,1263320613" alt="Waveforms: Clocks - Jan 12. 2010" title="Waveforms: Clocks - Jan 12. 2010" width="100%">
556 135 olivier.gi
<br><br>
557
 
558 50 olivier.gi
<a name="3. Resets"></a>
559 135 olivier.gi
<div style="text-align: right;"><a href="#TOC">Top</a></div>
560 50 olivier.gi
<h1>3. Resets</h1>
561
 
562
<ul>
563
        <li><b><font color="#0000b0">RESET_N</font></b>: this input port is typically connected to a board push button and is generally combined with the system power-on-reset.
564 135 olivier.gi
             <br><br>
565 50 olivier.gi
        </li>
566
        <li>
567 135 olivier.gi
            <b><font color="#00b000">PUC_RST</font></b>: the Power-Up-Clear signal is asynchronously set with the reset pin (<i>RESET_N</i>),
568
the watchdog reset or the serial debug interface reset. In order to get
569
clean timings, it is synchronously cleared with MCLK. As
570
a general rule, this signal should be used as the reset of the <i>MCLK</i> clock domain.
571
             <br><br>
572 50 olivier.gi
        </li>
573
</ul>
574 135 olivier.gi
The following waveform illustrates this:<br><br>
575 166 olivier.gi
<img src="http://opencores.org/usercontent,img,1263320655" alt="Waveforms: Resets - Jan 12. 2010" title="Waveforms: Resets - Jan 12. 2010" width="100%">
576 135 olivier.gi
 <br><br>
577 50 olivier.gi
 
578
<a name="4. Program Memory"></a>
579 135 olivier.gi
<div style="text-align: right;"><a href="#TOC">Top</a></div>
580 50 olivier.gi
<h1>4. Program Memory</h1>
581
 
582 135 olivier.gi
Depending on the project needs, the program memory can be either implemented as a ROM or RAM.<br>
583
<br>
584
If a ROM is selected then the <i>PMEM_DIN</i> and <i>PMEM_WEN</i>
585
ports won't be connected. In that case, the software debug capabilities
586
are limited because the serial debug interface can only use hardware
587
breakpoints in order to stop the program execution. In addition,
588
updating the software will require a reprogramming of the FPGA... or a new ROM mask for an ASIC.<br>
589
<br>
590
If the program memory is a RAM, the developer gets full flexibility
591
regarding software debugging. The serial debug interface can be used to
592
update the program memory and software breakpoints can be used.<br>
593
<br><br>
594 50 olivier.gi
That said, the protocol between the openMSP430 and the program memory is quite standard. Signal description goes as following:
595
<ul>
596
        <li><b><font color="#00b000">PMEM_CEN</font></b>: when this signal is active, the read/write access will be executed with the next <i>MCLK</i> rising edge. Note that this signal is LOW ACTIVE.
597 135 olivier.gi
             <br><br>
598 50 olivier.gi
        </li>
599
        <li>
600 135 olivier.gi
            <b><font color="#00b000">PMEM_ADDR</font></b>: Memory address of the 16 bit word which is going to be accessed.<br>
601 50 olivier.gi
            <b>Note:</b> in order to calculate the core logical address from the program memory physical address, the formula goes as following: <i>LOGICAL@=2*PHYSICAL@+0x10000-PMEM_SIZE</i>
602 135 olivier.gi
             <br><br>
603 50 olivier.gi
        </li>
604
        <li>
605
            <b><font color="#0000b0">PMEM_DOUT</font></b>: the memory output word will be updated with every valid read/write access (i.e. <i>PMEM_DOUT</i> is not updated if <i>PMEM_CEN</i>=1).
606 135 olivier.gi
             <br><br>
607 50 olivier.gi
        </li>
608
        <li>
609 135 olivier.gi
            <b><font color="#00b000">PMEM_WEN</font></b>:
610
this signal selects which byte should be written during a valid access.
611
PMEM_WEN[0] will activate a write on the lower byte, PMEM_WEN[1] a
612
write on the upper byte. Note that these signals are LOW ACTIVE. <br><br>
613 50 olivier.gi
        </li>
614
        <li>
615
            <b><font color="#00b000">PMEM_DIN</font></b>: the memory input word will be written with the valid write access according to the <i>PMEM_WEN</i> value.
616 135 olivier.gi
             <br><br>
617 50 olivier.gi
        </li>
618
</ul>
619 135 olivier.gi
The following waveform illustrates some read accesses of the program
620
memory (write access are illustrated in the data memory section):<br><br>
621 166 olivier.gi
<img src="http://opencores.org/usercontent,img,1263320706" alt="Waveforms: Program memory - Jan " title="Waveforms: Program memory - Jan " width="100%">
622 135 olivier.gi
<br><br>
623 50 olivier.gi
<a name="5. Data Memory"></a>
624 135 olivier.gi
<div style="text-align: right;"><a href="#TOC">Top</a></div>
625 50 olivier.gi
<h1>5. Data Memory</h1>
626
 
627 135 olivier.gi
The data memory is always implemented as a RAM.<br>
628
<br>
629
The protocol between the openMSP430 and the data memory is the same as
630
the one of the program memory. Therefore, the signal description is the
631
same:
632 50 olivier.gi
<ul>
633
        <li><b><font color="#00b000">DMEM_CEN</font></b>: when this signal is active, the read/write access will be executed with the next <i>MCLK</i> rising edge. Note that this signal is LOW ACTIVE.
634 135 olivier.gi
             <br><br>
635 50 olivier.gi
        </li>
636
        <li>
637 135 olivier.gi
            <b><font color="#00b000">DMEM_ADDR</font></b>: Memory address of the 16 bit word which is going to be accessed.<br>
638 50 olivier.gi
            <b>Note:</b> in order to calculate the core logical address from the data memory physical address, the formula goes as following: <i>LOGICAL@=2*PHYSICAL@+0x200</i>
639 135 olivier.gi
             <br><br>
640 50 olivier.gi
        </li>
641
        <li>
642
            <b><font color="#0000b0">DMEM_DOUT</font></b>: the memory output word will be updated with every valid read/write access (i.e. <i>DMEM_DOUT</i> is not updated if <i>DMEM_CEN</i>=1).
643 135 olivier.gi
             <br><br>
644 50 olivier.gi
        </li>
645
        <li>
646 135 olivier.gi
            <b><font color="#00b000">DMEM_WEN</font></b>:
647
this signal selects which byte should be written during a valid access.
648
DMEM_WEN[0] will activate a write on the lower byte, DMEM_WEN[1] a
649
write on the upper byte. Note that these signals are LOW ACTIVE. <br><br>
650 50 olivier.gi
        </li>
651
        <li>
652
            <b><font color="#00b000">DMEM_DIN</font></b>: the memory input word will be written with the valid write access according to the <i>DMEM_WEN</i> value.
653 135 olivier.gi
             <br><br>
654 50 olivier.gi
        </li>
655
</ul>
656 135 olivier.gi
The following waveform illustrates some read/write access to the data memory:<br><br>
657 166 olivier.gi
<img src="http://opencores.org/usercontent,img,1263320770" alt="Waveforms: Data memory - Jan 12." title="Waveforms: Data memory - Jan 12." width="100%">
658 135 olivier.gi
<br><br>
659 50 olivier.gi
 
660
<a name="6. Peripherals"></a>
661 135 olivier.gi
<div style="text-align: right;"><a href="#TOC">Top</a></div>
662 50 olivier.gi
<h1>6. Peripherals</h1>
663 135 olivier.gi
The protocol between the openMSP430 core and its peripherals is the
664
exactly same as the one with the data and program memories in regard
665
to write access and differs slightly for read access.<br>
666
<br>
667
On the connectivity side, the specificity is that the read data bus of
668
all peripherals should be ORed together before being connected to the
669
core, as showed in the diagram of the <a href="#1.%20Overview">Overview</a> section.<br>
670
From the logical point of view, during a read access, each peripheral
671
outputs the combinatorial value of its read mux and returns 0 if it
672
doesn't contain the addressed register. On the waveforms, this
673
translates by seeing the register value on <i>PER_DOUT</i> while <i>PER_EN</i> is valid and not one clock cycle afterward as it is the case with the program and data memories.<br>
674
In any case, it is recommended to use the templates provided with the core in order to develop your own custom peripherals.<br>
675 50 olivier.gi
The signal description therefore goes as following:
676
<ul>
677
        <li><b><font color="#00b000">PER_EN</font></b>: when this signal is active, read access are executed during the current <i>MCLK</i> cycle while write access will be executed with the next <i>MCLK</i> rising edge. Note that this signal is HIGH ACTIVE.
678 135 olivier.gi
             <br><br>
679 50 olivier.gi
        </li>
680
        <li>
681 135 olivier.gi
            <b><font color="#00b000">PER_ADDR</font></b>:
682
peripheral register address of the 16 bit word which is currently
683
accessed. It is to be noted that a 14 bit address will always be
684
provided from the openMSP430 to the peripheral in order to accommodate
685
the biggest possible PER_SIZE Verilog configuration option (i.e. 32kB
686
as opposed to 512B by default).<br>
687 50 olivier.gi
            <b>Note:</b> in order to calculate the core logical address from the peripheral register physical address, the formula goes as following: <i>LOGICAL@=2*PHYSICAL@</i>
688 135 olivier.gi
             <br><br>
689 50 olivier.gi
        </li>
690
        <li>
691
            <b><font color="#0000b0">PER_DOUT</font></b>: the peripheral output word will be updated with every valid read/write access, it will be set to 0 otherwise.
692 135 olivier.gi
             <br><br>
693 50 olivier.gi
        </li>
694
        <li>
695 135 olivier.gi
            <b><font color="#00b000">PER_WE</font></b>:
696
this signal selects which byte should be written during a valid access.
697
PER_WE[0] will activate a write on the lower byte, PER_WE[1] a write on
698
the upper byte. Note that these signals are HIGH ACTIVE. <br><br>
699 50 olivier.gi
        </li>
700
        <li>
701
            <b><font color="#00b000">PER_DIN</font></b>: the peripheral input word will be written with the valid write access according to the <i>PER_WEN</i> value.
702 135 olivier.gi
             <br><br>
703 50 olivier.gi
        </li>
704
</ul>
705 135 olivier.gi
The following waveform illustrates some read/write access to the peripheral registers:<br><br>
706 166 olivier.gi
<img src="http://opencores.org/usercontent,img,1263320825" alt="Waveforms: Peripherals - Jan 12." title="Waveforms: Peripherals - Jan 12." width="100%">
707 135 olivier.gi
<br><br>
708 50 olivier.gi
 
709 202 olivier.gi
<a name="7. DMA Interface"></a>
710
<div style="text-align: right;"><a href="#TOC">Top</a></div>
711
<h1>7. Direct Memory Access Interface</h1>
712
 
713
Before moving on, please note that further details about the DMA interface can
714
be found in its <a href="http://opencores.org/project,openmsp430,dma%20interface">dedicated section</a>.<br>
715
<br>
716
The protocol between the DMA interface master (DMA controller, bootloader, ...) and the openMSP430 core is similar
717
to the one followed between the openMSP430 and its data memory.
718
<br> However, it comes with a few additional features to support wait states, error response, priority and wakeup (for LPMx modes).<br>
719
<br>
720
The signal description goes as following:
721
<ul>
722
        <li><b><font color="#0000b0">DMA_EN</font></b>:
723
this signal enables a DMA transfer and can be released once the transfer is completed, as signaled by DMA_READY.
724
                <br><br>
725
        </li>
726
        <li>
727
            <b><font color="#0000b0">DMA_ADDR</font></b>:
728
Logical address of the 16bit word currently accessed by the interface. The address must stay valid until the transfer is completed, as signaled by DMA_READY.
729
<br><b>Note:</b> the integrated oMSP memory backbone module decode the specified <b>logical</b> DMA address and maps it accordingly to the <b>physical</b> address of the Program, Data or Peripheral memory.
730
             <br><br>
731
        </li>
732
        <li>
733
            <b><font color="#00b000">DMA_DOUT</font></b>:
734
When performing a read acces, the DMA data output is valid during the MCLK cycle immediately following the end of the transfer, as signaled by DMA_READY.
735
             <br><br>
736
        </li>
737
        <li>
738
            <b><font color="#0000b0">DMA_WE</font></b>:
739
This signal, asserted together with DMA_EN, allows to selects which byte should be written during the transfer.
740
DMA_WE[0] activates a write on the lower byte, DMA_WE[1] a write on the upper byte.<br><br>
741
        </li>
742
        <li>
743
            <b><font color="#0000b0">DMA_DIN</font></b>:
744
When performing a write access, the DMA data input must stay valid until the transfer is completed, as signaled by DMA ready.
745
             <br><br>
746
        </li>
747
        <li>
748
            <b><font color="#0000b0">DMA_PRIORITY</font></b>:
749
When <b>SET</b>, the oMSP memory backbone gives highest priority to the DMA transfer and stops CPU execution.
750
<br>When <b>CLEARED</b>, the oMSP memory backbone gives highest priority to CPU execution and the DMA transfer is completed only when the CPU doesn't access the targeted ressource (pmem, dmem or peripheral).
751
<br><b>Note</b>: a DMA controller can control the DMA data rate without stalling the CPU by dynamically asserting/deasserting the DMA_PRIORITY port between transfers.
752
             <br><br>
753
        </li>
754
        <li>
755
            <b><font color="#00b000">DMA_READY</font></b>:
756
This port signals that the current DMA transfer is completed.
757
<br><b>Note</b>: DMA_READY is typically hold low when the CPU owns the interface of the target ressource.
758
             <br><br>
759
        </li>
760
        <li>
761
            <b><font color="#00b000">DMA_RESP</font></b>:
762
This port signals if the current transfer was successful (0) or if an error occured (1) and is valid together with DMA_READY.
763
<br><b>Note</b>: an error is typically signaled when an access is performed outside of any memory mapped area (for example between Program and Data memory).
764
             <br><br>
765
        </li>
766
        <li>
767
            <b><font color="#0000b0">DMA_WKUP</font></b>:
768
For ASIC implementations supporting the Low-Power-Modes, this port is used to asynchronously restore the clocks before performing a DMA transfer.
769
<br><b>Note</b>: it is possible to control which clocks are restored during a DMA wakeup using the <b>BCSTL1</b> register of the Basic Clock Module.
770
             <br><br>
771
        </li>
772
</ul>
773
The following waveform illustrates some read/write access using the DMA interface:<br><br>
774
<img src="http://opencores.org/usercontent,img,1431293399" alt="Waveforms: DMA transfer" title="Waveforms: DMA transfer" width="100%">
775
<br><br>
776
 
777 50 olivier.gi
 
778 202 olivier.gi
<a name="8. Interrupts"></a>
779 135 olivier.gi
<div style="text-align: right;"><a href="#TOC">Top</a></div>
780 202 olivier.gi
<h1>8. Interrupts</h1> As with the original MSP430, the interrupt
781 135 olivier.gi
priorities of the openMSP430 are fixed in hardware accordingly to the
782
connectivity of the <i>NMI</i> and <i>IRQ</i> ports.<br>
783
If two interrupts are pending simultaneously, the higher priority interrupt will be serviced first.<br>
784
The following table summarize this:<br><br>
785 50 olivier.gi
<table border="1">
786 135 olivier.gi
<tbody><tr>
787 50 olivier.gi
   <td align="center"><b>&nbsp;&nbsp;Interrupt Port&nbsp;&nbsp;</b></td>
788
   <td align="center"><b>&nbsp;&nbsp;Vector address&nbsp;&nbsp;</b></td>
789
   <td align="center"><b>&nbsp;&nbsp;Priority&nbsp;&nbsp;</b></td>
790
</tr>
791
<tr>
792
   <td align="center">RESET_N</td>
793
   <td align="center">0xFFFE</td>
794
   <td align="center">15 (highest)</td>
795
</tr>
796
<tr>
797
   <td align="center">NMI</td>
798
   <td align="center">0xFFFC</td>
799
   <td align="center">14</td>
800
</tr>
801
<tr>
802
   <td align="center">IRQ[13]</td>
803
   <td align="center">0xFFFA</td>
804
   <td align="center">13</td>
805
</tr>
806
<tr>
807
   <td align="center">IRQ[12]</td>
808
   <td align="center">0xFFF8</td>
809
   <td align="center">12</td>
810
</tr>
811
<tr>
812
   <td align="center">IRQ[11]</td>
813
   <td align="center">0xFFF6</td>
814
   <td align="center">11</td>
815
</tr>
816
<tr>
817
   <td align="center">IRQ[10]</td>
818
   <td align="center">0xFFF4</td>
819
   <td align="center">10</td>
820
</tr>
821
<tr>
822
   <td align="center">IRQ[9]</td>
823
   <td align="center">0xFFF2</td>
824
   <td align="center">9</td>
825
</tr>
826
<tr>
827
   <td align="center">IRQ[8]</td>
828
   <td align="center">0xFFF0</td>
829
   <td align="center">8</td>
830
</tr>
831
<tr>
832
   <td align="center">IRQ[7]</td>
833
   <td align="center">0xFFEE</td>
834
   <td align="center">7</td>
835
</tr>
836
<tr>
837
   <td align="center">IRQ[6]</td>
838
   <td align="center">0xFFEC</td>
839
   <td align="center">6</td>
840
</tr>
841
<tr>
842
   <td align="center">IRQ[5]</td>
843
   <td align="center">0xFFEA</td>
844
   <td align="center">5</td>
845
</tr>
846
<tr>
847
   <td align="center">IRQ[4]</td>
848
   <td align="center">0xFFE8</td>
849
   <td align="center">4</td>
850
</tr>
851
<tr>
852
   <td align="center">IRQ[3]</td>
853
   <td align="center">0xFFE6</td>
854
   <td align="center">3</td>
855
</tr>
856
<tr>
857
   <td align="center">IRQ[2]</td>
858
   <td align="center">0xFFE4</td>
859
   <td align="center">2</td>
860
</tr>
861
<tr>
862
   <td align="center">IRQ[1]</td>
863
   <td align="center">0xFFE2</td>
864
   <td align="center">1</td>
865
</tr>
866
<tr>
867
   <td align="center">IRQ[0]</td>
868
   <td align="center">0xFFE0</td>
869
   <td align="center">0 (lowest)</td>
870
</tr>
871 135 olivier.gi
</tbody></table>
872
<br><br>
873 50 olivier.gi
The signal description goes as following:
874
<ul>
875
        <li>
876 135 olivier.gi
            <b><font color="#0000b0">NMI</font></b>: The <b>N</b>on-<b>M</b>askable <b>I</b>nterrupt has higher priority than other IRQs and is masked by the NMIIE bit instead of GIE.<br>
877
It is internally synchronized to the <i>MCLK</i>
878
domain and can therefore be connected to any asynchronous signal of the
879
chip (which could for example be a pin of the FPGA). If unused, this
880
signal should be connected to 0. <br><br>
881 50 olivier.gi
        </li>
882
        <li>
883 135 olivier.gi
            <b><font color="#0000b0">IRQ</font></b>: The standard interrupts can be connected to any signal coming from the <i>MCLK</i> domain (typically a peripheral). Priorities can be chosen by selecting the proper bit of the <i>IRQ</i> bus as shown in the table above. Unused interrupts should be connected to 0.<br>
884
<b>Note</b>: <i>IRQ[10]</i> is internally connected to the Watchdog
885
interrupt. If this bit is also used by an external peripheral, they
886
will both share the same interrupt vector. <br><br>
887 50 olivier.gi
        </li>
888
        <li>
889 135 olivier.gi
            <b><font color="#00b000">IRQ_ACC</font></b>:
890
Whenever an interrupt request is serviced, some peripheral
891
automatically clear their pending flag in hardware. In order to do so,
892
the <i>IRQ_ACC</i> bus can be used by using the bit matching the corresponding <i>IRQ</i> bit. An example of this is shown in the implementation of the TACCR0 Timer A interrupt.
893
            <br><br>
894 50 olivier.gi
        </li>
895
</ul>
896 135 olivier.gi
The following waveform illustrates a TAIV interrupt issued by the Timer-A, which is connected to <i>IRQ[8]</i> :<br><br>
897 166 olivier.gi
<img src="http://opencores.org/usercontent,img,1263320861" alt="Waveforms: Interrupts - Jan 12. " title="Waveforms: Interrupts - Jan 12. " width="100%">
898 50 olivier.gi
 
899 135 olivier.gi
<br><br>
900 50 olivier.gi
 
901
 
902 202 olivier.gi
<a name="9. Serial Debug Interface"></a>
903 135 olivier.gi
<div style="text-align: right;"><a href="#TOC">Top</a></div>
904 202 olivier.gi
<h1>9. Serial Debug Interface</h1>
905 135 olivier.gi
The serial debug interface module provides a two-wires communication
906 166 olivier.gi
bus (UART or I2C) for remote debugging and an additional freeze signal which might be
907 135 olivier.gi
useful for some peripherals (typically timers).<br>
908
<br>
909 50 olivier.gi
<ul>
910
        <li>
911 135 olivier.gi
            <b><font color="#0000b0">DBG_EN</font></b>: this signal
912
allows the user to enable or disable the serial debug interface without
913
interfering with the CPU execution. It is to be noted that when
914
disabled (i.e. DBG_EN=0), the debug interface is held into reset. <br><br>
915 116 olivier.gi
        </li>
916
        <li>
917 135 olivier.gi
            <b><font color="#00b000">DBG_FREEZE</font></b>: this signal will be set whenever the debug interface stops the CPU (and if the <i>FRZ_BRK_EN</i> field of the <a href="http://www.opencores.org/project,openmsp430,serial%20debug%20interface#2.2.2%20CPU_CTL">CPU_CTL</a> debug register is set). As its name implies, the purpose of <i>DBG_FREEZE</i> is to freeze a peripheral whenever the CPU is stopped by the software debugger.<br>
918
For example, it is used by the Watchdog timer in order to stop its
919
free-running counter. This prevents the CPU from being reseted by the
920
watchdog every times the user stops the CPU during a debugging session.
921
<br><br>
922 50 olivier.gi
        </li>
923 166 olivier.gi
</ul>
924 202 olivier.gi
<a name="9.1 UART"></a>
925
<h2>9.1 UART Configuration</h2>
926 166 olivier.gi
<ul>
927 50 olivier.gi
        <li>
928
            <b><font color="#00b000">DBG_UART_TXD</font>&nbsp;/&nbsp;<font color="#0000b0">DBG_UART_RXD</font></b>: these signals are typically connected to an RS-232 transceiver and will allow a PC to communicate with the openMSP430 core.
929 135 olivier.gi
            <br><br>
930 50 olivier.gi
        </li>
931
</ul>
932 166 olivier.gi
The following waveform shows some communication traffic on the UART serial bus :<br><br>
933
<img src="http://opencores.org/usercontent,img,1263320887" alt="Waveforms: SDI - Jan 12. 2010" title="Waveforms: SDI - Jan 12. 2010" width="100%">
934 135 olivier.gi
<br><br>
935 202 olivier.gi
<a name="9.2 I2C"></a>
936
<h2>9.2 I2C Configuration</h2>
937 166 olivier.gi
<ul>
938
        <li>
939
            <b><font color="#0000b0">DBG_I2C_ADDR</font></b>: I2C Device address of the oMSP core (between 8 and 119). In a multi-core configuration each core has its own address.
940
            <br><br>
941
        </li>
942
        <li>
943
            <b><font color="#0000b0">DBG_I2C_BROADCAST</font></b>:
944
I2C Device broadcast address of the oMSP core (between 8 and 119). In a
945
multi-core configuration all cores have the same broadcast address. <br><br>
946
        </li>
947
        <li>
948
            <b><font color="#0000b0">DBG_I2C_SCL</font></b>: I2C bus clock input (SCL).
949
            <br><br>
950
        </li>
951
        <li>
952
            <b><font color="#00b000">DBG_I2C_SDA_OUT</font>&nbsp;/&nbsp;<font color="#0000b0">DBG_I2C_SDA_IN</font></b>: these signals are connected to the SDA I/O cell as following:<br><br>
953
    <div style="text-align: center;"><img src="http://opencores.org/usercontent,img,1353268717" alt="I2C SDA IO Connect" title="I2C SDA IO Connect" width="50%">
954
            <br>
955
    </div>
956
<br>
957
        </li>
958
</ul>
959
 
960
The following waveform shows some communication traffic on the I2C serial bus :<br><br>
961
<img src="http://opencores.org/usercontent,img,1353272928" alt="Waveforms: SDI I2C" title="Waveforms: SDI I2C" width="100%">
962
<br><br>
963
<div style="text-align: right;"><a href="#TOC">Top</a></div>
964
 
965 135 olivier.gi
</body></html>

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.