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//----------------------------------------------------------------------------
// Copyright (C) 2001 Authors
//
// This source file may be used and distributed without restriction provided
// that this copyright statement is not removed from the file and that any
// derivative work contains the original copyright notice and the associated
// disclaimer.
//
// This source file is free software; you can redistribute it and/or modify
// it under the terms of the GNU Lesser General Public License as published
// by the Free Software Foundation; either version 2.1 of the License, or
// (at your option) any later version.
//
// This source is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
// License for more details.
//
// You should have received a copy of the GNU Lesser General Public License
// along with this source; if not, write to the Free Software Foundation,
// Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
//
//----------------------------------------------------------------------------
// 
// *File Name: openMSP430_defines.v
// 
// *Module Description:
//                      openMSP430 Configuration file
//
// *Author(s):
//              - Olivier Girard,    olgirard@gmail.com
//
//----------------------------------------------------------------------------
// $Rev: 103 $
// $LastChangedBy: olivier.girard $
// $LastChangedDate: 2011-03-05 15:44:48 +0100 (Sat, 05 Mar 2011) $
//----------------------------------------------------------------------------
//`define OMSP_NO_INCLUDE
`ifdef OMSP_NO_INCLUDE
`else
`include "openMSP430_undefines.v"
`endif
 
//============================================================================
//============================================================================
// BASIC SYSTEM CONFIGURATION
//============================================================================
//============================================================================
//
// Note: the sum of program, data and peripheral memory spaces must not
//      exceed 64 kB
//
 
// Program Memory Size:
//                     Uncomment the required memory size
//-------------------------------------------------------
//`define PMEM_SIZE_59_KB
//`define PMEM_SIZE_55_KB
//`define PMEM_SIZE_54_KB
//`define PMEM_SIZE_51_KB
//`define PMEM_SIZE_48_KB
//`define PMEM_SIZE_41_KB
//`define PMEM_SIZE_32_KB
//`define PMEM_SIZE_24_KB
//`define PMEM_SIZE_16_KB
//`define PMEM_SIZE_12_KB
//`define PMEM_SIZE_8_KB
`define PMEM_SIZE_4_KB
//`define PMEM_SIZE_2_KB
//`define PMEM_SIZE_1_KB
 
 
// Data Memory Size:
//                     Uncomment the required memory size
//-------------------------------------------------------
//`define DMEM_SIZE_32_KB
//`define DMEM_SIZE_24_KB
//`define DMEM_SIZE_16_KB
//`define DMEM_SIZE_10_KB
//`define DMEM_SIZE_8_KB
//`define DMEM_SIZE_5_KB
//`define DMEM_SIZE_4_KB
//`define DMEM_SIZE_2p5_KB
//`define DMEM_SIZE_2_KB
//`define DMEM_SIZE_1_KB
//`define DMEM_SIZE_512_B
`define DMEM_SIZE_256_B
//`define DMEM_SIZE_128_B
 
 
// Include/Exclude Hardware Multiplier
//`define MULTIPLIER
 
 
// Include/Exclude Serial Debug interface
`define DBG_EN
 
 
//============================================================================
//============================================================================
// ADVANCED SYSTEM CONFIGURATION (FOR EXPERIENCED USERS)
//============================================================================
//============================================================================
 
//-------------------------------------------------------
// Peripheral Memory Space:
//-------------------------------------------------------
// The original MSP430 architecture map the peripherals
// from 0x0000 to 0x01FF (i.e. 512B of the memory space).
// The following defines allow you to expand this space
// up to 32 kB (i.e. from 0x0000 to 0x7fff).
// As a consequence, the data memory mapping will be
// shifted up and a custom linker script will therefore
// be required by the GCC compiler.
//-------------------------------------------------------
//`define PER_SIZE_32_KB
//`define PER_SIZE_16_KB
//`define PER_SIZE_8_KB
//`define PER_SIZE_4_KB
//`define PER_SIZE_2_KB
//`define PER_SIZE_1_KB
`define PER_SIZE_512_B
 
 
//-------------------------------------------------------
// Defines the debugger CPU_CTL.RST_BRK_EN reset value
// (CPU break on PUC reset)
//-------------------------------------------------------
// When defined, the CPU will automatically break after
// a PUC occurrence by default. This is typically usefull
// when the program memory can only be initialized through
// the serial debug interface.
//-------------------------------------------------------
//`define DBG_RST_BRK_EN
 
 
//-------------------------------------------------------
// Custom user version number
//-------------------------------------------------------
// This 5 bit field can be freely used in order to allow
// custom identification of the system through the debug
// interface.
// (see CPU_ID.USER_VERSION field in the documentation)
//-------------------------------------------------------
`define USER_VERSION 5'b00011
 
 
//============================================================================
//============================================================================
// EXPERT SYSTEM CONFIGURATION ( !!!! EXPERTS ONLY !!!! )
//============================================================================
//============================================================================
//
// IMPORTANT NOTE:  Please update following configuration options ONLY if
//                 you have a good reason to do so... and if you know what
//                 you are doing :-P
//
//============================================================================
 
//-------------------------------------------------------
// Number of hardware breakpoint units (each unit contains
// two hardware address breakpoints):
//   - DBG_HWBRK_0 -> Include hardware breakpoints unit 0
//   - DBG_HWBRK_1 -> Include hardware breakpoints unit 1
//   - DBG_HWBRK_2 -> Include hardware breakpoints unit 2
//   - DBG_HWBRK_3 -> Include hardware breakpoints unit 3
//-------------------------------------------------------
// Please keep in mind that hardware breakpoints only
// make sense whenever the program memory is not an SRAM
// (i.e. Flash/OTP/ROM/...) or when you are interested
// in data breakpoints (btw. not supported by GDB).
//-------------------------------------------------------
//`define  DBG_HWBRK_0
//`define  DBG_HWBRK_1
//`define  DBG_HWBRK_2
//`define  DBG_HWBRK_3
 
 
//-------------------------------------------------------
// Enable/Disable the hardware breakpoint RANGE mode
//-------------------------------------------------------
// When enabled this feature allows the hardware breakpoint
// units to stop the cpu whenever an instruction or data
// access lays within an address range.
// Note that this feature is not supported by GDB.
//-------------------------------------------------------
//`define DBG_HWBRK_RANGE
 
 
//-------------------------------------------------------
// Input synchronizers
//-------------------------------------------------------
// In some cases, the asynchronous input ports might
// already be synchronized externally.
// If an extensive CDC design review showed that this
// is really the case,  the individual synchronizers
// can be disabled with the following defines.
//
// Notes:
//        - the dbg_en signal will reset the debug interface
//         when 0. Therefore make sure it is glitch free.
//
//        - the dbg_uart_rxd synchronizer must be set to 1
//          when its reset is active.
//-------------------------------------------------------
`define SYNC_CPU_EN
`define SYNC_DBG_EN
`define SYNC_DBG_UART_RXD
`define SYNC_NMI
 
 
 
//==========================================================================//
//==========================================================================//
//==========================================================================//
//==========================================================================//
//=====        SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!!      =====//
//==========================================================================//
//==========================================================================//
//==========================================================================//
//==========================================================================//
 
//
// PROGRAM, DATA & PERIPHERAL MEMORY CONFIGURATION
//==================================================
 
// Program Memory Size
`ifdef PMEM_SIZE_59_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     60416
`endif
`ifdef PMEM_SIZE_55_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     56320
`endif
`ifdef PMEM_SIZE_54_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     55296
`endif
`ifdef PMEM_SIZE_51_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     52224
`endif
`ifdef PMEM_SIZE_48_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     49152
`endif
`ifdef PMEM_SIZE_41_KB
  `define PMEM_AWIDTH      15
  `define PMEM_SIZE     41984
`endif
`ifdef PMEM_SIZE_32_KB
  `define PMEM_AWIDTH      14
  `define PMEM_SIZE     32768
`endif
`ifdef PMEM_SIZE_24_KB
  `define PMEM_AWIDTH      14
  `define PMEM_SIZE     24576
`endif
`ifdef PMEM_SIZE_16_KB
  `define PMEM_AWIDTH      13
  `define PMEM_SIZE     16384
`endif
`ifdef PMEM_SIZE_12_KB
  `define PMEM_AWIDTH      13
  `define PMEM_SIZE     12288
`endif
`ifdef PMEM_SIZE_8_KB
  `define PMEM_AWIDTH      12
  `define PMEM_SIZE      8192
`endif
`ifdef PMEM_SIZE_4_KB
  `define PMEM_AWIDTH      11
  `define PMEM_SIZE      4096
`endif
`ifdef PMEM_SIZE_2_KB
  `define PMEM_AWIDTH      10
  `define PMEM_SIZE      2048
`endif
`ifdef PMEM_SIZE_1_KB
  `define PMEM_AWIDTH       9
  `define PMEM_SIZE      1024
`endif
 
// Data Memory Size
`ifdef DMEM_SIZE_32_KB
  `define DMEM_AWIDTH       14
  `define DMEM_SIZE      32768
`endif
`ifdef DMEM_SIZE_24_KB
  `define DMEM_AWIDTH       14
  `define DMEM_SIZE      24576
`endif
`ifdef DMEM_SIZE_16_KB
  `define DMEM_AWIDTH       13
  `define DMEM_SIZE      16384
`endif
`ifdef DMEM_SIZE_10_KB
  `define DMEM_AWIDTH       13
  `define DMEM_SIZE      10240
`endif
`ifdef DMEM_SIZE_8_KB
  `define DMEM_AWIDTH       12
  `define DMEM_SIZE       8192
`endif
`ifdef DMEM_SIZE_5_KB
  `define DMEM_AWIDTH       12
  `define DMEM_SIZE       5120
`endif
`ifdef DMEM_SIZE_4_KB
  `define DMEM_AWIDTH       11
  `define DMEM_SIZE       4096
`endif
`ifdef DMEM_SIZE_2p5_KB
  `define DMEM_AWIDTH       11
  `define DMEM_SIZE       2560
`endif
`ifdef DMEM_SIZE_2_KB
  `define DMEM_AWIDTH       10
  `define DMEM_SIZE       2048
`endif
`ifdef DMEM_SIZE_1_KB
  `define DMEM_AWIDTH        9
  `define DMEM_SIZE       1024
`endif
`ifdef DMEM_SIZE_512_B
  `define DMEM_AWIDTH        8
  `define DMEM_SIZE        512
`endif
`ifdef DMEM_SIZE_256_B
  `define DMEM_AWIDTH        7
  `define DMEM_SIZE        256
`endif
`ifdef DMEM_SIZE_128_B
  `define DMEM_AWIDTH        6
  `define DMEM_SIZE        128
`endif
 
// Peripheral Memory Size
`ifdef PER_SIZE_32_KB
  `define PER_AWIDTH        14
  `define PER_SIZE       32768
`endif
`ifdef PER_SIZE_16_KB
  `define PER_AWIDTH        13
  `define PER_SIZE       16384
`endif
`ifdef PER_SIZE_8_KB
  `define PER_AWIDTH        12
  `define PER_SIZE        8192
`endif
`ifdef PER_SIZE_4_KB
  `define PER_AWIDTH        11
  `define PER_SIZE        4096
`endif
`ifdef PER_SIZE_2_KB
  `define PER_AWIDTH        10
  `define PER_SIZE        2048
`endif
`ifdef PER_SIZE_1_KB
  `define PER_AWIDTH         9
  `define PER_SIZE        1024
`endif
`ifdef PER_SIZE_512_B
  `define PER_AWIDTH         8
  `define PER_SIZE         512
`endif
 
// Data Memory Base Adresses
`define DMEM_BASE  `PER_SIZE
 
// Program & Data Memory most significant address bit (for 16 bit words)
`define PMEM_MSB   `PMEM_AWIDTH-1
`define DMEM_MSB   `DMEM_AWIDTH-1
`define PER_MSB    `PER_AWIDTH-1
 
//
// STATES, REGISTER FIELDS, ...
//======================================
 
// Instructions type
`define INST_SO  0
`define INST_JMP 1
`define INST_TO  2
 
// Single-operand arithmetic
`define RRC    0
`define SWPB   1
`define RRA    2
`define SXT    3
`define PUSH   4
`define CALL   5
`define RETI   6
`define IRQ    7
 
// Conditional jump
`define JNE    0
`define JEQ    1
`define JNC    2
`define JC     3
`define JN     4
`define JGE    5
`define JL     6
`define JMP    7
 
// Two-operand arithmetic
`define MOV    0
`define ADD    1
`define ADDC   2
`define SUBC   3
`define SUB    4
`define CMP    5
`define DADD   6
`define BIT    7
`define BIC    8
`define BIS    9
`define XOR   10
`define AND   11
 
// Addressing modes
`define DIR      0
`define IDX      1
`define INDIR    2
`define INDIR_I  3
`define SYMB     4
`define IMM      5
`define ABS      6
`define CONST    7
 
// Instruction state machine
`define I_IRQ_FETCH 3'h0
`define I_IRQ_DONE  3'h1
`define I_DEC       3'h2
`define I_EXT1      3'h3
`define I_EXT2      3'h4
`define I_IDLE      3'h5
 
// Execution state machine
`define E_IRQ_0     4'h0
`define E_IRQ_1     4'h1
`define E_IRQ_2     4'h2
`define E_IRQ_3     4'h3
`define E_IRQ_4     4'h4
`define E_SRC_AD    4'h5
`define E_SRC_RD    4'h6
`define E_SRC_WR    4'h7
`define E_DST_AD    4'h8
`define E_DST_RD    4'h9
`define E_DST_WR    4'hA
`define E_EXEC      4'hB
`define E_JUMP      4'hC
`define E_IDLE      4'hD
 
// ALU control signals
`define ALU_SRC_INV   0
`define ALU_INC       1
`define ALU_INC_C     2
`define ALU_ADD       3
`define ALU_AND       4
`define ALU_OR        5
`define ALU_XOR       6
`define ALU_DADD      7
`define ALU_STAT_7    8
`define ALU_STAT_F    9
`define ALU_SHIFT    10
`define EXEC_NO_WR   11
 
// Debug interface
`define DBG_UART_WR   18
`define DBG_UART_BW   17
`define DBG_UART_ADDR 16:11
 
// Debug interface CPU_CTL register
`define HALT        0
`define RUN         1
`define ISTEP       2
`define SW_BRK_EN   3
`define FRZ_BRK_EN  4
`define RST_BRK_EN  5
`define CPU_RST     6
 
// Debug interface CPU_STAT register
`define HALT_RUN    0
`define PUC_PND     1
`define SWBRK_PND   3
`define HWBRK0_PND  4
`define HWBRK1_PND  5
 
// Debug interface BRKx_CTL register
`define BRK_MODE_RD 0
`define BRK_MODE_WR 1
`define BRK_MODE    1:0
`define BRK_EN      2
`define BRK_I_EN    3
`define BRK_RANGE   4
 
// Basic clock module: BCSCTL1 Control Register
`define DIVAx       5:4
 
// Basic clock module: BCSCTL2 Control Register
`define SELS        3
`define DIVSx       2:1
 
 
//
// DEBUG INTERFACE EXTRA CONFIGURATION
//======================================
 
// Debug interface: CPU version
`define CPU_VERSION   3'h1
 
// Debug interface: Software breakpoint opcode
`define DBG_SWBRK_OP 16'h4343
 
// Debug UART interface auto data synchronization
// If the following define is commented out, then
// the DBG_UART_BAUD and DBG_DCO_FREQ need to be properly
// defined.
`define DBG_UART_AUTO_SYNC
 
// Debug UART interface data rate
//      In order to properly setup the UART debug interface, you
//      need to specify the DCO_CLK frequency (DBG_DCO_FREQ) and
//      the chosen BAUD rate from the UART interface.
//
//`define DBG_UART_BAUD    9600
//`define DBG_UART_BAUD   19200
//`define DBG_UART_BAUD   38400
//`define DBG_UART_BAUD   57600
//`define DBG_UART_BAUD  115200
//`define DBG_UART_BAUD  230400
//`define DBG_UART_BAUD  460800
//`define DBG_UART_BAUD  576000
//`define DBG_UART_BAUD  921600
`define DBG_UART_BAUD 2000000
`define DBG_DCO_FREQ  20000000
`define DBG_UART_CNT ((`DBG_DCO_FREQ/`DBG_UART_BAUD)-1)
 
// Debug interface selection
//             `define DBG_UART -> Enable UART (8N1) debug interface
//             `define DBG_JTAG -> DON'T UNCOMMENT, NOT SUPPORTED
//
`define DBG_UART
//`define DBG_JTAG
 
// Enable/Disable the hardware breakpoint RANGE mode
`ifdef DBG_HWBRK_RANGE
 `define HWBRK_RANGE 1'b1
`else
 `define HWBRK_RANGE 1'b0
`endif
 
// Counter width for the debug interface UART
`define DBG_UART_XFER_CNT_W 16
 
// Check configuration
`ifdef DBG_EN
 `ifdef DBG_UART
   `ifdef DBG_JTAG
CONFIGURATION ERROR: JTAG AND UART DEBUG INTERFACE ARE BOTH ENABLED
   `endif
 `else
   `ifdef DBG_JTAG
CONFIGURATION ERROR: JTAG INTERFACE NOT SUPPORTED
   `else
CONFIGURATION ERROR: JTAG OR UART DEBUG INTERFACE SHOULD BE ENABLED
   `endif
 `endif
`endif
 
//
// MULTIPLIER CONFIGURATION
//======================================
 
// If uncommented, the following define selects
// the 16x16 multiplier (1 cycle) instead of the
// default 16x8 multplier (2 cycles)
//`define MPY_16x16
 

Line No.	Rev	Author	Line
1	80	olivier.gi	`//----------------------------------------------------------------------------`
2			`// Copyright (C) 2001 Authors`
3			`//`
4			`// This source file may be used and distributed without restriction provided`
5			`// that this copyright statement is not removed from the file and that any`
6			`// derivative work contains the original copyright notice and the associated`
7			`// disclaimer.`
8			`//`
9			`// This source file is free software; you can redistribute it and/or modify`
10			`// it under the terms of the GNU Lesser General Public License as published`
11			`// by the Free Software Foundation; either version 2.1 of the License, or`
12			`// (at your option) any later version.`
13			`//`
14			`// This source is distributed in the hope that it will be useful, but WITHOUT`
15			`// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or`
16			`// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public`
17			`// License for more details.`
18			`//`
19			`// You should have received a copy of the GNU Lesser General Public License`
20			`// along with this source; if not, write to the Free Software Foundation,`
21			`// Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA`
22			`//`
23			`//----------------------------------------------------------------------------`
24			`//`
25			`// *File Name: openMSP430_defines.v`
26			`//`
27			`// *Module Description:`
28			`// openMSP430 Configuration file`
29			`//`
30			`// *Author(s):`
31			`// - Olivier Girard, olgirard@gmail.com`
32			`//`
33			`//----------------------------------------------------------------------------`
34	104	olivier.gi	`// $Rev: 103 $`
35	80	olivier.gi	`// $LastChangedBy: olivier.girard $`
36	104	olivier.gi	`// $LastChangedDate: 2011-03-05 15:44:48 +0100 (Sat, 05 Mar 2011) $`
37	80	olivier.gi	`//----------------------------------------------------------------------------`
38	104	olivier.gi	//`define OMSP_NO_INCLUDE
39			`ifdef OMSP_NO_INCLUDE
40			`else
41	80	olivier.gi	`include "openMSP430_undefines.v"
42	104	olivier.gi	`endif
43	80	olivier.gi
44	111	olivier.gi	`//============================================================================`
45			`//============================================================================`
46			`// BASIC SYSTEM CONFIGURATION`
47			`//============================================================================`
48			`//============================================================================`
49	80	olivier.gi	`//`
50	111	olivier.gi	`// Note: the sum of program, data and peripheral memory spaces must not`
51			`// exceed 64 kB`
52	80	olivier.gi	`//`
53
54			`// Program Memory Size:`
55			`// Uncomment the required memory size`
56			`//-------------------------------------------------------`
57			//`define PMEM_SIZE_59_KB
58			//`define PMEM_SIZE_55_KB
59			//`define PMEM_SIZE_54_KB
60			//`define PMEM_SIZE_51_KB
61			//`define PMEM_SIZE_48_KB
62			//`define PMEM_SIZE_41_KB
63			//`define PMEM_SIZE_32_KB
64			//`define PMEM_SIZE_24_KB
65			//`define PMEM_SIZE_16_KB
66			//`define PMEM_SIZE_12_KB
67			//`define PMEM_SIZE_8_KB
68			`define PMEM_SIZE_4_KB
69			//`define PMEM_SIZE_2_KB
70			//`define PMEM_SIZE_1_KB
71
72	111	olivier.gi
73	80	olivier.gi	`// Data Memory Size:`
74			`// Uncomment the required memory size`
75			`//-------------------------------------------------------`
76			//`define DMEM_SIZE_32_KB
77			//`define DMEM_SIZE_24_KB
78			//`define DMEM_SIZE_16_KB
79			//`define DMEM_SIZE_10_KB
80			//`define DMEM_SIZE_8_KB
81			//`define DMEM_SIZE_5_KB
82			//`define DMEM_SIZE_4_KB
83			//`define DMEM_SIZE_2p5_KB
84			//`define DMEM_SIZE_2_KB
85			//`define DMEM_SIZE_1_KB
86			//`define DMEM_SIZE_512_B
87			`define DMEM_SIZE_256_B
88			//`define DMEM_SIZE_128_B
89
90	111	olivier.gi
91	80	olivier.gi	`// Include/Exclude Hardware Multiplier`
92			//`define MULTIPLIER
93
94
95	111	olivier.gi	`// Include/Exclude Serial Debug interface`
96	80	olivier.gi	`define DBG_EN
97
98	111	olivier.gi
99			`//============================================================================`
100			`//============================================================================`
101			`// ADVANCED SYSTEM CONFIGURATION (FOR EXPERIENCED USERS)`
102			`//============================================================================`
103			`//============================================================================`
104
105			`//-------------------------------------------------------`
106			`// Peripheral Memory Space:`
107			`//-------------------------------------------------------`
108			`// The original MSP430 architecture map the peripherals`
109			`// from 0x0000 to 0x01FF (i.e. 512B of the memory space).`
110			`// The following defines allow you to expand this space`
111			`// up to 32 kB (i.e. from 0x0000 to 0x7fff).`
112			`// As a consequence, the data memory mapping will be`
113			`// shifted up and a custom linker script will therefore`
114			`// be required by the GCC compiler.`
115			`//-------------------------------------------------------`
116			//`define PER_SIZE_32_KB
117			//`define PER_SIZE_16_KB
118			//`define PER_SIZE_8_KB
119			//`define PER_SIZE_4_KB
120			//`define PER_SIZE_2_KB
121			//`define PER_SIZE_1_KB
122			`define PER_SIZE_512_B
123
124
125			`//-------------------------------------------------------`
126			`// Defines the debugger CPU_CTL.RST_BRK_EN reset value`
127			`// (CPU break on PUC reset)`
128			`//-------------------------------------------------------`
129			`// When defined, the CPU will automatically break after`
130			`// a PUC occurrence by default. This is typically usefull`
131			`// when the program memory can only be initialized through`
132			`// the serial debug interface.`
133			`//-------------------------------------------------------`
134			//`define DBG_RST_BRK_EN
135
136
137			`//-------------------------------------------------------`
138			`// Custom user version number`
139			`//-------------------------------------------------------`
140			`// This 5 bit field can be freely used in order to allow`
141	112	olivier.gi	`// custom identification of the system through the debug`
142			`// interface.`
143	111	olivier.gi	`// (see CPU_ID.USER_VERSION field in the documentation)`
144			`//-------------------------------------------------------`
145			`define USER_VERSION 5'b00011
146
147
148			`//============================================================================`
149			`//============================================================================`
150			`// EXPERT SYSTEM CONFIGURATION ( !!!! EXPERTS ONLY !!!! )`
151			`//============================================================================`
152			`//============================================================================`
153	80	olivier.gi	`//`
154	111	olivier.gi	`// IMPORTANT NOTE: Please update following configuration options ONLY if`
155			`// you have a good reason to do so... and if you know what`
156			`// you are doing :-P`
157			`//`
158			`//============================================================================`
159	80	olivier.gi
160	111	olivier.gi	`//-------------------------------------------------------`
161			`// Number of hardware breakpoint units (each unit contains`
162			`// two hardware address breakpoints):`
163			`// - DBG_HWBRK_0 -> Include hardware breakpoints unit 0`
164			`// - DBG_HWBRK_1 -> Include hardware breakpoints unit 1`
165			`// - DBG_HWBRK_2 -> Include hardware breakpoints unit 2`
166			`// - DBG_HWBRK_3 -> Include hardware breakpoints unit 3`
167			`//-------------------------------------------------------`
168			`// Please keep in mind that hardware breakpoints only`
169			`// make sense whenever the program memory is not an SRAM`
170			`// (i.e. Flash/OTP/ROM/...) or when you are interested`
171			`// in data breakpoints (btw. not supported by GDB).`
172			`//-------------------------------------------------------`
173			//`define DBG_HWBRK_0
174	80	olivier.gi	//`define DBG_HWBRK_1
175			//`define DBG_HWBRK_2
176			//`define DBG_HWBRK_3
177
178
179	111	olivier.gi	`//-------------------------------------------------------`
180			`// Enable/Disable the hardware breakpoint RANGE mode`
181			`//-------------------------------------------------------`
182			`// When enabled this feature allows the hardware breakpoint`
183			`// units to stop the cpu whenever an instruction or data`
184			`// access lays within an address range.`
185			`// Note that this feature is not supported by GDB.`
186			`//-------------------------------------------------------`
187			//`define DBG_HWBRK_RANGE
188
189
190			`//-------------------------------------------------------`
191			`// Input synchronizers`
192			`//-------------------------------------------------------`
193			`// In some cases, the asynchronous input ports might`
194			`// already be synchronized externally.`
195			`// If an extensive CDC design review showed that this`
196			`// is really the case, the individual synchronizers`
197			`// can be disabled with the following defines.`
198	107	olivier.gi	`//`
199	111	olivier.gi	`// Notes:`
200			`// - the dbg_en signal will reset the debug interface`
201			`// when 0. Therefore make sure it is glitch free.`
202	107	olivier.gi	`//`
203	111	olivier.gi	`// - the dbg_uart_rxd synchronizer must be set to 1`
204			`// when its reset is active.`
205			`//-------------------------------------------------------`
206			`define SYNC_CPU_EN
207			`define SYNC_DBG_EN
208			`define SYNC_DBG_UART_RXD
209			`define SYNC_NMI
210	107	olivier.gi
211
212	111	olivier.gi
213	80	olivier.gi	`//==========================================================================//`
214			`//==========================================================================//`
215			`//==========================================================================//`
216			`//==========================================================================//`
217			`//===== SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!! =====//`
218			`//==========================================================================//`
219			`//==========================================================================//`
220			`//==========================================================================//`
221			`//==========================================================================//`
222
223			`//`
224	111	olivier.gi	`// PROGRAM, DATA & PERIPHERAL MEMORY CONFIGURATION`
225			`//==================================================`
226	80	olivier.gi
227			`// Program Memory Size`
228			`ifdef PMEM_SIZE_59_KB
229			`define PMEM_AWIDTH 15
230			`define PMEM_SIZE 60416
231			`endif
232			`ifdef PMEM_SIZE_55_KB
233			`define PMEM_AWIDTH 15
234			`define PMEM_SIZE 56320
235			`endif
236			`ifdef PMEM_SIZE_54_KB
237			`define PMEM_AWIDTH 15
238			`define PMEM_SIZE 55296
239			`endif
240			`ifdef PMEM_SIZE_51_KB
241			`define PMEM_AWIDTH 15
242			`define PMEM_SIZE 52224
243			`endif
244			`ifdef PMEM_SIZE_48_KB
245			`define PMEM_AWIDTH 15
246			`define PMEM_SIZE 49152
247			`endif
248			`ifdef PMEM_SIZE_41_KB
249			`define PMEM_AWIDTH 15
250			`define PMEM_SIZE 41984
251			`endif
252			`ifdef PMEM_SIZE_32_KB
253			`define PMEM_AWIDTH 14
254			`define PMEM_SIZE 32768
255			`endif
256			`ifdef PMEM_SIZE_24_KB
257			`define PMEM_AWIDTH 14
258			`define PMEM_SIZE 24576
259			`endif
260			`ifdef PMEM_SIZE_16_KB
261			`define PMEM_AWIDTH 13
262			`define PMEM_SIZE 16384
263			`endif
264			`ifdef PMEM_SIZE_12_KB
265			`define PMEM_AWIDTH 13
266			`define PMEM_SIZE 12288
267			`endif
268			`ifdef PMEM_SIZE_8_KB
269			`define PMEM_AWIDTH 12
270			`define PMEM_SIZE 8192
271			`endif
272			`ifdef PMEM_SIZE_4_KB
273			`define PMEM_AWIDTH 11
274			`define PMEM_SIZE 4096
275			`endif
276			`ifdef PMEM_SIZE_2_KB
277			`define PMEM_AWIDTH 10
278			`define PMEM_SIZE 2048
279			`endif
280			`ifdef PMEM_SIZE_1_KB
281			`define PMEM_AWIDTH 9
282			`define PMEM_SIZE 1024
283			`endif
284
285			`// Data Memory Size`
286			`ifdef DMEM_SIZE_32_KB
287			`define DMEM_AWIDTH 14
288			`define DMEM_SIZE 32768
289			`endif
290			`ifdef DMEM_SIZE_24_KB
291			`define DMEM_AWIDTH 14
292			`define DMEM_SIZE 24576
293			`endif
294			`ifdef DMEM_SIZE_16_KB
295			`define DMEM_AWIDTH 13
296			`define DMEM_SIZE 16384
297			`endif
298			`ifdef DMEM_SIZE_10_KB
299			`define DMEM_AWIDTH 13
300			`define DMEM_SIZE 10240
301			`endif
302			`ifdef DMEM_SIZE_8_KB
303			`define DMEM_AWIDTH 12
304			`define DMEM_SIZE 8192
305			`endif
306			`ifdef DMEM_SIZE_5_KB
307			`define DMEM_AWIDTH 12
308			`define DMEM_SIZE 5120
309			`endif
310			`ifdef DMEM_SIZE_4_KB
311			`define DMEM_AWIDTH 11
312			`define DMEM_SIZE 4096
313			`endif
314			`ifdef DMEM_SIZE_2p5_KB
315			`define DMEM_AWIDTH 11
316			`define DMEM_SIZE 2560
317			`endif
318			`ifdef DMEM_SIZE_2_KB
319			`define DMEM_AWIDTH 10
320			`define DMEM_SIZE 2048
321			`endif
322			`ifdef DMEM_SIZE_1_KB
323			`define DMEM_AWIDTH 9
324			`define DMEM_SIZE 1024
325			`endif
326			`ifdef DMEM_SIZE_512_B
327			`define DMEM_AWIDTH 8
328			`define DMEM_SIZE 512
329			`endif
330			`ifdef DMEM_SIZE_256_B
331			`define DMEM_AWIDTH 7
332			`define DMEM_SIZE 256
333			`endif
334			`ifdef DMEM_SIZE_128_B
335			`define DMEM_AWIDTH 6
336			`define DMEM_SIZE 128
337			`endif
338
339	111	olivier.gi	`// Peripheral Memory Size`
340			`ifdef PER_SIZE_32_KB
341			`define PER_AWIDTH 14
342			`define PER_SIZE 32768
343			`endif
344			`ifdef PER_SIZE_16_KB
345			`define PER_AWIDTH 13
346			`define PER_SIZE 16384
347			`endif
348			`ifdef PER_SIZE_8_KB
349			`define PER_AWIDTH 12
350			`define PER_SIZE 8192
351			`endif
352			`ifdef PER_SIZE_4_KB
353			`define PER_AWIDTH 11
354			`define PER_SIZE 4096
355			`endif
356			`ifdef PER_SIZE_2_KB
357			`define PER_AWIDTH 10
358			`define PER_SIZE 2048
359			`endif
360			`ifdef PER_SIZE_1_KB
361			`define PER_AWIDTH 9
362			`define PER_SIZE 1024
363			`endif
364			`ifdef PER_SIZE_512_B
365			`define PER_AWIDTH 8
366			`define PER_SIZE 512
367			`endif
368
369	80	olivier.gi	`// Data Memory Base Adresses`
370	111	olivier.gi	`define DMEM_BASE `PER_SIZE
371	80	olivier.gi
372			`// Program & Data Memory most significant address bit (for 16 bit words)`
373			`define PMEM_MSB `PMEM_AWIDTH-1
374			`define DMEM_MSB `DMEM_AWIDTH-1
375	111	olivier.gi	`define PER_MSB `PER_AWIDTH-1
376	80	olivier.gi
377			`//`
378			`// STATES, REGISTER FIELDS, ...`
379			`//======================================`
380
381			`// Instructions type`
382			`define INST_SO 0
383			`define INST_JMP 1
384			`define INST_TO 2
385
386			`// Single-operand arithmetic`
387			`define RRC 0
388			`define SWPB 1
389			`define RRA 2
390			`define SXT 3
391			`define PUSH 4
392			`define CALL 5
393			`define RETI 6
394			`define IRQ 7
395
396			`// Conditional jump`
397			`define JNE 0
398			`define JEQ 1
399			`define JNC 2
400			`define JC 3
401			`define JN 4
402			`define JGE 5
403			`define JL 6
404			`define JMP 7
405
406			`// Two-operand arithmetic`
407			`define MOV 0
408			`define ADD 1
409			`define ADDC 2
410			`define SUBC 3
411			`define SUB 4
412			`define CMP 5
413			`define DADD 6
414			`define BIT 7
415			`define BIC 8
416			`define BIS 9
417			`define XOR 10
418			`define AND 11
419
420			`// Addressing modes`
421			`define DIR 0
422			`define IDX 1
423			`define INDIR 2
424			`define INDIR_I 3
425			`define SYMB 4
426			`define IMM 5
427			`define ABS 6
428			`define CONST 7
429
430	111	olivier.gi	`// Instruction state machine`
431			`define I_IRQ_FETCH 3'h0
432			`define I_IRQ_DONE 3'h1
433			`define I_DEC 3'h2
434			`define I_EXT1 3'h3
435			`define I_EXT2 3'h4
436			`define I_IDLE 3'h5
437
438	80	olivier.gi	`// Execution state machine`
439	111	olivier.gi	`define E_IRQ_0 4'h0
440			`define E_IRQ_1 4'h1
441			`define E_IRQ_2 4'h2
442			`define E_IRQ_3 4'h3
443			`define E_IRQ_4 4'h4
444			`define E_SRC_AD 4'h5
445			`define E_SRC_RD 4'h6
446			`define E_SRC_WR 4'h7
447			`define E_DST_AD 4'h8
448			`define E_DST_RD 4'h9
449			`define E_DST_WR 4'hA
450			`define E_EXEC 4'hB
451			`define E_JUMP 4'hC
452			`define E_IDLE 4'hD
453	80	olivier.gi
454			`// ALU control signals`
455			`define ALU_SRC_INV 0
456			`define ALU_INC 1
457			`define ALU_INC_C 2
458			`define ALU_ADD 3
459			`define ALU_AND 4
460			`define ALU_OR 5
461			`define ALU_XOR 6
462			`define ALU_DADD 7
463			`define ALU_STAT_7 8
464			`define ALU_STAT_F 9
465			`define ALU_SHIFT 10
466			`define EXEC_NO_WR 11
467
468			`// Debug interface`
469			`define DBG_UART_WR 18
470			`define DBG_UART_BW 17
471			`define DBG_UART_ADDR 16:11
472
473			`// Debug interface CPU_CTL register`
474			`define HALT 0
475			`define RUN 1
476			`define ISTEP 2
477			`define SW_BRK_EN 3
478			`define FRZ_BRK_EN 4
479			`define RST_BRK_EN 5
480			`define CPU_RST 6
481
482			`// Debug interface CPU_STAT register`
483			`define HALT_RUN 0
484			`define PUC_PND 1
485			`define SWBRK_PND 3
486			`define HWBRK0_PND 4
487			`define HWBRK1_PND 5
488
489			`// Debug interface BRKx_CTL register`
490			`define BRK_MODE_RD 0
491			`define BRK_MODE_WR 1
492			`define BRK_MODE 1:0
493			`define BRK_EN 2
494			`define BRK_I_EN 3
495			`define BRK_RANGE 4
496
497			`// Basic clock module: BCSCTL1 Control Register`
498			`define DIVAx 5:4
499
500			`// Basic clock module: BCSCTL2 Control Register`

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