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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [periph/] [omsp_timerA_undefines.v] - Blame information for rev 107

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Line No. Rev Author Line
1 107 olivier.gi
//----------------------------------------------------------------------------
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// Copyright (C) 2001 Authors
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//
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// This source file may be used and distributed without restriction provided
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// that this copyright statement is not removed from the file and that any
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// derivative work contains the original copyright notice and the associated
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// disclaimer.
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//
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// This source file is free software; you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation; either version 2.1 of the License, or
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// (at your option) any later version.
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//
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// This source is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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// License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public License
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// along with this source; if not, write to the Free Software Foundation,
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// Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
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//
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//----------------------------------------------------------------------------
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// 
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// *File Name: omsp_timerA_undefines.v
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// 
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// *Module Description:
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//                      omsp_timerA Verilog `undef file
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//
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// *Author(s):
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//              - Olivier Girard,    olgirard@gmail.com
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//
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//----------------------------------------------------------------------------
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// $Rev: 23 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2009-08-30 18:39:26 +0200 (Sun, 30 Aug 2009) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// SYSTEM CONFIGURATION
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//----------------------------------------------------------------------------
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//=====        SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!!      =====//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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// Timer A: TACTL Control Register
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`ifdef TASSELx
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`undef TASSELx
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`endif
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`ifdef TAIDx
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`undef TAIDx
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`endif
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`ifdef TAMCx
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`undef TAMCx
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`endif
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`ifdef TACLR
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`undef TACLR
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`endif
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`ifdef TAIE
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`undef TAIE
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`endif
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`ifdef TAIFG
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`undef TAIFG
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`endif
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// Timer A: TACCTLx Capture/Compare Control Register
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`ifdef TACMx
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`undef TACMx
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`endif
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`ifdef TACCISx
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`undef TACCISx
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`endif
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`ifdef TASCS
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`undef TASCS
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`endif
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`ifdef TASCCI
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`undef TASCCI
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`endif
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`ifdef TACAP
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`undef TACAP
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`endif
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`ifdef TAOUTMODx
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`undef TAOUTMODx
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`endif
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`ifdef TACCIE
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`undef TACCIE
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`endif
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`ifdef TACCI
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`undef TACCI
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`endif
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`ifdef TAOUT
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`undef TAOUT
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`endif
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`ifdef TACOV
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`undef TACOV
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`endif
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`ifdef TACCIFG
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`undef TACCIFG
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`endif

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