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[/] [openmsp430/] [trunk/] [fpga/] [altera_de0_nano_soc/] [doc/] [Terasic/] [DE0_NANO_SOC/] [Demonstrations/] [FPGA/] [DE0_NANO_SOC_ADC/] [software/] [DE0_NANO_SOC_ADC_bsp/] [HAL/] [src/] [altera_nios2_qsys_irq.c] - Blame information for rev 221

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1 221 olivier.gi
/*
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 * Copyright (c) 2009 Altera Corporation, San Jose, California, USA.
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 * All rights reserved.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to
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 * deal in the Software without restriction, including without limitation the
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 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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 * sell copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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 * DEALINGS IN THE SOFTWARE.
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 *
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 * altera_nios2_irq.c - Support for Nios II internal interrupt controller.
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 *
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 */
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#include "sys/alt_irq.h"
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#include "altera_nios2_qsys_irq.h"
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/*
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 * To initialize the internal interrupt controller, just clear the IENABLE
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 * register so that all possible IRQs are disabled.
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 */
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void altera_nios2_qsys_irq_init(void)
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{
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    NIOS2_WRITE_IENABLE(0);
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}

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