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[/] [openmsp430/] [trunk/] [fpga/] [altera_de0_nano_soc/] [doc/] [Terasic/] [DE0_NANO_SOC/] [Demonstrations/] [FPGA/] [DE0_NANO_SOC_Default/] [DE0_NANO_SOC_Default.htm] - Blame information for rev 221

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1 221 olivier.gi
<html>
2
<body>
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<h1 align="center">DE0-Nano-SoC Board Configuration</h1>
4
<br />
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<br />
6
<h2 align="left">Pin Assignments:</h2>
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<ul>
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<a href="#ADC"><li>ADC</li></a>
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<br />
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<a href="#ARDUINO"><li>ARDUINO</li></a>
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<br />
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<a href="#CLOCK"><li>CLOCK</li></a>
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<br />
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<a href="#HPS"><li>HPS</li></a>
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<br />
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<a href="#KEY"><li>KEY</li></a>
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<br />
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<a href="#LED"><li>LED</li></a>
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<br />
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<a href="#SW"><li>SW</li></a>
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<br />
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<a href="#GPIO_0"><li>GPIO_0</li></a>
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<br />
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<a href="#GPIO_1"><li>GPIO_1</li></a>
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<br />
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</ul>
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<br />
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<br />
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<br />
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<h2 align="left">Pin Assignment Table:</h2>
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<h2><a name="ADC"></a></h2><table border="3">
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<caption  align="left">ADC</caption>
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<br />
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<br />
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<tr>
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   <th align="left" bgcolor="Khaki">Name</th>
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   <th align="left" bgcolor="Khaki">Location</th>
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   <th align="left" bgcolor="Khaki">Direction</th>
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   <th align="left" bgcolor="Khaki">Standard</th>
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</tr>
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<tr>
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   <td align="left">ADC_CONVST</td>
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   <td align="left">U9</td>
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   <td align="left">output</td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ADC_SCK</td>
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   <td align="left">V10</td>
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   <td align="left">output</td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ADC_SDI</td>
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   <td align="left">AC4</td>
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   <td align="left">output</td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ADC_SDO</td>
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   <td align="left">AD4</td>
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   <td align="left">input </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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</table>
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<h2><a name="ARDUINO"></a></h2><table border="3">
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<caption  align="left">ARDUINO</caption>
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<br />
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<br />
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<tr>
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   <th align="left" bgcolor="Khaki">Name</th>
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   <th align="left" bgcolor="Khaki">Location</th>
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   <th align="left" bgcolor="Khaki">Direction</th>
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   <th align="left" bgcolor="Khaki">Standard</th>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[0]</td>
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   <td align="left">AG13</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[1]</td>
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   <td align="left">AF13</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[2]</td>
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   <td align="left">AG10</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[3]</td>
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   <td align="left">AG9</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[4]</td>
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   <td align="left">U14</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[5]</td>
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   <td align="left">U13</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[6]</td>
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   <td align="left">AG8</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[7]</td>
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   <td align="left">AH8</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[8]</td>
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   <td align="left">AF17</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[9]</td>
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   <td align="left">AE15</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[10]</td>
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   <td align="left">AF15</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[11]</td>
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   <td align="left">AG16</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[12]</td>
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   <td align="left">AH11</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[13]</td>
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   <td align="left">AH12</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[14]</td>
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   <td align="left">AH9</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_IO[15]</td>
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   <td align="left">AG11</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">ARDUINO_RESET_N</td>
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   <td align="left">AH7</td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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</table>
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<h2><a name="CLOCK"></a></h2><table border="3">
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<caption  align="left">CLOCK</caption>
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<br />
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<br />
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<tr>
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   <th align="left" bgcolor="Khaki">Name</th>
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   <th align="left" bgcolor="Khaki">Location</th>
186
   <th align="left" bgcolor="Khaki">Direction</th>
187
   <th align="left" bgcolor="Khaki">Standard</th>
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</tr>
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<tr>
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   <td align="left">FPGA_CLK1_50</td>
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   <td align="left">V11</td>
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   <td align="left">input </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">FPGA_CLK2_50</td>
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   <td align="left">Y13</td>
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   <td align="left">input </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">FPGA_CLK3_50</td>
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   <td align="left">E11</td>
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   <td align="left">input </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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</table>
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<h2><a name="HPS"></a></h2><table border="3">
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<caption  align="left">HPS</caption>
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<br />
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<br />
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<tr>
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   <th align="left" bgcolor="Khaki">Name</th>
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   <th align="left" bgcolor="Khaki">Location</th>
215
   <th align="left" bgcolor="Khaki">Direction</th>
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   <th align="left" bgcolor="Khaki">Standard</th>
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</tr>
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<tr>
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   <td align="left">HPS_CONV_USB_N</td>
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   <td align="left"></td>
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   <td align="left">inout </td>
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   <td align="left">3.3-V LVTTL</td>
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</tr>
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<tr>
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   <td align="left">HPS_DDR3_ADDR[0]</td>
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   <td align="left"></td>
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   <td align="left">output</td>
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   <td align="left">SSTL-15 Class I</td>
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</tr>
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<tr>
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   <td align="left">HPS_DDR3_ADDR[1]</td>
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   <td align="left"></td>
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   <td align="left">output</td>
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   <td align="left">SSTL-15 Class I</td>
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</tr>
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<tr>
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   <td align="left">HPS_DDR3_ADDR[2]</td>
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   <td align="left"></td>
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   <td align="left">output</td>
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   <td align="left">SSTL-15 Class I</td>
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</tr>
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<tr>
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   <td align="left">HPS_DDR3_ADDR[3]</td>
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   <td align="left"></td>
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   <td align="left">output</td>
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   <td align="left">SSTL-15 Class I</td>
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</tr>
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<tr>
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   <td align="left">HPS_DDR3_ADDR[4]</td>
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   <td align="left"></td>
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   <td align="left">output</td>
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   <td align="left">SSTL-15 Class I</td>
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</tr>
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<tr>
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   <td align="left">HPS_DDR3_ADDR[5]</td>
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   <td align="left"></td>
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   <td align="left">output</td>
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   <td align="left">SSTL-15 Class I</td>
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</tr>
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<tr>
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   <td align="left">HPS_DDR3_ADDR[6]</td>
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   <td align="left"></td>
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   <td align="left">output</td>
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   <td align="left">SSTL-15 Class I</td>
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</tr>
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<tr>
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   <td align="left">HPS_DDR3_ADDR[7]</td>
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   <td align="left"></td>
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   <td align="left">output</td>
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   <td align="left">SSTL-15 Class I</td>
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</tr>
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<tr>
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   <td align="left">HPS_DDR3_ADDR[8]</td>
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   <td align="left"></td>
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   <td align="left">output</td>
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   <td align="left">SSTL-15 Class I</td>
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</tr>
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<tr>
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   <td align="left">HPS_DDR3_ADDR[9]</td>
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   <td align="left"></td>
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   <td align="left">output</td>
282
   <td align="left">SSTL-15 Class I</td>
283
</tr>
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<tr>
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   <td align="left">HPS_DDR3_ADDR[10]</td>
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   <td align="left"></td>
287
   <td align="left">output</td>
288
   <td align="left">SSTL-15 Class I</td>
289
</tr>
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<tr>
291
   <td align="left">HPS_DDR3_ADDR[11]</td>
292
   <td align="left"></td>
293
   <td align="left">output</td>
294
   <td align="left">SSTL-15 Class I</td>
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</tr>
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<tr>
297
   <td align="left">HPS_DDR3_ADDR[12]</td>
298
   <td align="left"></td>
299
   <td align="left">output</td>
300
   <td align="left">SSTL-15 Class I</td>
301
</tr>
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<tr>
303
   <td align="left">HPS_DDR3_ADDR[13]</td>
304
   <td align="left"></td>
305
   <td align="left">output</td>
306
   <td align="left">SSTL-15 Class I</td>
307
</tr>
308
<tr>
309
   <td align="left">HPS_DDR3_ADDR[14]</td>
310
   <td align="left"></td>
311
   <td align="left">output</td>
312
   <td align="left">SSTL-15 Class I</td>
313
</tr>
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<tr>
315
   <td align="left">HPS_DDR3_BA[0]</td>
316
   <td align="left"></td>
317
   <td align="left">output</td>
318
   <td align="left">SSTL-15 Class I</td>
319
</tr>
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<tr>
321
   <td align="left">HPS_DDR3_BA[1]</td>
322
   <td align="left"></td>
323
   <td align="left">output</td>
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   <td align="left">SSTL-15 Class I</td>
325
</tr>
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<tr>
327
   <td align="left">HPS_DDR3_BA[2]</td>
328
   <td align="left"></td>
329
   <td align="left">output</td>
330
   <td align="left">SSTL-15 Class I</td>
331
</tr>
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<tr>
333
   <td align="left">HPS_DDR3_CAS_N</td>
334
   <td align="left"></td>
335
   <td align="left">output</td>
336
   <td align="left">SSTL-15 Class I</td>
337
</tr>
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<tr>
339
   <td align="left">HPS_DDR3_CKE</td>
340
   <td align="left"></td>
341
   <td align="left">output</td>
342
   <td align="left">SSTL-15 Class I</td>
343
</tr>
344
<tr>
345
   <td align="left">HPS_DDR3_CK_N</td>
346
   <td align="left"></td>
347
   <td align="left">output</td>
348
   <td align="left">Differential 1.5-V SSTL Class I</td>
349
</tr>
350
<tr>
351
   <td align="left">HPS_DDR3_CK_P</td>
352
   <td align="left"></td>
353
   <td align="left">output</td>
354
   <td align="left">Differential 1.5-V SSTL Class I</td>
355
</tr>
356
<tr>
357
   <td align="left">HPS_DDR3_CS_N</td>
358
   <td align="left"></td>
359
   <td align="left">output</td>
360
   <td align="left">SSTL-15 Class I</td>
361
</tr>
362
<tr>
363
   <td align="left">HPS_DDR3_DM[0]</td>
364
   <td align="left"></td>
365
   <td align="left">output</td>
366
   <td align="left">SSTL-15 Class I</td>
367
</tr>
368
<tr>
369
   <td align="left">HPS_DDR3_DM[1]</td>
370
   <td align="left"></td>
371
   <td align="left">output</td>
372
   <td align="left">SSTL-15 Class I</td>
373
</tr>
374
<tr>
375
   <td align="left">HPS_DDR3_DM[2]</td>
376
   <td align="left"></td>
377
   <td align="left">output</td>
378
   <td align="left">SSTL-15 Class I</td>
379
</tr>
380
<tr>
381
   <td align="left">HPS_DDR3_DM[3]</td>
382
   <td align="left"></td>
383
   <td align="left">output</td>
384
   <td align="left">SSTL-15 Class I</td>
385
</tr>
386
<tr>
387
   <td align="left">HPS_DDR3_DQ[0]</td>
388
   <td align="left"></td>
389
   <td align="left">inout </td>
390
   <td align="left">SSTL-15 Class I</td>
391
</tr>
392
<tr>
393
   <td align="left">HPS_DDR3_DQ[1]</td>
394
   <td align="left"></td>
395
   <td align="left">inout </td>
396
   <td align="left">SSTL-15 Class I</td>
397
</tr>
398
<tr>
399
   <td align="left">HPS_DDR3_DQ[2]</td>
400
   <td align="left"></td>
401
   <td align="left">inout </td>
402
   <td align="left">SSTL-15 Class I</td>
403
</tr>
404
<tr>
405
   <td align="left">HPS_DDR3_DQ[3]</td>
406
   <td align="left"></td>
407
   <td align="left">inout </td>
408
   <td align="left">SSTL-15 Class I</td>
409
</tr>
410
<tr>
411
   <td align="left">HPS_DDR3_DQ[4]</td>
412
   <td align="left"></td>
413
   <td align="left">inout </td>
414
   <td align="left">SSTL-15 Class I</td>
415
</tr>
416
<tr>
417
   <td align="left">HPS_DDR3_DQ[5]</td>
418
   <td align="left"></td>
419
   <td align="left">inout </td>
420
   <td align="left">SSTL-15 Class I</td>
421
</tr>
422
<tr>
423
   <td align="left">HPS_DDR3_DQ[6]</td>
424
   <td align="left"></td>
425
   <td align="left">inout </td>
426
   <td align="left">SSTL-15 Class I</td>
427
</tr>
428
<tr>
429
   <td align="left">HPS_DDR3_DQ[7]</td>
430
   <td align="left"></td>
431
   <td align="left">inout </td>
432
   <td align="left">SSTL-15 Class I</td>
433
</tr>
434
<tr>
435
   <td align="left">HPS_DDR3_DQ[8]</td>
436
   <td align="left"></td>
437
   <td align="left">inout </td>
438
   <td align="left">SSTL-15 Class I</td>
439
</tr>
440
<tr>
441
   <td align="left">HPS_DDR3_DQ[9]</td>
442
   <td align="left"></td>
443
   <td align="left">inout </td>
444
   <td align="left">SSTL-15 Class I</td>
445
</tr>
446
<tr>
447
   <td align="left">HPS_DDR3_DQ[10]</td>
448
   <td align="left"></td>
449
   <td align="left">inout </td>
450
   <td align="left">SSTL-15 Class I</td>
451
</tr>
452
<tr>
453
   <td align="left">HPS_DDR3_DQ[11]</td>
454
   <td align="left"></td>
455
   <td align="left">inout </td>
456
   <td align="left">SSTL-15 Class I</td>
457
</tr>
458
<tr>
459
   <td align="left">HPS_DDR3_DQ[12]</td>
460
   <td align="left"></td>
461
   <td align="left">inout </td>
462
   <td align="left">SSTL-15 Class I</td>
463
</tr>
464
<tr>
465
   <td align="left">HPS_DDR3_DQ[13]</td>
466
   <td align="left"></td>
467
   <td align="left">inout </td>
468
   <td align="left">SSTL-15 Class I</td>
469
</tr>
470
<tr>
471
   <td align="left">HPS_DDR3_DQ[14]</td>
472
   <td align="left"></td>
473
   <td align="left">inout </td>
474
   <td align="left">SSTL-15 Class I</td>
475
</tr>
476
<tr>
477
   <td align="left">HPS_DDR3_DQ[15]</td>
478
   <td align="left"></td>
479
   <td align="left">inout </td>
480
   <td align="left">SSTL-15 Class I</td>
481
</tr>
482
<tr>
483
   <td align="left">HPS_DDR3_DQ[16]</td>
484
   <td align="left"></td>
485
   <td align="left">inout </td>
486
   <td align="left">SSTL-15 Class I</td>
487
</tr>
488
<tr>
489
   <td align="left">HPS_DDR3_DQ[17]</td>
490
   <td align="left"></td>
491
   <td align="left">inout </td>
492
   <td align="left">SSTL-15 Class I</td>
493
</tr>
494
<tr>
495
   <td align="left">HPS_DDR3_DQ[18]</td>
496
   <td align="left"></td>
497
   <td align="left">inout </td>
498
   <td align="left">SSTL-15 Class I</td>
499
</tr>
500
<tr>
501
   <td align="left">HPS_DDR3_DQ[19]</td>
502
   <td align="left"></td>
503
   <td align="left">inout </td>
504
   <td align="left">SSTL-15 Class I</td>
505
</tr>
506
<tr>
507
   <td align="left">HPS_DDR3_DQ[20]</td>
508
   <td align="left"></td>
509
   <td align="left">inout </td>
510
   <td align="left">SSTL-15 Class I</td>
511
</tr>
512
<tr>
513
   <td align="left">HPS_DDR3_DQ[21]</td>
514
   <td align="left"></td>
515
   <td align="left">inout </td>
516
   <td align="left">SSTL-15 Class I</td>
517
</tr>
518
<tr>
519
   <td align="left">HPS_DDR3_DQ[22]</td>
520
   <td align="left"></td>
521
   <td align="left">inout </td>
522
   <td align="left">SSTL-15 Class I</td>
523
</tr>
524
<tr>
525
   <td align="left">HPS_DDR3_DQ[23]</td>
526
   <td align="left"></td>
527
   <td align="left">inout </td>
528
   <td align="left">SSTL-15 Class I</td>
529
</tr>
530
<tr>
531
   <td align="left">HPS_DDR3_DQ[24]</td>
532
   <td align="left"></td>
533
   <td align="left">inout </td>
534
   <td align="left">SSTL-15 Class I</td>
535
</tr>
536
<tr>
537
   <td align="left">HPS_DDR3_DQ[25]</td>
538
   <td align="left"></td>
539
   <td align="left">inout </td>
540
   <td align="left">SSTL-15 Class I</td>
541
</tr>
542
<tr>
543
   <td align="left">HPS_DDR3_DQ[26]</td>
544
   <td align="left"></td>
545
   <td align="left">inout </td>
546
   <td align="left">SSTL-15 Class I</td>
547
</tr>
548
<tr>
549
   <td align="left">HPS_DDR3_DQ[27]</td>
550
   <td align="left"></td>
551
   <td align="left">inout </td>
552
   <td align="left">SSTL-15 Class I</td>
553
</tr>
554
<tr>
555
   <td align="left">HPS_DDR3_DQ[28]</td>
556
   <td align="left"></td>
557
   <td align="left">inout </td>
558
   <td align="left">SSTL-15 Class I</td>
559
</tr>
560
<tr>
561
   <td align="left">HPS_DDR3_DQ[29]</td>
562
   <td align="left"></td>
563
   <td align="left">inout </td>
564
   <td align="left">SSTL-15 Class I</td>
565
</tr>
566
<tr>
567
   <td align="left">HPS_DDR3_DQ[30]</td>
568
   <td align="left"></td>
569
   <td align="left">inout </td>
570
   <td align="left">SSTL-15 Class I</td>
571
</tr>
572
<tr>
573
   <td align="left">HPS_DDR3_DQ[31]</td>
574
   <td align="left"></td>
575
   <td align="left">inout </td>
576
   <td align="left">SSTL-15 Class I</td>
577
</tr>
578
<tr>
579
   <td align="left">HPS_DDR3_DQS_N[0]</td>
580
   <td align="left"></td>
581
   <td align="left">inout </td>
582
   <td align="left">Differential 1.5-V SSTL Class I</td>
583
</tr>
584
<tr>
585
   <td align="left">HPS_DDR3_DQS_N[1]</td>
586
   <td align="left"></td>
587
   <td align="left">inout </td>
588
   <td align="left">Differential 1.5-V SSTL Class I</td>
589
</tr>
590
<tr>
591
   <td align="left">HPS_DDR3_DQS_N[2]</td>
592
   <td align="left"></td>
593
   <td align="left">inout </td>
594
   <td align="left">Differential 1.5-V SSTL Class I</td>
595
</tr>
596
<tr>
597
   <td align="left">HPS_DDR3_DQS_N[3]</td>
598
   <td align="left"></td>
599
   <td align="left">inout </td>
600
   <td align="left">Differential 1.5-V SSTL Class I</td>
601
</tr>
602
<tr>
603
   <td align="left">HPS_DDR3_DQS_P[0]</td>
604
   <td align="left"></td>
605
   <td align="left">inout </td>
606
   <td align="left">Differential 1.5-V SSTL Class I</td>
607
</tr>
608
<tr>
609
   <td align="left">HPS_DDR3_DQS_P[1]</td>
610
   <td align="left"></td>
611
   <td align="left">inout </td>
612
   <td align="left">Differential 1.5-V SSTL Class I</td>
613
</tr>
614
<tr>
615
   <td align="left">HPS_DDR3_DQS_P[2]</td>
616
   <td align="left"></td>
617
   <td align="left">inout </td>
618
   <td align="left">Differential 1.5-V SSTL Class I</td>
619
</tr>
620
<tr>
621
   <td align="left">HPS_DDR3_DQS_P[3]</td>
622
   <td align="left"></td>
623
   <td align="left">inout </td>
624
   <td align="left">Differential 1.5-V SSTL Class I</td>
625
</tr>
626
<tr>
627
   <td align="left">HPS_DDR3_ODT</td>
628
   <td align="left"></td>
629
   <td align="left">output</td>
630
   <td align="left">SSTL-15 Class I</td>
631
</tr>
632
<tr>
633
   <td align="left">HPS_DDR3_RAS_N</td>
634
   <td align="left"></td>
635
   <td align="left">output</td>
636
   <td align="left">SSTL-15 Class I</td>
637
</tr>
638
<tr>
639
   <td align="left">HPS_DDR3_RESET_N</td>
640
   <td align="left"></td>
641
   <td align="left">output</td>
642
   <td align="left">SSTL-15 Class I</td>
643
</tr>
644
<tr>
645
   <td align="left">HPS_DDR3_RZQ</td>
646
   <td align="left"></td>
647
   <td align="left">input </td>
648
   <td align="left">1.5 V</td>
649
</tr>
650
<tr>
651
   <td align="left">HPS_DDR3_WE_N</td>
652
   <td align="left"></td>
653
   <td align="left">output</td>
654
   <td align="left">SSTL-15 Class I</td>
655
</tr>
656
<tr>
657
   <td align="left">HPS_ENET_GTX_CLK</td>
658
   <td align="left"></td>
659
   <td align="left">output</td>
660
   <td align="left">3.3-V LVTTL</td>
661
</tr>
662
<tr>
663
   <td align="left">HPS_ENET_INT_N</td>
664
   <td align="left"></td>
665
   <td align="left">inout </td>
666
   <td align="left">3.3-V LVTTL</td>
667
</tr>
668
<tr>
669
   <td align="left">HPS_ENET_MDC</td>
670
   <td align="left"></td>
671
   <td align="left">output</td>
672
   <td align="left">3.3-V LVTTL</td>
673
</tr>
674
<tr>
675
   <td align="left">HPS_ENET_MDIO</td>
676
   <td align="left"></td>
677
   <td align="left">inout </td>
678
   <td align="left">3.3-V LVTTL</td>
679
</tr>
680
<tr>
681
   <td align="left">HPS_ENET_RX_CLK</td>
682
   <td align="left"></td>
683
   <td align="left">input </td>
684
   <td align="left">3.3-V LVTTL</td>
685
</tr>
686
<tr>
687
   <td align="left">HPS_ENET_RX_DATA[0]</td>
688
   <td align="left"></td>
689
   <td align="left">input </td>
690
   <td align="left">3.3-V LVTTL</td>
691
</tr>
692
<tr>
693
   <td align="left">HPS_ENET_RX_DATA[1]</td>
694
   <td align="left"></td>
695
   <td align="left">input </td>
696
   <td align="left">3.3-V LVTTL</td>
697
</tr>
698
<tr>
699
   <td align="left">HPS_ENET_RX_DATA[2]</td>
700
   <td align="left"></td>
701
   <td align="left">input </td>
702
   <td align="left">3.3-V LVTTL</td>
703
</tr>
704
<tr>
705
   <td align="left">HPS_ENET_RX_DATA[3]</td>
706
   <td align="left"></td>
707
   <td align="left">input </td>
708
   <td align="left">3.3-V LVTTL</td>
709
</tr>
710
<tr>
711
   <td align="left">HPS_ENET_RX_DV</td>
712
   <td align="left"></td>
713
   <td align="left">input </td>
714
   <td align="left">3.3-V LVTTL</td>
715
</tr>
716
<tr>
717
   <td align="left">HPS_ENET_TX_DATA[0]</td>
718
   <td align="left"></td>
719
   <td align="left">output</td>
720
   <td align="left">3.3-V LVTTL</td>
721
</tr>
722
<tr>
723
   <td align="left">HPS_ENET_TX_DATA[1]</td>
724
   <td align="left"></td>
725
   <td align="left">output</td>
726
   <td align="left">3.3-V LVTTL</td>
727
</tr>
728
<tr>
729
   <td align="left">HPS_ENET_TX_DATA[2]</td>
730
   <td align="left"></td>
731
   <td align="left">output</td>
732
   <td align="left">3.3-V LVTTL</td>
733
</tr>
734
<tr>
735
   <td align="left">HPS_ENET_TX_DATA[3]</td>
736
   <td align="left"></td>
737
   <td align="left">output</td>
738
   <td align="left">3.3-V LVTTL</td>
739
</tr>
740
<tr>
741
   <td align="left">HPS_ENET_TX_EN</td>
742
   <td align="left"></td>
743
   <td align="left">output</td>
744
   <td align="left">3.3-V LVTTL</td>
745
</tr>
746
<tr>
747
   <td align="left">HPS_GSENSOR_INT</td>
748
   <td align="left"></td>
749
   <td align="left">inout </td>
750
   <td align="left">3.3-V LVTTL</td>
751
</tr>
752
<tr>
753
   <td align="left">HPS_I2C0_SCLK</td>
754
   <td align="left"></td>
755
   <td align="left">inout </td>
756
   <td align="left">3.3-V LVTTL</td>
757
</tr>
758
<tr>
759
   <td align="left">HPS_I2C0_SDAT</td>
760
   <td align="left"></td>
761
   <td align="left">inout </td>
762
   <td align="left">3.3-V LVTTL</td>
763
</tr>
764
<tr>
765
   <td align="left">HPS_I2C1_SCLK</td>
766
   <td align="left"></td>
767
   <td align="left">inout </td>
768
   <td align="left">3.3-V LVTTL</td>
769
</tr>
770
<tr>
771
   <td align="left">HPS_I2C1_SDAT</td>
772
   <td align="left"></td>
773
   <td align="left">inout </td>
774
   <td align="left">3.3-V LVTTL</td>
775
</tr>
776
<tr>
777
   <td align="left">HPS_KEY</td>
778
   <td align="left"></td>
779
   <td align="left">inout </td>
780
   <td align="left">3.3-V LVTTL</td>
781
</tr>
782
<tr>
783
   <td align="left">HPS_LED</td>
784
   <td align="left"></td>
785
   <td align="left">inout </td>
786
   <td align="left">3.3-V LVTTL</td>
787
</tr>
788
<tr>
789
   <td align="left">HPS_LTC_GPIO</td>
790
   <td align="left"></td>
791
   <td align="left">inout </td>
792
   <td align="left">3.3-V LVTTL</td>
793
</tr>
794
<tr>
795
   <td align="left">HPS_SD_CLK</td>
796
   <td align="left"></td>
797
   <td align="left">output</td>
798
   <td align="left">3.3-V LVTTL</td>
799
</tr>
800
<tr>
801
   <td align="left">HPS_SD_CMD</td>
802
   <td align="left"></td>
803
   <td align="left">inout </td>
804
   <td align="left">3.3-V LVTTL</td>
805
</tr>
806
<tr>
807
   <td align="left">HPS_SD_DATA[0]</td>
808
   <td align="left"></td>
809
   <td align="left">inout </td>
810
   <td align="left">3.3-V LVTTL</td>
811
</tr>
812
<tr>
813
   <td align="left">HPS_SD_DATA[1]</td>
814
   <td align="left"></td>
815
   <td align="left">inout </td>
816
   <td align="left">3.3-V LVTTL</td>
817
</tr>
818
<tr>
819
   <td align="left">HPS_SD_DATA[2]</td>
820
   <td align="left"></td>
821
   <td align="left">inout </td>
822
   <td align="left">3.3-V LVTTL</td>
823
</tr>
824
<tr>
825
   <td align="left">HPS_SD_DATA[3]</td>
826
   <td align="left"></td>
827
   <td align="left">inout </td>
828
   <td align="left">3.3-V LVTTL</td>
829
</tr>
830
<tr>
831
   <td align="left">HPS_SPIM_CLK</td>
832
   <td align="left"></td>
833
   <td align="left">output</td>
834
   <td align="left">3.3-V LVTTL</td>
835
</tr>
836
<tr>
837
   <td align="left">HPS_SPIM_MISO</td>
838
   <td align="left"></td>
839
   <td align="left">input </td>
840
   <td align="left">3.3-V LVTTL</td>
841
</tr>
842
<tr>
843
   <td align="left">HPS_SPIM_MOSI</td>
844
   <td align="left"></td>
845
   <td align="left">output</td>
846
   <td align="left">3.3-V LVTTL</td>
847
</tr>
848
<tr>
849
   <td align="left">HPS_SPIM_SS</td>
850
   <td align="left"></td>
851
   <td align="left">inout </td>
852
   <td align="left">3.3-V LVTTL</td>
853
</tr>
854
<tr>
855
   <td align="left">HPS_UART_RX</td>
856
   <td align="left"></td>
857
   <td align="left">input </td>
858
   <td align="left">3.3-V LVTTL</td>
859
</tr>
860
<tr>
861
   <td align="left">HPS_UART_TX</td>
862
   <td align="left"></td>
863
   <td align="left">output</td>
864
   <td align="left">3.3-V LVTTL</td>
865
</tr>
866
<tr>
867
   <td align="left">HPS_USB_CLKOUT</td>
868
   <td align="left"></td>
869
   <td align="left">input </td>
870
   <td align="left">3.3-V LVTTL</td>
871
</tr>
872
<tr>
873
   <td align="left">HPS_USB_DATA[0]</td>
874
   <td align="left"></td>
875
   <td align="left">inout </td>
876
   <td align="left">3.3-V LVTTL</td>
877
</tr>
878
<tr>
879
   <td align="left">HPS_USB_DATA[1]</td>
880
   <td align="left"></td>
881
   <td align="left">inout </td>
882
   <td align="left">3.3-V LVTTL</td>
883
</tr>
884
<tr>
885
   <td align="left">HPS_USB_DATA[2]</td>
886
   <td align="left"></td>
887
   <td align="left">inout </td>
888
   <td align="left">3.3-V LVTTL</td>
889
</tr>
890
<tr>
891
   <td align="left">HPS_USB_DATA[3]</td>
892
   <td align="left"></td>
893
   <td align="left">inout </td>
894
   <td align="left">3.3-V LVTTL</td>
895
</tr>
896
<tr>
897
   <td align="left">HPS_USB_DATA[4]</td>
898
   <td align="left"></td>
899
   <td align="left">inout </td>
900
   <td align="left">3.3-V LVTTL</td>
901
</tr>
902
<tr>
903
   <td align="left">HPS_USB_DATA[5]</td>
904
   <td align="left"></td>
905
   <td align="left">inout </td>
906
   <td align="left">3.3-V LVTTL</td>
907
</tr>
908
<tr>
909
   <td align="left">HPS_USB_DATA[6]</td>
910
   <td align="left"></td>
911
   <td align="left">inout </td>
912
   <td align="left">3.3-V LVTTL</td>
913
</tr>
914
<tr>
915
   <td align="left">HPS_USB_DATA[7]</td>
916
   <td align="left"></td>
917
   <td align="left">inout </td>
918
   <td align="left">3.3-V LVTTL</td>
919
</tr>
920
<tr>
921
   <td align="left">HPS_USB_DIR</td>
922
   <td align="left"></td>
923
   <td align="left">input </td>
924
   <td align="left">3.3-V LVTTL</td>
925
</tr>
926
<tr>
927
   <td align="left">HPS_USB_NXT</td>
928
   <td align="left"></td>
929
   <td align="left">input </td>
930
   <td align="left">3.3-V LVTTL</td>
931
</tr>
932
<tr>
933
   <td align="left">HPS_USB_STP</td>
934
   <td align="left"></td>
935
   <td align="left">output</td>
936
   <td align="left">3.3-V LVTTL</td>
937
</tr>
938
</table>
939
<h2><a name="KEY"></a></h2><table border="3">
940
<caption  align="left">KEY</caption>
941
<br />
942
<br />
943
<tr>
944
   <th align="left" bgcolor="Khaki">Name</th>
945
   <th align="left" bgcolor="Khaki">Location</th>
946
   <th align="left" bgcolor="Khaki">Direction</th>
947
   <th align="left" bgcolor="Khaki">Standard</th>
948
</tr>
949
<tr>
950
   <td align="left">KEY[0]</td>
951
   <td align="left">AH17</td>
952
   <td align="left">input </td>
953
   <td align="left">3.3-V LVTTL</td>
954
</tr>
955
<tr>
956
   <td align="left">KEY[1]</td>
957
   <td align="left">AH16</td>
958
   <td align="left">input </td>
959
   <td align="left">3.3-V LVTTL</td>
960
</tr>
961
</table>
962
<h2><a name="LED"></a></h2><table border="3">
963
<caption  align="left">LED</caption>
964
<br />
965
<br />
966
<tr>
967
   <th align="left" bgcolor="Khaki">Name</th>
968
   <th align="left" bgcolor="Khaki">Location</th>
969
   <th align="left" bgcolor="Khaki">Direction</th>
970
   <th align="left" bgcolor="Khaki">Standard</th>
971
</tr>
972
<tr>
973
   <td align="left">LED[0]</td>
974
   <td align="left">W15</td>
975
   <td align="left">output</td>
976
   <td align="left">3.3-V LVTTL</td>
977
</tr>
978
<tr>
979
   <td align="left">LED[1]</td>
980
   <td align="left">AA24</td>
981
   <td align="left">output</td>
982
   <td align="left">3.3-V LVTTL</td>
983
</tr>
984
<tr>
985
   <td align="left">LED[2]</td>
986
   <td align="left">V16</td>
987
   <td align="left">output</td>
988
   <td align="left">3.3-V LVTTL</td>
989
</tr>
990
<tr>
991
   <td align="left">LED[3]</td>
992
   <td align="left">V15</td>
993
   <td align="left">output</td>
994
   <td align="left">3.3-V LVTTL</td>
995
</tr>
996
<tr>
997
   <td align="left">LED[4]</td>
998
   <td align="left">AF26</td>
999
   <td align="left">output</td>
1000
   <td align="left">3.3-V LVTTL</td>
1001
</tr>
1002
<tr>
1003
   <td align="left">LED[5]</td>
1004
   <td align="left">AE26</td>
1005
   <td align="left">output</td>
1006
   <td align="left">3.3-V LVTTL</td>
1007
</tr>
1008
<tr>
1009
   <td align="left">LED[6]</td>
1010
   <td align="left">Y16</td>
1011
   <td align="left">output</td>
1012
   <td align="left">3.3-V LVTTL</td>
1013
</tr>
1014
<tr>
1015
   <td align="left">LED[7]</td>
1016
   <td align="left">AA23</td>
1017
   <td align="left">output</td>
1018
   <td align="left">3.3-V LVTTL</td>
1019
</tr>
1020
</table>
1021
<h2><a name="SW"></a></h2><table border="3">
1022
<caption  align="left">SW</caption>
1023
<br />
1024
<br />
1025
<tr>
1026
   <th align="left" bgcolor="Khaki">Name</th>
1027
   <th align="left" bgcolor="Khaki">Location</th>
1028
   <th align="left" bgcolor="Khaki">Direction</th>
1029
   <th align="left" bgcolor="Khaki">Standard</th>
1030
</tr>
1031
<tr>
1032
   <td align="left">SW[0]</td>
1033
   <td align="left">L10</td>
1034
   <td align="left">input </td>
1035
   <td align="left">3.3-V LVTTL</td>
1036
</tr>
1037
<tr>
1038
   <td align="left">SW[1]</td>
1039
   <td align="left">L9</td>
1040
   <td align="left">input </td>
1041
   <td align="left">3.3-V LVTTL</td>
1042
</tr>
1043
<tr>
1044
   <td align="left">SW[2]</td>
1045
   <td align="left">H6</td>
1046
   <td align="left">input </td>
1047
   <td align="left">3.3-V LVTTL</td>
1048
</tr>
1049
<tr>
1050
   <td align="left">SW[3]</td>
1051
   <td align="left">H5</td>
1052
   <td align="left">input </td>
1053
   <td align="left">3.3-V LVTTL</td>
1054
</tr>
1055
</table>
1056
<h2><a name="GPIO_0"></a></h2><table border="3">
1057
<caption  align="left">GPIO connect to GPIO Default</caption>
1058
<br />
1059
<br />
1060
<tr>
1061
   <th align="left" bgcolor="Khaki">Name</th>
1062
   <th align="left" bgcolor="Khaki">Location</th>
1063
   <th align="left" bgcolor="Khaki">Direction</th>
1064
   <th align="left" bgcolor="Khaki">Standard</th>
1065
   <th align="left" bgcolor="Khaki">GPIO Pin Index</th>
1066
</tr>
1067
<tr>
1068
   <td align="left">GPIO_0[0]</td>
1069
   <td align="left">V12</td>
1070
   <td align="left">inout </td>
1071
   <td align="left">3.3-V LVTTL</td>
1072
   <td align="left">1</td>
1073
</tr>
1074
<tr>
1075
   <td align="left">GPIO_0[1]</td>
1076
   <td align="left">AF7</td>
1077
   <td align="left">inout </td>
1078
   <td align="left">3.3-V LVTTL</td>
1079
   <td align="left">2</td>
1080
</tr>
1081
<tr>
1082
   <td align="left">GPIO_0[2]</td>
1083
   <td align="left">W12</td>
1084
   <td align="left">inout </td>
1085
   <td align="left">3.3-V LVTTL</td>
1086
   <td align="left">3</td>
1087
</tr>
1088
<tr>
1089
   <td align="left">GPIO_0[3]</td>
1090
   <td align="left">AF8</td>
1091
   <td align="left">inout </td>
1092
   <td align="left">3.3-V LVTTL</td>
1093
   <td align="left">4</td>
1094
</tr>
1095
<tr>
1096
   <td align="left">GPIO_0[4]</td>
1097
   <td align="left">Y8</td>
1098
   <td align="left">inout </td>
1099
   <td align="left">3.3-V LVTTL</td>
1100
   <td align="left">5</td>
1101
</tr>
1102
<tr>
1103
   <td align="left">GPIO_0[5]</td>
1104
   <td align="left">AB4</td>
1105
   <td align="left">inout </td>
1106
   <td align="left">3.3-V LVTTL</td>
1107
   <td align="left">6</td>
1108
</tr>
1109
<tr>
1110
   <td align="left">GPIO_0[6]</td>
1111
   <td align="left">W8</td>
1112
   <td align="left">inout </td>
1113
   <td align="left">3.3-V LVTTL</td>
1114
   <td align="left">7</td>
1115
</tr>
1116
<tr>
1117
   <td align="left">GPIO_0[7]</td>
1118
   <td align="left">Y4</td>
1119
   <td align="left">inout </td>
1120
   <td align="left">3.3-V LVTTL</td>
1121
   <td align="left">8</td>
1122
</tr>
1123
<tr>
1124
   <td align="left">GPIO_0[8]</td>
1125
   <td align="left">Y5</td>
1126
   <td align="left">inout </td>
1127
   <td align="left">3.3-V LVTTL</td>
1128
   <td align="left">9</td>
1129
</tr>
1130
<tr>
1131
   <td align="left">GPIO_0[9]</td>
1132
   <td align="left">U11</td>
1133
   <td align="left">inout </td>
1134
   <td align="left">3.3-V LVTTL</td>
1135
   <td align="left">10</td>
1136
</tr>
1137
<tr>
1138
   <td align="left">GPIO_0[10]</td>
1139
   <td align="left">T8</td>
1140
   <td align="left">inout </td>
1141
   <td align="left">3.3-V LVTTL</td>
1142
   <td align="left">13</td>
1143
</tr>
1144
<tr>
1145
   <td align="left">GPIO_0[11]</td>
1146
   <td align="left">T12</td>
1147
   <td align="left">inout </td>
1148
   <td align="left">3.3-V LVTTL</td>
1149
   <td align="left">14</td>
1150
</tr>
1151
<tr>
1152
   <td align="left">GPIO_0[12]</td>
1153
   <td align="left">AH5</td>
1154
   <td align="left">inout </td>
1155
   <td align="left">3.3-V LVTTL</td>
1156
   <td align="left">15</td>
1157
</tr>
1158
<tr>
1159
   <td align="left">GPIO_0[13]</td>
1160
   <td align="left">AH6</td>
1161
   <td align="left">inout </td>
1162
   <td align="left">3.3-V LVTTL</td>
1163
   <td align="left">16</td>
1164
</tr>
1165
<tr>
1166
   <td align="left">GPIO_0[14]</td>
1167
   <td align="left">AH4</td>
1168
   <td align="left">inout </td>
1169
   <td align="left">3.3-V LVTTL</td>
1170
   <td align="left">17</td>
1171
</tr>
1172
<tr>
1173
   <td align="left">GPIO_0[15]</td>
1174
   <td align="left">AG5</td>
1175
   <td align="left">inout </td>
1176
   <td align="left">3.3-V LVTTL</td>
1177
   <td align="left">18</td>
1178
</tr>
1179
<tr>
1180
   <td align="left">GPIO_0[16]</td>
1181
   <td align="left">AH3</td>
1182
   <td align="left">inout </td>
1183
   <td align="left">3.3-V LVTTL</td>
1184
   <td align="left">19</td>
1185
</tr>
1186
<tr>
1187
   <td align="left">GPIO_0[17]</td>
1188
   <td align="left">AH2</td>
1189
   <td align="left">inout </td>
1190
   <td align="left">3.3-V LVTTL</td>
1191
   <td align="left">20</td>
1192
</tr>
1193
<tr>
1194
   <td align="left">GPIO_0[18]</td>
1195
   <td align="left">AF4</td>
1196
   <td align="left">inout </td>
1197
   <td align="left">3.3-V LVTTL</td>
1198
   <td align="left">21</td>
1199
</tr>
1200
<tr>
1201
   <td align="left">GPIO_0[19]</td>
1202
   <td align="left">AG6</td>
1203
   <td align="left">inout </td>
1204
   <td align="left">3.3-V LVTTL</td>
1205
   <td align="left">22</td>
1206
</tr>
1207
<tr>
1208
   <td align="left">GPIO_0[20]</td>
1209
   <td align="left">AF5</td>
1210
   <td align="left">inout </td>
1211
   <td align="left">3.3-V LVTTL</td>
1212
   <td align="left">23</td>
1213
</tr>
1214
<tr>
1215
   <td align="left">GPIO_0[21]</td>
1216
   <td align="left">AE4</td>
1217
   <td align="left">inout </td>
1218
   <td align="left">3.3-V LVTTL</td>
1219
   <td align="left">24</td>
1220
</tr>
1221
<tr>
1222
   <td align="left">GPIO_0[22]</td>
1223
   <td align="left">T13</td>
1224
   <td align="left">inout </td>
1225
   <td align="left">3.3-V LVTTL</td>
1226
   <td align="left">25</td>
1227
</tr>
1228
<tr>
1229
   <td align="left">GPIO_0[23]</td>
1230
   <td align="left">T11</td>
1231
   <td align="left">inout </td>
1232
   <td align="left">3.3-V LVTTL</td>
1233
   <td align="left">26</td>
1234
</tr>
1235
<tr>
1236
   <td align="left">GPIO_0[24]</td>
1237
   <td align="left">AE7</td>
1238
   <td align="left">inout </td>
1239
   <td align="left">3.3-V LVTTL</td>
1240
   <td align="left">27</td>
1241
</tr>
1242
<tr>
1243
   <td align="left">GPIO_0[25]</td>
1244
   <td align="left">AF6</td>
1245
   <td align="left">inout </td>
1246
   <td align="left">3.3-V LVTTL</td>
1247
   <td align="left">28</td>
1248
</tr>
1249
<tr>
1250
   <td align="left">GPIO_0[26]</td>
1251
   <td align="left">AF9</td>
1252
   <td align="left">inout </td>
1253
   <td align="left">3.3-V LVTTL</td>
1254
   <td align="left">31</td>
1255
</tr>
1256
<tr>
1257
   <td align="left">GPIO_0[27]</td>
1258
   <td align="left">AE8</td>
1259
   <td align="left">inout </td>
1260
   <td align="left">3.3-V LVTTL</td>
1261
   <td align="left">32</td>
1262
</tr>
1263
<tr>
1264
   <td align="left">GPIO_0[28]</td>
1265
   <td align="left">AD10</td>
1266
   <td align="left">inout </td>
1267
   <td align="left">3.3-V LVTTL</td>
1268
   <td align="left">33</td>
1269
</tr>
1270
<tr>
1271
   <td align="left">GPIO_0[29]</td>
1272
   <td align="left">AE9</td>
1273
   <td align="left">inout </td>
1274
   <td align="left">3.3-V LVTTL</td>
1275
   <td align="left">34</td>
1276
</tr>
1277
<tr>
1278
   <td align="left">GPIO_0[30]</td>
1279
   <td align="left">AD11</td>
1280
   <td align="left">inout </td>
1281
   <td align="left">3.3-V LVTTL</td>
1282
   <td align="left">35</td>
1283
</tr>
1284
<tr>
1285
   <td align="left">GPIO_0[31]</td>
1286
   <td align="left">AF10</td>
1287
   <td align="left">inout </td>
1288
   <td align="left">3.3-V LVTTL</td>
1289
   <td align="left">36</td>
1290
</tr>
1291
<tr>
1292
   <td align="left">GPIO_0[32]</td>
1293
   <td align="left">AD12</td>
1294
   <td align="left">inout </td>
1295
   <td align="left">3.3-V LVTTL</td>
1296
   <td align="left">37</td>
1297
</tr>
1298
<tr>
1299
   <td align="left">GPIO_0[33]</td>
1300
   <td align="left">AE11</td>
1301
   <td align="left">inout </td>
1302
   <td align="left">3.3-V LVTTL</td>
1303
   <td align="left">38</td>
1304
</tr>
1305
<tr>
1306
   <td align="left">GPIO_0[34]</td>
1307
   <td align="left">AF11</td>
1308
   <td align="left">inout </td>
1309
   <td align="left">3.3-V LVTTL</td>
1310
   <td align="left">39</td>
1311
</tr>
1312
<tr>
1313
   <td align="left">GPIO_0[35]</td>
1314
   <td align="left">AE12</td>
1315
   <td align="left">inout </td>
1316
   <td align="left">3.3-V LVTTL</td>
1317
   <td align="left">40</td>
1318
</tr>
1319
</table>
1320
<h2><a name="GPIO_1"></a></h2><table border="3">
1321
<caption  align="left">GPIO connect to GPIO Default</caption>
1322
<br />
1323
<br />
1324
<tr>
1325
   <th align="left" bgcolor="Khaki">Name</th>
1326
   <th align="left" bgcolor="Khaki">Location</th>
1327
   <th align="left" bgcolor="Khaki">Direction</th>
1328
   <th align="left" bgcolor="Khaki">Standard</th>
1329
   <th align="left" bgcolor="Khaki">GPIO Pin Index</th>
1330
</tr>
1331
<tr>
1332
   <td align="left">GPIO_1[0]</td>
1333
   <td align="left">Y15</td>
1334
   <td align="left">inout </td>
1335
   <td align="left">3.3-V LVTTL</td>
1336
   <td align="left">1</td>
1337
</tr>
1338
<tr>
1339
   <td align="left">GPIO_1[1]</td>
1340
   <td align="left">AG28</td>
1341
   <td align="left">inout </td>
1342
   <td align="left">3.3-V LVTTL</td>
1343
   <td align="left">2</td>
1344
</tr>
1345
<tr>
1346
   <td align="left">GPIO_1[2]</td>
1347
   <td align="left">AA15</td>
1348
   <td align="left">inout </td>
1349
   <td align="left">3.3-V LVTTL</td>
1350
   <td align="left">3</td>
1351
</tr>
1352
<tr>
1353
   <td align="left">GPIO_1[3]</td>
1354
   <td align="left">AH27</td>
1355
   <td align="left">inout </td>
1356
   <td align="left">3.3-V LVTTL</td>
1357
   <td align="left">4</td>
1358
</tr>
1359
<tr>
1360
   <td align="left">GPIO_1[4]</td>
1361
   <td align="left">AG26</td>
1362
   <td align="left">inout </td>
1363
   <td align="left">3.3-V LVTTL</td>
1364
   <td align="left">5</td>
1365
</tr>
1366
<tr>
1367
   <td align="left">GPIO_1[5]</td>
1368
   <td align="left">AH24</td>
1369
   <td align="left">inout </td>
1370
   <td align="left">3.3-V LVTTL</td>
1371
   <td align="left">6</td>
1372
</tr>
1373
<tr>
1374
   <td align="left">GPIO_1[6]</td>
1375
   <td align="left">AF23</td>
1376
   <td align="left">inout </td>
1377
   <td align="left">3.3-V LVTTL</td>
1378
   <td align="left">7</td>
1379
</tr>
1380
<tr>
1381
   <td align="left">GPIO_1[7]</td>
1382
   <td align="left">AE22</td>
1383
   <td align="left">inout </td>
1384
   <td align="left">3.3-V LVTTL</td>
1385
   <td align="left">8</td>
1386
</tr>
1387
<tr>
1388
   <td align="left">GPIO_1[8]</td>
1389
   <td align="left">AF21</td>
1390
   <td align="left">inout </td>
1391
   <td align="left">3.3-V LVTTL</td>
1392
   <td align="left">9</td>
1393
</tr>
1394
<tr>
1395
   <td align="left">GPIO_1[9]</td>
1396
   <td align="left">AG20</td>
1397
   <td align="left">inout </td>
1398
   <td align="left">3.3-V LVTTL</td>
1399
   <td align="left">10</td>
1400
</tr>
1401
<tr>
1402
   <td align="left">GPIO_1[10]</td>
1403
   <td align="left">AG19</td>
1404
   <td align="left">inout </td>
1405
   <td align="left">3.3-V LVTTL</td>
1406
   <td align="left">13</td>
1407
</tr>
1408
<tr>
1409
   <td align="left">GPIO_1[11]</td>
1410
   <td align="left">AF20</td>
1411
   <td align="left">inout </td>
1412
   <td align="left">3.3-V LVTTL</td>
1413
   <td align="left">14</td>
1414
</tr>
1415
<tr>
1416
   <td align="left">GPIO_1[12]</td>
1417
   <td align="left">AC23</td>
1418
   <td align="left">inout </td>
1419
   <td align="left">3.3-V LVTTL</td>
1420
   <td align="left">15</td>
1421
</tr>
1422
<tr>
1423
   <td align="left">GPIO_1[13]</td>
1424
   <td align="left">AG18</td>
1425
   <td align="left">inout </td>
1426
   <td align="left">3.3-V LVTTL</td>
1427
   <td align="left">16</td>
1428
</tr>
1429
<tr>
1430
   <td align="left">GPIO_1[14]</td>
1431
   <td align="left">AH26</td>
1432
   <td align="left">inout </td>
1433
   <td align="left">3.3-V LVTTL</td>
1434
   <td align="left">17</td>
1435
</tr>
1436
<tr>
1437
   <td align="left">GPIO_1[15]</td>
1438
   <td align="left">AA19</td>
1439
   <td align="left">inout </td>
1440
   <td align="left">3.3-V LVTTL</td>
1441
   <td align="left">18</td>
1442
</tr>
1443
<tr>
1444
   <td align="left">GPIO_1[16]</td>
1445
   <td align="left">AG24</td>
1446
   <td align="left">inout </td>
1447
   <td align="left">3.3-V LVTTL</td>
1448
   <td align="left">19</td>
1449
</tr>
1450
<tr>
1451
   <td align="left">GPIO_1[17]</td>
1452
   <td align="left">AF25</td>
1453
   <td align="left">inout </td>
1454
   <td align="left">3.3-V LVTTL</td>
1455
   <td align="left">20</td>
1456
</tr>
1457
<tr>
1458
   <td align="left">GPIO_1[18]</td>
1459
   <td align="left">AH23</td>
1460
   <td align="left">inout </td>
1461
   <td align="left">3.3-V LVTTL</td>
1462
   <td align="left">21</td>
1463
</tr>
1464
<tr>
1465
   <td align="left">GPIO_1[19]</td>
1466
   <td align="left">AG23</td>
1467
   <td align="left">inout </td>
1468
   <td align="left">3.3-V LVTTL</td>
1469
   <td align="left">22</td>
1470
</tr>
1471
<tr>
1472
   <td align="left">GPIO_1[20]</td>
1473
   <td align="left">AE19</td>
1474
   <td align="left">inout </td>
1475
   <td align="left">3.3-V LVTTL</td>
1476
   <td align="left">23</td>
1477
</tr>
1478
<tr>
1479
   <td align="left">GPIO_1[21]</td>
1480
   <td align="left">AF18</td>
1481
   <td align="left">inout </td>
1482
   <td align="left">3.3-V LVTTL</td>
1483
   <td align="left">24</td>
1484
</tr>
1485
<tr>
1486
   <td align="left">GPIO_1[22]</td>
1487
   <td align="left">AD19</td>
1488
   <td align="left">inout </td>
1489
   <td align="left">3.3-V LVTTL</td>
1490
   <td align="left">25</td>
1491
</tr>
1492
<tr>
1493
   <td align="left">GPIO_1[23]</td>
1494
   <td align="left">AE20</td>
1495
   <td align="left">inout </td>
1496
   <td align="left">3.3-V LVTTL</td>
1497
   <td align="left">26</td>
1498
</tr>
1499
<tr>
1500
   <td align="left">GPIO_1[24]</td>
1501
   <td align="left">AE24</td>
1502
   <td align="left">inout </td>
1503
   <td align="left">3.3-V LVTTL</td>
1504
   <td align="left">27</td>
1505
</tr>
1506
<tr>
1507
   <td align="left">GPIO_1[25]</td>
1508
   <td align="left">AD20</td>
1509
   <td align="left">inout </td>
1510
   <td align="left">3.3-V LVTTL</td>
1511
   <td align="left">28</td>
1512
</tr>
1513
<tr>
1514
   <td align="left">GPIO_1[26]</td>
1515
   <td align="left">AF22</td>
1516
   <td align="left">inout </td>
1517
   <td align="left">3.3-V LVTTL</td>
1518
   <td align="left">31</td>
1519
</tr>
1520
<tr>
1521
   <td align="left">GPIO_1[27]</td>
1522
   <td align="left">AH22</td>
1523
   <td align="left">inout </td>
1524
   <td align="left">3.3-V LVTTL</td>
1525
   <td align="left">32</td>
1526
</tr>
1527
<tr>
1528
   <td align="left">GPIO_1[28]</td>
1529
   <td align="left">AH19</td>
1530
   <td align="left">inout </td>
1531
   <td align="left">3.3-V LVTTL</td>
1532
   <td align="left">33</td>
1533
</tr>
1534
<tr>
1535
   <td align="left">GPIO_1[29]</td>
1536
   <td align="left">AH21</td>
1537
   <td align="left">inout </td>
1538
   <td align="left">3.3-V LVTTL</td>
1539
   <td align="left">34</td>
1540
</tr>
1541
<tr>
1542
   <td align="left">GPIO_1[30]</td>
1543
   <td align="left">AG21</td>
1544
   <td align="left">inout </td>
1545
   <td align="left">3.3-V LVTTL</td>
1546
   <td align="left">35</td>
1547
</tr>
1548
<tr>
1549
   <td align="left">GPIO_1[31]</td>
1550
   <td align="left">AH18</td>
1551
   <td align="left">inout </td>
1552
   <td align="left">3.3-V LVTTL</td>
1553
   <td align="left">36</td>
1554
</tr>
1555
<tr>
1556
   <td align="left">GPIO_1[32]</td>
1557
   <td align="left">AD23</td>
1558
   <td align="left">inout </td>
1559
   <td align="left">3.3-V LVTTL</td>
1560
   <td align="left">37</td>
1561
</tr>
1562
<tr>
1563
   <td align="left">GPIO_1[33]</td>
1564
   <td align="left">AE23</td>
1565
   <td align="left">inout </td>
1566
   <td align="left">3.3-V LVTTL</td>
1567
   <td align="left">38</td>
1568
</tr>
1569
<tr>
1570
   <td align="left">GPIO_1[34]</td>
1571
   <td align="left">AA18</td>
1572
   <td align="left">inout </td>
1573
   <td align="left">3.3-V LVTTL</td>
1574
   <td align="left">39</td>
1575
</tr>
1576
<tr>
1577
   <td align="left">GPIO_1[35]</td>
1578
   <td align="left">AC22</td>
1579
   <td align="left">inout </td>
1580
   <td align="left">3.3-V LVTTL</td>
1581
   <td align="left">40</td>
1582
</tr>
1583
</table>
1584
</html>
1585
</body>

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