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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [altera_de0_nano_soc/] [doc/] [Terasic/] [DE0_NANO_SOC/] [Demonstrations/] [FPGA/] [DE0_NANO_SOC_Default/] [DE0_NANO_SOC_Default.sta.summary] - Blame information for rev 221

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Line No. Rev Author Line
1 221 olivier.gi 
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2 
TimeQuest Timing Analyzer Summary
3 
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4 
 
5 
Type  : Slow 1100mV 85C Model Setup 'FPGA_CLK1_50'
6 
Slack : 17.660
7 
TNS   : 0.000
8 
 
9 
Type  : Slow 1100mV 85C Model Hold 'FPGA_CLK1_50'
10 
Slack : 0.378
11 
TNS   : 0.000
12 
 
13 
Type  : Slow 1100mV 85C Model Minimum Pulse Width 'FPGA_CLK1_50'
14 
Slack : 9.247
15 
TNS   : 0.000
16 
 
17 
Type  : Slow 1100mV 0C Model Setup 'FPGA_CLK1_50'
18 
Slack : 17.551
19 
TNS   : 0.000
20 
 
21 
Type  : Slow 1100mV 0C Model Hold 'FPGA_CLK1_50'
22 
Slack : 0.388
23 
TNS   : 0.000
24 
 
25 
Type  : Slow 1100mV 0C Model Minimum Pulse Width 'FPGA_CLK1_50'
26 
Slack : 9.311
27 
TNS   : 0.000
28 
 
29 
Type  : Fast 1100mV 85C Model Setup 'FPGA_CLK1_50'
30 
Slack : 18.676
31 
TNS   : 0.000
32 
 
33 
Type  : Fast 1100mV 85C Model Hold 'FPGA_CLK1_50'
34 
Slack : 0.183
35 
TNS   : 0.000
36 
 
37 
Type  : Fast 1100mV 85C Model Minimum Pulse Width 'FPGA_CLK1_50'
38 
Slack : 9.112
39 
TNS   : 0.000
40 
 
41 
Type  : Fast 1100mV 0C Model Setup 'FPGA_CLK1_50'
42 
Slack : 18.692
43 
TNS   : 0.000
44 
 
45 
Type  : Fast 1100mV 0C Model Hold 'FPGA_CLK1_50'
46 
Slack : 0.176
47 
TNS   : 0.000
48 
 
49 
Type  : Fast 1100mV 0C Model Minimum Pulse Width 'FPGA_CLK1_50'
50 
Slack : 9.072
51 
TNS   : 0.000
52 
 
53 
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